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公开(公告)号：US20200029087A1
公开(公告)日：2020-01-23
申请号：US16513586
申请日：2019-07-16
Inventor： Chong Soon LIM , Sughosh Pavan SHASHIDHAR , Ru Ling LIAO , Hai Wei SUN , Han Boon TEO , Jing Ya LI , Kiyofumi ABE , Tadamasa TOMA , Takahiro NISHI
IPC: H04N19/44 , H04N19/137 , H04N19/119 , H04N19/159 , H04N19/176
Abstract: An image decoder has circuitry coupled to a memory. The circuitry splits a current image block into a plurality of partitions. The circuitry predicts a first motion vector from a set of uni-prediction motion vector candidates for a first partition of the plurality of partitions, and decodes the first partition using the first motion vector.
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公开(公告)号：US20190335181A1
公开(公告)日：2019-10-31
申请号：US16394225
申请日：2019-04-25
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/159 , H04N19/119 , H04N19/139 , H04N19/513
Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.
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公开(公告)号：US20190273922A1
公开(公告)日：2019-09-05
申请号：US16417517
申请日：2019-05-20
Inventor： Chong Soon LIM , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Ru Ling LIAO , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/119 , H04N19/96 , H04N19/159 , H04N19/196 , H04N19/176
Abstract: An image encoder/decoder includes circuitry and a memory coupled to the circuitry. When a geometry of a block of a picture satisfies a first condition, the circuitry splits the block of the picture into sub blocks having a first set of geometries. When the geometry of the block does not satisfy the first condition, the circuitry splits the block of the picture into sub blocks having a second set of geometries, the second set of geometries being different from the first set of geometries. The circuitry encodes/decodes the sub blocks of the block.
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公开(公告)号：US20190110076A1
公开(公告)日：2019-04-11
申请号：US16194586
申请日：2018-11-19
Inventor： Chong Soon LIM , Han Boon TEO , Takahiro NISHI , Tadamasa TOMA , Ru Ling LIAO , Sughosh Pavan SHASHIDHAR , Hai Wei SUN
IPC: H04N19/597 , H04N19/176 , H04N19/85 , G06T5/00 , H04N19/159 , H04N19/46
Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
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公开(公告)号：US20240357170A1
公开(公告)日：2024-10-24
申请号：US18762925
申请日：2024-07-03
Inventor： Chong Soon LIM , Han Boon TEO , Takahiro NISHI , Tadamasa TOMA , Ru Ling LIAO , Sughosh Pavan SHASHIDHAR , Hai Wei SUN
IPC: H04N19/597 , G06T5/80 , H04N19/159 , H04N19/176 , H04N19/46 , H04N19/85
CPC classification number: H04N19/597 , G06T5/80 , H04N19/159 , H04N19/176 , H04N19/46 , H04N19/85
Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
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Patent Agency Ranking
公开(公告)号：US20240323405A1
公开(公告)日：2024-09-26
申请号：US18670936
申请日：2024-05-22
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/176 , H04N19/105 , H04N19/52 , H04N19/70
CPC classification number: H04N19/176 , H04N19/105 , H04N19/52 , H04N19/70
Abstract: An encoder, includes: circuitry; and memory. Using the memory, the circuitry: in inter prediction for a current block, determines a base motion vector, and writes, in an encoded signal, a delta motion vector representing (i) one direction among a plurality of directions including a diagonal direction and (ii) a distance from the base motion vector; and encodes the current block using the delta motion vector and the base motion vector as a motion vector of the current block.
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公开(公告)号：US20240205420A1
公开(公告)日：2024-06-20
申请号：US18591350
申请日：2024-02-29
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/159 , H04N19/119 , H04N19/139 , H04N19/513
CPC classification number: H04N19/159 , H04N19/119 , H04N19/139 , H04N19/521
Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.
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78.发明公开公开(公告)号：US20240114160A1
公开(公告)日：2024-04-04
申请号：US18532858
申请日：2023-12-07
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/44 , H04N19/137 , H04N19/176 , H04N19/182
CPC classification number: H04N19/44 , H04N19/137 , H04N19/176 , H04N19/182
Abstract: An image decoder includes circuitry and a memory, wherein the circuitry, in operation, calculates first values of a first partition in a current block, using a first motion vector for the first partition; calculates second values of a second partition in the current block, using a second motion vector for the second partition; calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector; calculates fourth values of the set of pixels, using the second motion vector; and weights the third values and the fourth values. A number of pixels in a row in the set of pixels is two or more, and two or more weights applied to the third values increase along the row.
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公开(公告)号：US20240114136A1
公开(公告)日：2024-04-04
申请号：US18531574
申请日：2023-12-06
Inventor： Chong Soon LIM , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Ru Ling LIAO , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/119 , H04N19/157 , H04N19/159 , H04N19/176 , H04N19/196 , H04N19/463 , H04N19/96
CPC classification number: H04N19/119 , H04N19/157 , H04N19/159 , H04N19/176 , H04N19/196 , H04N19/463 , H04N19/96
Abstract: An image encoder/decoder includes circuitry and a memory coupled to the circuitry. When a geometry of a block of a picture satisfies a first condition, the circuitry splits the block of the picture into sub blocks having a first set of geometries. When the geometry of the block does not satisfy the first condition, the circuitry splits the block of the picture into sub blocks having a second set of geometries, the second set of geometries being different from the first set of geometries. The circuitry encodes/decodes the sub blocks of the block.
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公开(公告)号：US20240031569A1
公开(公告)日：2024-01-25
申请号：US18364978
申请日：2023-08-03
Inventor： Chong Soon LIM , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Ru Ling LIAO , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/119 , H04N19/60 , H04N19/50 , H04N19/176
CPC classification number: H04N19/119 , H04N19/60 , H04N19/50 , H04N19/176
Abstract: An encoder according to one aspect of the present disclosure encodes a block of an image, and includes a processor and memory connected to the processor. Using the memory, the processor partitions a block into a plurality of sub blocks and encodes a sub block included in the plurality of sub blocks in an encoding process including at least a transform process or a prediction process. The block is partitioned using a multiple partition including at least three odd-numbered child nodes and each of a width and a height of each of the plurality of sub blocks is a power of two.
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