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    Single mode photonic circuit architecture and a new optical splitter design based on parallel waveguide mode conversion
    71.
    发明授权
    Single mode photonic circuit architecture and a new optical splitter design based on parallel waveguide mode conversion 有权
    单模光子电路架构和基于平行波导模式转换的新型光分路器设计

    公开(公告)号：US07978941B2

    公开(公告)日：2011-07-12

    申请号：US12686227

    申请日：2010-01-12

    申请人： Bing Li

    发明人： Bing Li

    IPC分类号： G02B6/12

    CPC分类号： G02B6/14 ,  B82Y20/00 ,  G02B6/1223 ,  G02B6/30 ,  G02B2006/12195

    摘要： The new single mode circuit (SMC) architecture is invented for photonic integrated circuits (PIC). This architecture allows using multimode waveguides or structures to construct a single mode operated PIC. The multimode sections used in such SMC based PIC possess strong lateral confinement so that the PIC can have high circuit density and high optical performance at the same time. A parallel mode converter structure is also invented here. Based on this parallel mode converter, a low loss optical splitter can be constructed for high index contrast waveguide system.

    摘要翻译： 新的单模电路（SMC）架构是为光子集成电路（PIC）而发明的。 该架构允许使用多模波导或结构构造单模操作的PIC。 在这种基于SMC的PIC中使用的多模部分具有强的侧向约束，使得PIC可以同时具有高电路密度和高光学性能。 此处还发明了并行模式转换器结构。 基于这种并行模式转换器，可以为高折射率对比度波导系统构建低损耗光分路器。

    Formal Verification Of Clock Domain Crossings
    73.
    发明申请
    Formal Verification Of Clock Domain Crossings 有权
    时钟域交叉口的正式验证

    公开(公告)号：US20100199244A1

    公开(公告)日：2010-08-05

    申请号：US12559343

    申请日：2009-09-14

    申请人： Ka-Kei Kwok ,  Bing Li ,  Tai An Ly ,  Rojer Raji Sabbagh

    发明人： Ka-Kei Kwok ,  Bing Li ,  Tai An Ly ,  Rojer Raji Sabbagh

    IPC分类号： G06F17/50

    CPC分类号： G06F17/504 ,  G06F2217/62

    摘要： Methods and apparatus for performing automated formal clock domain crossing verification on a device are detailed. In various implementations of the invention, a device may be analyzed, wherein the clock domain crossing boundaries are identified. Subsequently, a formal clock domain crossing verification method may be applied to the identified clock domain crossing boundaries, resulting in clock domain crossing assertions being identified. After which the identified assertions may be promoted for post clock domain crossing analysis. With various implementations of the invention, a formal clock domain crossing method is provided, wherein the device components near an identified clock domain crossing are extracted. Assertions may then be synthesized and verified based upon the extracted components. Various implementations of the invention provide for clock domain crossing verification to be performed iteratively, wherein a larger and larger selection of the device is extracted during formal verification. Additionally, various implementations of the present invention provide that the clock domain crossing verification operate on the fly during a device verification procedure. With further implementations, a bit-blasted approach to clock domain crossing verification may be provided during formal verification.

    摘要翻译： 详细说明了在设备上执行自动化正时时钟域交叉验证的方法和装置。 在本发明的各种实现中，可以分析设备，其中识别时钟域跨越边界。 随后，正式的时钟域交叉验证方法可以应用于所识别的时钟域交叉边界，导致正在识别的时域交叉断言。 之后，可以促进识别的断言用于后时钟域交叉分析。 通过本发明的各种实施方式，提供了正式的时钟域交叉方法，其中提取了识别的时钟域交叉附近的设备组件。 然后可以基于提取的组件来合成和验证断言。 本发明的各种实施方案提供时钟域交叉验证以迭代地执行，其中在形式验证期间提取更大和更大的设备选择。 另外，本发明的各种实现提供了在设备验证过程中时钟域交叉验证在飞行中操作。 通过进一步的实现，可以在形式验证期间提供用于时钟域交叉验证的打击方式。

    Fast clock acquisition enable method using phase stir injection to PLL for burst mode optical receivers
    74.
    发明授权
    Fast clock acquisition enable method using phase stir injection to PLL for burst mode optical receivers 失效
    快速时钟采集启用方法，使用相位搅拌注入到突发模式光接收器的PLL

    公开(公告)号：US07421053B1

    公开(公告)日：2008-09-02

    申请号：US10423819

    申请日：2003-04-25

    申请人： Bing Li ,  David Wolf ,  James Plesa ,  Lakshman S. Tamil

    发明人： Bing Li ,  David Wolf ,  James Plesa ,  Lakshman S. Tamil

    IPC分类号： H03D3/24

    CPC分类号： H03L7/10 ,  H03L7/093 ,  H03L7/24 ,  H04L7/033

    摘要： Systems and methods for aligning the phase of a PLL with an incoming data signal. In one embodiment, when a data signal is received in a PLL, a phase perturbation signal is generated and injected into the PLL. The PLL then performs a phase alignment procedure to lock on to the received data signal. The phase perturbation signal is a damped sinusoidal oscillation that is injected into the PLL when each of a plurality of data packets is received. The perturbation signal has an amplitude sufficient to bump the PLL out of a quasi-stable state around 180 degrees out of phase with the incoming data signal, but is damped to less than a degree of phase shift within 30 ns of being injected.

    摘要翻译： 用于使PLL的相位与输入数据信号对准的系统和方法。 在一个实施例中，当在PLL中接收到数据信号时，产生相位扰动信号并将其注入到PLL中。 PLL然后执行相位对准过程以锁定到接收的数据信号。 相位扰动信号是在接收到多个数据分组中的每一个时被注入到PLL中的阻尼正弦振荡。 扰动信号具有足够的振幅，使PLL能够与进入的数据信号相差180度的准稳态，使其相位不同，但在被注入的30ns内被阻尼到小于一个相位程度。

    Single mode photonic circuit architecture and a new optical splitter design based on parallel waveguide mode conversion
    75.
    发明申请
    Single mode photonic circuit architecture and a new optical splitter design based on parallel waveguide mode conversion 有权
    单模光子电路架构和基于平行波导模式转换的新型光分路器设计

    公开(公告)号：US20080002928A1

    公开(公告)日：2008-01-03

    申请号：US11757394

    申请日：2007-06-04

    申请人： Bing Li

    发明人： Bing Li

    IPC分类号： G02B6/12 ,  G02B6/26

    CPC分类号： G02B6/14 ,  B82Y20/00 ,  G02B6/1223 ,  G02B6/30 ,  G02B2006/12195

    摘要： The new single mode circuit (SMC) architecture is invented for photonic integrated circuits (PIC). This architecture allows using multimode waveguides or structures to construct a single mode operated PIC. The multimode sections used in such SMC based PIC possess strong lateral confinement so that the PIC can have high circuit density and high optical performance at the same time. A parallel mode converter structure is also invented here. Based on this parallel mode converter, a low loss optical splitter can be constructed for high index contrast waveguide system.

    摘要翻译： 新的单模电路（SMC）架构是为光子集成电路（PIC）而发明的。 该架构允许使用多模波导或结构构造单模操作的PIC。 在这种基于SMC的PIC中使用的多模部分具有强的侧向约束，使得PIC可以同时具有高电路密度和高光学性能。 此处还发明了并行模式转换器结构。 基于这种并行模式转换器，可以为高折射率对比度波导系统构建低损耗光分路器。

    SYSTEM AND METHOD FOR GENERATING A PLAY-LIST
    77.
    发明申请
    SYSTEM AND METHOD FOR GENERATING A PLAY-LIST 审中-公开
    用于生成播放列表的系统和方法

    公开(公告)号：US20070078847A1

    公开(公告)日：2007-04-05

    申请号：US11309154

    申请日：2006-06-29

    申请人： Kuan-Hong Hsieh ,  Zai-An Pan ,  Xiao-Guang Li ,  Bing Li

    发明人： Kuan-Hong Hsieh ,  Zai-An Pan ,  Xiao-Guang Li ,  Bing Li

    IPC分类号： G06F17/30

    CPC分类号： G11B27/034 ,  G11B27/105 ,  G11B27/322

    摘要： A system for generating a play-list includes a media player and a media file server. The media player automatically generates weight values of each media file therein. The media file server stores a plurality of category tables, each category table storing a desired sub-category and corresponding sub-category weight values; initializes the category tables in response to an operational input for generating a play-list; obtains a predetermined amount of media files from the media player; reads the desired sub-categories and the weight values of the obtained media files; increments a corresponding sub-category weight value in the corresponding initialized category tables by the read weight values; calculates final weight values of each media file according to the category tables; and generates the play-list of the media files according to the final weight values thereof. The present invention also provides a corresponding method that makes the play-list more suitable for the user's favors.

    摘要翻译： 用于产生播放列表的系统包括媒体播放器和媒体文件服务器。 媒体播放器自动生成每个媒体文件的权重值。 媒体文件服务器存储多个类别表，每个类别表存储期望的子类别和对应的子类别权重值; 响应于用于生成播放列表的操作输入来初始化类别表; 从媒体播放器获取预定量的媒体文件; 读取所获得的媒体文件的期望子类别和权重值; 将相应的初始化类别表中相应的子类别权重值递增读取的权重值; 根据类别表计算每个媒体文件的最终权重值; 并根据其最终权重值生成媒体文件的播放列表。 本发明还提供了使播放列表更适合用户的方式的相应方法。

    Active waveguides for optoelectronic devices
    79.
    发明授权
    Active waveguides for optoelectronic devices 有权
    有源波导用于光电器件

    公开(公告)号：US06999670B1

    公开(公告)日：2006-02-14

    申请号：US10650234

    申请日：2003-08-27

    申请人： Lawrence C. Gunn, III ,  Bing Li ,  Thierry J. Pinguet ,  David L. R. Press ,  Maxime Jean Rattier

    发明人： Lawrence C. Gunn, III ,  Bing Li ,  Thierry J. Pinguet ,  David L. R. Press ,  Maxime Jean Rattier

    IPC分类号： G02B6/10

    CPC分类号： G02F1/025

    摘要： Optoelectronic devices of the present invention include several embodiments of an electronically active optical waveguide made of a strip loaded waveguide with a lateral, self-aligned diode fabricated in a layer of silicon. A voltage applied across the diode changes the free carrier density in a portion of the active waveguide, which can change the refractive index in that portion of the waveguide. Changing the refractive index can cause a phase shift of an optical signal propagating down the waveguide and this effect can be used to control the optical signal. Changing the free carrier density can also change the amount of optical attenuation in a section of an active waveguide.Optoelectronic devices such as: modulators, attenuators, switches, beam diverters, tunable filters and other devices can be fabricated on a standard SOI substrate (silicon on insulator), which is typically used in the fabrication of CMOS integrated circuits. Other types of substrates can also be used for the fabrication of optoelectronic devices of the present invention.

    摘要翻译： 本发明的光电子器件包括由带状负载波导制成的电子有源光波导的几个实施例，该波导具有制造在硅层中的横向，自对准二极管。 在二极管上施加的电压改变了有源波导的一部分中的自由载流子密度，这可以改变该波导部分的折射率。 改变折射率可导致沿着波导传播的光信号的相移，并且该效应可用于控制光信号。 改变自由载流子密度也可以改变有源波导的一部分中的光衰减量。