Permanent open firmware PCI host bridge (PHB) unit addressing to support dynamic memory mapping and swapping of I/O drawers
    71.
    发明授权
    Permanent open firmware PCI host bridge (PHB) unit addressing to support dynamic memory mapping and swapping of I/O drawers 有权
    永久开放固件PCI主机桥(PHB)单元寻址,以支持I / O抽屉的动态内存映射和交换

    公开(公告)号:US06961785B1

    公开(公告)日:2005-11-01

    申请号:US09631723

    申请日:2000-08-03

    CPC分类号: G06F13/4027 G06F13/12

    摘要: A system for managing input/output drawers within a data processing system. A unique identifier is assigned to each of a plurality of drawers, and is used by the operating system to identify the drawers in the system regardless of how these drawers are interconnected. Another unique PCI-bridge identifier is assigned to each of a plurality of PCI Host bridges (PHBs) from all drawers, and is used by the operating system to perform input/output processes to devices associated with the plurality of PHBs such that the ODM object for each of the PHBs remains the same regardless of how the drawer is interconnected in the system. When a new drawer is added to the system, a new unique identifier is assigned to the new drawer ensuring that the unique identifiers previously assigned to the other drawers are not used to identify the new drawer.

    摘要翻译: 一种用于在数据处理系统内管理输入/输出抽屉的系统。 分配给多个抽屉中的每一个的唯一标识符,并且由操作系统用于识别系统中的抽屉,而不管这些抽屉如何互连。 另一唯一的PCI桥标识符被分配给来自所有抽屉的多个PCI主机桥(PHB)中的每一个,并被操作系统用于对与多个PHB相关联的设备执行输入/输出处理,使得ODM对象 对于每个PHB,保持不变,无论抽屉在系统中如何互连。 当新的抽屉被添加到系统中时,新的唯一标识符被分配给新的抽屉,确保先前分配给其他抽屉的唯一标识符不被用于识别新的抽屉。

    DMA windowing in an LPAR environment using device arbitration level to allow multiple IOAs per terminal bridge
    72.
    发明授权
    DMA windowing in an LPAR environment using device arbitration level to allow multiple IOAs per terminal bridge 有权
    使用设备仲裁级别在LPAR环境中DMA窗口,以允许每个终端桥接多个IOA

    公开(公告)号:US06823404B2

    公开(公告)日:2004-11-23

    申请号:US09766764

    申请日:2001-01-23

    IPC分类号: G06F300

    CPC分类号: G06F13/28

    摘要: A method, system, and apparatus for preventing input/output (I/O) adapters used by an operating system (OS) image, in a logically partitioned data processing system, from fetching or corrupting data from a memory location allocated to another OS image within the data processing system is provided. A hypervisor prevents transmission of data between an input/output adapter in one of the logical partitions and memory locations assigned to other logical partitions during a direct memory access (DMA) operation by assigning each of the input/output adapters a range of I/O bus DMA addresses. The I/O adapters (IOAs) are connected to PCI host bridges via terminal bridges. A single terminal bridge may support multiple IOAs, in which case every terminal bridge has a plurality of sets of range registers, each associated with a respective one of the IOAs to which it is connected. An arbiter is provided which selects one of the input/output adapters to use the PCI bus. The terminal bridge can examine the grant signals from the arbiter to the IOAs, to determine which set of range registers is to be used.

    摘要翻译: 用于防止在逻辑分区的数据处理系统中由操作系统(OS)映像使用的输入/输出(I / O)适配器的方法,系统和装置从分配给另一个OS映像的存储器位置获取或破坏数据 在数据处理系统内提供。 虚拟机管理程序防止在直接存储器访问(DMA)操作期间通过分配每个输入/输出适配器一个I / O范围的逻辑分区之一和分配给其他逻辑分区的存储器位置之间的输入/输出适配器之间的数据传输 总线DMA地址。 I / O适配器(IOA)通过终端桥连接到PCI主机桥。 单个终端桥可以支持多个IOA,在这种情况下,每个终端桥具有多组范围寄存器,每个范围寄存器与其所连接的IOA中的相应一个相关联。 提供了一个仲裁器,其选择一个输入/输出适配器来使用PCI总线。 终端桥可以检查从仲裁器到IOA的授权信号,以确定要使用哪个范围寄存器组。

    Isolation of I/O bus errors to a single partition in an LPAR environment
    73.
    发明授权
    Isolation of I/O bus errors to a single partition in an LPAR environment 有权
    在LPAR环境中将I / O总线错误隔离到单个分区

    公开(公告)号:US06643727B1

    公开(公告)日:2003-11-04

    申请号:US09589664

    申请日:2000-06-08

    IPC分类号: G06F1336

    CPC分类号: H04L1/00

    摘要: A method, system, and apparatus for isolating an input/output (I/O) bus error, received from an I/O adapter, from the other I/O adapters that may be in different partitions within a logically partitioned data process system is provided. In one embodiment, the logically partitioned data processing system includes a system bus, a processing unit, a memory unit, a host bridge, a plurality of terminal bridges, and a plurality of input/output adapters. The processing unit, memory unit, and the host bridge are all coupled to each other through the system bus. Each of the plurality of terminal bridges is coupled to the host bridge through a first bus. Each of the input/output adapters is coupled to one of the plurality of terminal bridges through a one of a plurality of second buses, such that each input/output adapter corresponds to a single terminal bridge. Each of the input/output adapters are assigned to one of a plurality of logical partitions within the data processing system. Each of the terminal bridges isolates errors received from a respective one of the input/output adapters from other input/output adapters, some of which may be within a different one of the plurality of logical partitions.

    摘要翻译: 用于将从I / O适配器接收的输入/输出(I / O)总线错误与可能在逻辑分区数据处理系统中的不同分区中的其他I / O适配器隔离的方法,系统和装置是 提供。 在一个实施例中,逻辑分区数据处理系统包括系统总线,处理单元,存储单元,主桥,多个终端桥以及多个输入/输出适配器。 处理单元,存储单元和主桥都通过系统总线相互耦合。 多个终端桥中的每一个通过第一总线耦合到主桥。 每个输入/输出适配器通过多个第二总线中的一个耦合到多个终端桥中的一个,使得每个输入/输出适配器对应于单个终端桥。 每个输入/输出适配器被分配给数据处理系统内的多个逻辑分区中的一个。 每个终端桥将从相应的一个输入/输出适配器接收的错误与其他输入/输出适配器隔离,其中一些输入/输出适配器中的一些可能在多个逻辑分区中的不同的一个之内。

    Assist thread analysis and debug mechanism

    公开(公告)号:US08719638B2

    公开(公告)日:2014-05-06

    申请号:US13551366

    申请日:2012-07-17

    IPC分类号: G06F11/00

    CPC分类号: G06F11/3636 G06F11/3648

    摘要: A processor recognizes a request from a program executing on a first hardware thread to initiate software code on a second hardware thread. In response, the second hardware thread initiates and commences executing the software code. During execution, the software code uses hardware registers of the second hardware thread to store data. Upon termination of the software code, the second hardware thread invokes a hypervisor program, which extracts data from the hardware registers and stores the extracted data in a shared memory area. In turn, a debug routine executes and retrieves the extracted data from the shared memory area.

    Assist Thread Analysis and Debug Mechanism
    76.
    发明申请
    Assist Thread Analysis and Debug Mechanism 失效
    辅助线程分析和调试机制

    公开(公告)号:US20120284717A1

    公开(公告)日:2012-11-08

    申请号:US13551366

    申请日:2012-07-17

    IPC分类号: G06F9/455

    CPC分类号: G06F11/3636 G06F11/3648

    摘要: A processor recognizes a request from a program executing on a first hardware thread to initiate software code on a second hardware thread. In response, the second hardware thread initiates and commences executing the software code. During execution, the software code uses hardware registers of the second hardware thread to store data. Upon termination of the software code, the second hardware thread invokes a hypervisor program, which extracts data from the hardware registers and stores the extracted data in a shared memory area. In turn, a debug routine executes and retrieves the extracted data from the shared memory area.

    摘要翻译: 处理器识别来自在第一硬件线程上执行的程序的请求以在第二硬件线程上发起软件代码。 作为响应,第二硬件线程启动并开始执行软件代码。 在执行期间,软件代码使用第二硬件线程的硬件寄存器来存储数据。 在软件代码终止时,第二硬件线程调用管理程序程序,该程序从硬件寄存器中提取数据,并将提取的数据存储在共享存储器区域中。 反过来,调试例程执行并从共享存储器区域检索提取的数据。

    Method, apparatus, and computer program product for coordinating error reporting and reset utilizing an I/O adapter that supports virtualization
    77.
    发明授权
    Method, apparatus, and computer program product for coordinating error reporting and reset utilizing an I/O adapter that supports virtualization 失效
    用于协调使用支持虚拟化的I / O适配器进行错误报告和复位的方法,设备和计算机程序产品

    公开(公告)号:US08086903B2

    公开(公告)日:2011-12-27

    申请号:US12059870

    申请日:2008-03-31

    IPC分类号: G06F11/00 G06F11/07

    摘要: A method, apparatus, and computer program product are disclosed in a shared processor data processing system for coordinating error reporting for and resetting of a physical I/O adapter that supports virtualization. The physical I/O adapter is virtualized by generating virtual I/O adapters that each represent a portion of the physical I/O adapter. Each one of the virtual I/O adapters is assigned to a different one of client logical partitions. A determination is made regarding whether the physical I/O adapter may have experienced an error. If the physical I/O adapter has experienced an error, all of the client logical partitions are notified about the error and a recovery of the physical I/O adapter is coordinated among all of the client logical partitions by waiting for each client logical partition to acknowledge the error notification before the physical I/O adapter is reset.

    摘要翻译: 共享处理器数据处理系统中公开了一种方法,装置和计算机程序产品,用于协调支持虚拟化的物理I / O适配器的错误报告和重置。 物理I / O适配器通过生成虚拟I / O适配器进行虚拟化,每个虚拟I / O适配器均表示物理I / O适配器的一部分。 每个虚拟I / O适配器都分配给不同的客户端逻辑分区。 确定物理I / O适配器是否可能经历错误。 如果物理I / O适配器发生错误,则会通知所有客户端逻辑分区,并通过等待每个客户端逻辑分区到所有客户机逻辑分区来协调物理I / O适配器的恢复 在物理I / O适配器复位之前确认错误通知。

    Hypervisor virtualization of OS console and operator panel
    78.
    发明授权
    Hypervisor virtualization of OS console and operator panel 有权
    操作系统控制台和操作面板的管理程序虚拟化

    公开(公告)号:US07913251B2

    公开(公告)日:2011-03-22

    申请号:US11492139

    申请日:2006-07-24

    IPC分类号: G06F9/455

    CPC分类号: G06F9/45541 G06F9/5077

    摘要: A logically partitioned data processing system in which shared resources are emulated to provide each partition a separate copy of the shared resource is provided. In one embodiment, the logically partitioned data processing system includes a plurality of logical partitions, a plurality of operating systems executing within the data processing system and a plurality of assignable resources. Each of the plurality of operating systems is assigned to a separate one of the plurality of logical partitions, such that no more than one operating system is assigned to any given logical partition. Each of the plurality of assignable resources is assigned to a single one of the plurality of logical partitions. The logically partitioned data processing system also includes a hypervisor. The hypervisor emulates shared resources, such as an operator panel and a system console, and provides a virtual copy of these shared resources to each of the plurality of logical partitions.

    摘要翻译: 逻辑分割数据处理系统,其中模拟共享资源以提供每个分区,提供共享资源的单独副本。 在一个实施例中,逻辑分区数据处理系统包括多个逻辑分区,在数据处理系统内执行的多个操作系统和多个可分配资源。 将多个操作系统中的每一个分配给多个逻辑分区中的单独一个,使得不超过一个操作系统被分配给任何给定的逻辑分区。 多个可分配资源中的每一个被分配给多个逻辑分区中的一个。 逻辑分区数据处理系统还包括管理程序。 管理程序模拟诸如操作员面板和系统控制台的共享资源,并且将这些共享资源的虚拟副本提供给多个逻辑分区中的每一个。

    Enhanced Memory Migration Descriptor Format and Method
    79.
    发明申请
    Enhanced Memory Migration Descriptor Format and Method 失效
    增强的内存迁移描述符格式和方法

    公开(公告)号:US20100262727A1

    公开(公告)日:2010-10-14

    申请号:US12421754

    申请日:2009-04-10

    CPC分类号: G06F13/28 G06F12/1009

    摘要: An enhanced migration descriptor migrates a plurality of source sub-pages in a large source page accessible by direct memory access devices. A splitter and selector are integrated into a configuration of a computer. Responsive to a request to migrate a large page containing the plurality of source sub-pages in the source page, the splitter divides a plurality of high order page numbers from a plurality of low order page numbers. The selector selects the high order page number of the large page and creates an enhanced migration descriptor comprising the high order page number and a size of the large page. The selector, by the enhanced migration descriptor, combines the low order page number for a sub-page with the destination address and size of the enhanced migration descriptor to migrate the large page and each of the plurality of sub-pages.

    摘要翻译: 增强的迁移描述符迁移可由直接存储器访问设备访问的大的源页面中的多个源子页面。 分配器和选择器被集成到计算机的配置中。 响应于在源页面中迁移包含多个源子页面的大页面的请求,分离器从多个低阶页码中分割多个高位页码。 选择器选择大页面的高阶页码,并创建包括高阶页码和大页面大小的增强迁移描述符。 通过增强的迁移描述符,选择器将子页面的低位页码与增强的迁移描述符的目的地地址和大小组合以迁移大页面和多个子页面中的每一个。

    METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR COORDINATING ERROR REPORTING AND RESET UTILIZING AN I/O ADAPTER THAT SUPPORTS VIRTUALIZATION
    80.
    发明申请
    METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR COORDINATING ERROR REPORTING AND RESET UTILIZING AN I/O ADAPTER THAT SUPPORTS VIRTUALIZATION 失效
    用于协调错误报告和复位的方法,装置和计算机程序产品,使用支持虚拟化的I / O适配器

    公开(公告)号:US20090089611A1

    公开(公告)日:2009-04-02

    申请号:US12059870

    申请日:2008-03-31

    IPC分类号: G06F11/20

    摘要: A method, apparatus, and computer program product are disclosed in a shared processor data processing system for coordinating error reporting for and resetting of a physical I/O adapter that supports virtualization. The physical I/O adapter is virtualized by generating virtual I/O adapters that each represent a portion of the physical I/O adapter. Each one of the virtual I/O adapters is assigned to a different one of client logical partitions. A determination is made regarding whether the physical I/O adapter may have experienced an error. If the physical I/O adapter has experienced an error, all of the client logical partitions are notified about the error and a recovery of the physical I/O adapter is coordinated among all of the client logical partitions by waiting for each client logical partition to acknowledge the error notification before the physical I/O adapter is reset.

    摘要翻译: 共享处理器数据处理系统中公开了一种方法,装置和计算机程序产品,用于协调支持虚拟化的物理I / O适配器的错误报告和重置。 物理I / O适配器通过生成虚拟I / O适配器进行虚拟化,每个虚拟I / O适配器均表示物理I / O适配器的一部分。 每个虚拟I / O适配器都分配给不同的客户端逻辑分区。 确定物理I / O适配器是否可能经历错误。 如果物理I / O适配器发生错误,则会通知所有客户端逻辑分区,并通过等待每个客户端逻辑分区到所有客户机逻辑分区来协调物理I / O适配器的恢复 在物理I / O适配器复位之前确认错误通知。