公开(公告)号：US08341628B2

公开(公告)日：2012-12-25

申请号：US12645597

申请日：2009-12-23

申请人： Richard Louis Arndt ,  Christopher Francois ,  Naresh Nayar ,  Karthick Rajamani ,  Freeman Leigh Rawson, III ,  Randal Craig Swanberg

发明人： Richard Louis Arndt ,  Christopher Francois ,  Naresh Nayar ,  Karthick Rajamani ,  Freeman Leigh Rawson, III ,  Randal Craig Swanberg

IPC分类号： G06F9/455 ,  G06F1/00

CPC分类号： G06F9/45533 ,  G06F9/45541 ,  G06F2009/45575

摘要： A mechanism is provided in a logically partitioned data processing system for controlling depth and latency of exit of a virtual processor's idle state. A virtualization layer generates a cede latency setting information (CLSI) data. Responsive to booting a logical partition, the virtualization layer communicates the CLSI data to an operating system (OS) of the logical partition. The OS determines, based on the CLSI data, a particular idle state of a virtual processor under a control of the OS. Responsive to the OS calling the virtualization layer, the OS communicates the particular idle state of the virtual processor to the virtualization layer for assigning the particular idle state and wake-up characteristics to the virtual processor.

摘要翻译： 在逻辑分区的数据处理系统中提供一种机制，用于控制虚拟处理器的空闲状态的退出的深度和等待时间。 一个虚拟化层产生一个雪松延迟设置信息（CLSI）数据。 响应于引导逻辑分区，虚拟化层将CLSI数据传送到逻辑分区的操作系统（OS）。 OS根据CLSI数据确定在OS控制下的虚拟处理器的特定空闲状态。 响应于调用虚拟化层的OS，OS将虚拟处理器的特定空闲状态传送到虚拟化层，以将特定的空闲状态和唤醒特性分配给虚拟处理器。

公开(公告)号：US08745307B2

公开(公告)日：2014-06-03

申请号：US12779563

申请日：2010-05-13

申请人： Sundeep Chadha ,  Cathy May ,  Naresh Nayar ,  Randal Craig Swanberg

发明人： Sundeep Chadha ,  Cathy May ,  Naresh Nayar ,  Randal Craig Swanberg

IPC分类号： G06F12/00 ,  G06F12/10

CPC分类号： G06F12/1018 ,  G06F12/1009 ,  G06F12/1027 ,  G06F12/1036 ,  G06F2212/652

摘要： An approach identifies an amount of high order bits used to store a memory address in a memory address field that is included in a memory. This approach calculates at least one minimum number of low order bits not used to store the address with the calculation being based on the identified amount of high order bits. The approach retrieves a data element from one of the identified minimum number of low order bits of the address field and also retrieves a second data element from one of the one of the identified minimum number of low order bits of the address field.

摘要翻译： 一种方法识别用于在存储器中包括的存储器地址字段中存储存储器地址的高位数量。 该方法计算不用于存储地址的至少一个最低数量的低阶位，其中计算基于所识别的高位位数。 该方法从所识别的地址字段的最低位数的最低位数中的一个中检索数据元素，并且还从所识别的地址字段的最低位数中的一个中检索第二数据元素。

公开(公告)号：US20110283040A1

公开(公告)日：2011-11-17

申请号：US12779563

申请日：2010-05-13

申请人： Sundeep Chadha ,  Cathy May ,  Naresh Nayar ,  Randal Craig Swanberg

发明人： Sundeep Chadha ,  Cathy May ,  Naresh Nayar ,  Randal Craig Swanberg

IPC分类号： G06F12/10 ,  G06F12/00

CPC分类号： G06F12/1018 ,  G06F12/1009 ,  G06F12/1027 ,  G06F12/1036 ,  G06F2212/652

摘要： An approach identifies an amount of high order bits used to store a memory address in a memory address field that is included in a memory. This approach calculates at least one minimum number of low order bits not used to store the address with the calculation being based on the identified amount of high order bits. The approach retrieves a data element from one of the identified minimum number of low order bits of the address field and also retrieves a second data element from one of the one of the identified minimum number of low order bits of the address field.

摘要翻译： 一种方法识别用于在存储器中包括的存储器地址字段中存储存储器地址的高位数量。 该方法计算不用于存储地址的至少一个最低数量的低阶位，其中计算基于所识别的高位位数。 该方法从所识别的地址字段的最低位数的最低位数中的一个中检索数据元素，并且还从所识别的地址字段的最低位数中的一个中检索第二数据元素。

公开(公告)号：US08356193B2

公开(公告)日：2013-01-15

申请号：US12468104

申请日：2009-05-19

申请人： Richard Louis Arndt ,  Randal Craig Swanberg

发明人： Richard Louis Arndt ,  Randal Craig Swanberg

IPC分类号： G06F1/00

CPC分类号： G06F1/3203 ,  G06F1/325 ,  G06F9/45537 ,  G06F9/5011 ,  G06F9/5077 ,  G06F9/5088 ,  G06F9/5094 ,  G06F2009/45579 ,  G06F2209/508 ,  Y02D10/22 ,  Y02D10/32 ,  Y02D10/36 ,  Y02D50/20

摘要： A method, system, and computer usable program product for scaling energy use in a virtualized data processing environment are provided in the illustrative embodiments. A set of PIOAs is configured such that each PIOAs in the set of PIOAs is a functional equivalent of another PIOAs in the set of PIOAs. A utilization of each PIOA in the set of PIOAs is measured. A number of PIOAs needed to service a workload is determined. A first subset of PIOAs from the set of PIOAs is powered down if the number of PIOAs needed to service the workload is smaller than a number of operational PIOAs. The I/O operations associated with the first subset of PIOAs are transferred to a second subset of PIOAs remaining operational in the set of PIOAs.

摘要翻译： 在说明性实施例中提供了用于在虚拟化数据处理环境中缩放能量使用的方法，系统和计算机可用程序产品。 一组PIO被配置为使得该组PIO中的每个PIO是与该组PIO中的另一个PIO的功能等价物。 测量该组PIO中每个PIOA的利用率。 确定了服务工作负载所需的一些PIO。 如果需要维护工作负载的PIO数量小于多个可操作PIO，PIO的PIOA的第一个子集将被关闭。 与PIO的第一子集相关联的I / O操作被传送到在该组PIO中保持操作的PIO的第二子集。

公开(公告)号：US08141083B2

公开(公告)日：2012-03-20

申请号：US12061353

申请日：2008-04-02

申请人： Bret Ronald Olszewski ,  Randal Craig Swanberg

发明人： Bret Ronald Olszewski ,  Randal Craig Swanberg

IPC分类号： G06F9/46

CPC分类号： G06F9/5083 ,  G06F2209/508

摘要： A method, apparatus, and computer program product are disclosed for dynamically determining when to yield a processor that is assigned to perform particular work but that is currently idle. A particular processor is assigned to perform work. A determination is made regarding whether the processor is currently idle. If the processor is currently idle, a determination is made of a length of time the processor has been idle. If this determined length of time exceeds a self-tunable threshold, the processor is yielded to make the processor available to perform other work. The threshold can be dynamically tuned during runtime.

摘要翻译： 公开了一种方法，装置和计算机程序产品，用于动态地确定何时产生被分配用于执行特定工作但当前处于空闲状态的处理器。 分配一个特定的处理器来执行工作。 确定处理器当前是否处于空闲状态。 如果处理器当前处于空闲状态，则确定处理器已经空闲的时间长度。 如果确定的时间长度超过自适应阈值，则处理器被产生以使处理器可用于执行其他工作。 阈值可以在运行时动态调整。

公开(公告)号：US06832338B2

公开(公告)日：2004-12-14

申请号：US09833336

申请日：2001-04-12

申请人： Corene Casper ,  Randal Craig Swanberg

发明人： Corene Casper ,  Randal Craig Swanberg

IPC分类号： G06F1100

CPC分类号： G06F9/4812 ,  G06F11/3632

摘要： An apparatus, method and computer program product for stopping processors in a multiprocessor system without using non-maskable interrupts are provided. With the apparatus, method and computer program product, at system initialization time, a copy of the operating system (OS) kernel is copied to a new physical location in memory. When a processor enters the debugger due to the occurrence of an event, the debugger switches its virtual-to-physical address mapping to point to the new copy of the OS kernel. The original copy of the OS kernel is then modified by inserting breakpoints, e.g., interrupts, in a repeating pattern in the text of the original copy of the OS kernel, with the exception of the breakpoint handler text in the original copy of the OS kernel. A cache flush of the remaining processors is then instigated thereby forcing the remaining processors to refetch instructions from the OS kernel. When the remaining processors fetch the OS kernel instructions, the instructions are fetched from the modified OS kernel. Thus, the processors encounter the inserted breakpoints and enter a breakpoint handler. The breakpoint handler then, by virtue of the switched virtual-to-physical address mapping, redirects the processor to the new copy of the OS kernel and handles the breakpoint in a normal fashion, e.g. causes the processor to enter the debugger.

摘要翻译： 提供了一种用于在不使用不可屏蔽中断的情况下停止多处理器系统中的处理器的装置，方法和计算机程序产品。 使用设备，方法和计算机程序产品，在系统初始化时间，将操作系统（OS）内核的副本复制到内存中的新物理位置。 当处理器由于发生事件而进入调试器时，调试器将其虚拟到物理地址映射切换为指向操作系统内核的新副本。 然后通过在OS内核的原始副本的文本中的重复模式中插入断点（例如中断）来修改操作系统内核的原始副本，但操作系统内核的原始副本中的断点处理程序文本除外 。 然后启动其余处理器的缓存刷新，从而迫使剩余的处理器从操作系统内核提取指令。 当剩余的处理器提取操作系统内核指令时，会从修改的操作系统内核中获取指令。 因此，处理器遇到插入的断点并输入断点处理程序。 然后，断点处理器通过切换的虚拟到物理地址映射，将处理器重定向到OS内核的新副本，并以正常方式处理断点，例如， 使处理器进入调试器。

公开(公告)号：US06725366B1

公开(公告)日：2004-04-20

申请号：US09657115

申请日：2000-09-07

申请人： Randal Craig Swanberg

发明人： Randal Craig Swanberg

IPC分类号： G06F1210

CPC分类号： G06F9/342 ,  G06F9/322

摘要： A system and method for converting 32 bit addresses into 64 bit addresses and enabling the 32 bit address to include a region index. The region index is stored in low order bits of the 32 bit address. In some architectures, namely the Intel IA-64 architecture, the low order bits are not used in entry point addresses because each entry point is on a 16 byte boundary. In the case of the IA-64 architecture, the low 4 bits of a 64 bit module entry point address are ignored. The region index in a 64 bit IA-64 address is stored in the high 3 bits of the address. Region index information is stored in the low order bits of the 32 bit address and copied to the high order bits for the corresponding 64 bit address. In this manner, the 32 bit address can include memory region index information without compromising the normal 4 gigabyte address space for a 32 bit address. By storing the memory index information, the 32 bit address is able to address a module entry point in any of the eight memory regions found in the IA-64 architecture. In addition, an additional bit in the 32 bit address is usable to further expand the addressable range of the 32 bit address when converted to operate in a 64 bit environment.

摘要翻译： 一种用于将32位地址转换为64位地址并使32位地址包含区域索引的系统和方法。 区域索引存储在32位地址的低位中。 在一些体系结构中，即Intel IA-64架构，低位位不用于入口点地址，因为每个入口点都在16字节边界。 在IA-64架构的情况下，64位模块入口点地址的低4位将被忽略。 64位IA-64地址中的区域索引存储在地址的高3位中。 区域索引信息存储在32位地址的低位中，并复制到相应64位地址的高位位。 以这种方式，32位地址可以包括存储器区域索引信息，而不会损害32位地址的正常4吉字节地址空间。 通过存储存储器索引信息，32位地址能够寻址在IA-64架构中发现的八个存储器区域中的任一个中的模块入口点。 此外，32位地址中的另外一位可用于在转换为在64位环境中运行时进一步扩展32位地址的可寻址范围。

公开(公告)号：US07653799B2

公开(公告)日：2010-01-26

申请号：US11751004

申请日：2007-05-19

申请人： David Alan Hepkin ,  Randal Craig Swanberg

发明人： David Alan Hepkin ,  Randal Craig Swanberg

IPC分类号： G06F12/12

CPC分类号： G06F12/023

摘要： A computer implemented method, apparatus, and computer usable program code for managing real memory. In response to a request for a page to be moved into real memory, a contiguous range of real memory is reserved for the page corresponding to a contiguous virtual memory range to form a reservation within a plurality of reservations for the real memory. This reservation enables efficient promotion of pages to a larger page size. The page only occupies a portion of the contiguous range of real memory for the reservation. In response to a need for real memory, a selected reservation is released within the plurality of reservations based on an age of the selected reservation within the plurality of reservations.

摘要翻译： 用于管理实际存储器的计算机实现的方法，装置和计算机可用程序代码。 响应于要移动到实际存储器的页面的请求，为与相邻虚拟存储器范围相对应的页面保留连续范围的实际存储器，以在真实存储器的多个预留内形成预留。 此预订可以有效地将页面升级到更大的页面大小。 该页面仅占用预留的实际存储器的连续范围的一部分。 响应于对真实存储器的需要，基于多个保留期间所选保留的年龄，在多个保留内释放所选择的保留。

公开(公告)号：US07448037B2

公开(公告)日：2008-11-04

申请号：US10755878

申请日：2004-01-13

申请人： Ravi Kumar Arimilli ,  Randal Craig Swanberg

发明人： Ravi Kumar Arimilli ,  Randal Craig Swanberg

IPC分类号： G06F9/46 ,  G06F9/30

CPC分类号： G06F9/5011 ,  G06F2209/507

摘要： Software communicates to a processing unit a classification each of at least one schedulable software entity that the processing unit executes. A resource manager within the processing unit dynamically allocates hardware resources within the processing unit to the schedulable software entity during execution in accordance with the classification. The classification may be retrieved by the software from in data storage, and operating system software may schedule the schedulable software entity for execution by reference to the classification. The processing unit may also monitor, in hardware, execution of each of a plurality of schedulable software entities within the processing unit in accordance with a monitoring parameter set. The processing unit may then report to software the utilization of hardware resources by each of the plurality of schedulable software entities so that the software may develop or refine a classification for the schedulable software entity.

摘要翻译： 软件向处理单元传送处理单元执行的至少一个可调度软件实体的分类。 处理单元内的资源管理器根据分类在执行期间将处理单元内的硬件资源动态地分配给可调度软件实体。 分类可以由软件从数据存储中检索，并且操作系统软件可以通过参考分类来调度可调度的软件实体以供执行。 处理单元还可以根据监视参数集在硬件中监视处理单元内的多个可调度软件实体中的每一个的执行。 处理单元然后可以通过多个可调度软件实体中的每一个向软件报告硬件资源的利用，使得软件可以开发或改进可调度软件实体的分类。

公开(公告)号：US06918023B2

公开(公告)日：2005-07-12

申请号：US10262176

申请日：2002-09-30

申请人： Luke Matthew Browning ,  Bruce G. Mealey ,  Randal Craig Swanberg

发明人： Luke Matthew Browning ,  Bruce G. Mealey ,  Randal Craig Swanberg

IPC分类号： G06F12/00 ,  G06F12/10

CPC分类号： G06F12/1081

摘要： A system, method, and computer program product are disclosed for invalidating specified pretranslations maintained in a data processing system which maintains decentralized copies of pretranslations. A centralized mapping of virtual addresses to their associated physical addresses is established. The centralized mapping includes a listing of pretranslations of the virtual addresses to their associated physical addresses. Multiple lists of pretranslations are generated. Control of the lists may be passed from one entity to another, such that the lists are not owned by any particular entity. Each one of the lists includes a copy of pretranslations for virtual addresses. A particular one of the physical addresses is specified. Each list that includes a pretranslation of a virtual address to the specified physical addresses is located. The pretranslation of the virtual address to the specified physical address is then invalidated within each one of the lists.

摘要翻译： 公开了一种系统，方法和计算机程序产品，用于使数据处理系统中维护的指定的预翻译失效，该数据处理系统维护预翻译的分散副本。 建立虚拟地址与其相关物理地址的集中映射。 集中式映射包括虚拟地址与其相关联的物理地址的预翻译列表。 生成多个预翻译列表。 列表的控制可以从一个实体传递到另一个实体，使得列表不是由任何特定实体拥有的。 每个列表包括虚拟地址的预翻译副本。 指定了一个特定的物理地址。 每个包含虚拟地址到指定物理地址的转换的列表都位于。 然后虚拟地址到指定物理地址的预翻译在每个列表中无效。