公开(公告)号：US20090258290A1

公开(公告)日：2009-10-15

申请号：US12487877

申请日：2009-06-19

申请人： Sang Ho Lee ,  Sang-Do Heo

发明人： Sang Ho Lee ,  Sang-Do Heo

IPC分类号： H01M2/02

CPC分类号： H01M2/0275 ,  H01M2/021 ,  H01M2/0217 ,  H01M2/0267 ,  H01M2/0287 ,  H01M2/08 ,  H01M10/425 ,  H01M2200/106

摘要： The present invention is related to a pouch type lithium secondary battery. The pouch type lithium secondary battery according to the present invention may comprise an electrode assembly including a positive electrode, a separator and a negative electrode, and a pouch having a groove for receiving the electrode assembly and upper and lower portions of which are fused to each other around the groove to form flange-shaped edges. In particular, the edges may be at least partially covered at ends thereof with insulating material. As a result, a short circuit between a metal foil of the pouch and the negative electrode of the battery can be prevented, and corrosion of the battery may be also prevented.

摘要翻译： 本发明涉及袋型锂二次电池。 根据本发明的袋型锂二次电池可以包括包括正电极，隔膜和负电极的电极组件和具有用于容纳电极组件的槽的袋，其上部和下部与每个 其他围绕凹槽形成法兰形边。 特别地，边缘可以在其端部至少部分地用绝缘材料覆盖。 结果，可以防止袋的金属箔与电池的负极之间的短路，并且还可以防止电池的腐蚀。

公开(公告)号：US20090165987A1

公开(公告)日：2009-07-02

申请号：US12306216

申请日：2007-06-22

申请人： Jung Wook Cho ,  Hyun Seok Jeong ,  Jong Min Park ,  Goo Hwa Kim ,  Oh Duck Kwon ,  Joong Ki Park ,  Soo Kyu Lee ,  Sang Ho Lee ,  Ki Hyeon Moon

发明人： Jung Wook Cho ,  Hyun Seok Jeong ,  Jong Min Park ,  Goo Hwa Kim ,  Oh Duck Kwon ,  Joong Ki Park ,  Soo Kyu Lee ,  Sang Ho Lee ,  Ki Hyeon Moon

IPC分类号： B22D11/11

CPC分类号： B22D11/108 ,  B22D11/111 ,  B22D11/165

摘要： The present invention relates to a continuous casting machine and method using molten mold flux. The continuous casting machine includes a mold cover for covering an upper portion of a mold; a mold flux melting unit for melting mold flux to be supplied into the mold; and a mold flux delivery unit for supplying the mold with the molten mold flux melted in the mold flux melting unit, wherein the delivery unit includes an injection tube with one end connected to the mold flux melting unit and the other end positioned in the mold through the mold cover, and an injection tube heater for heating the injection tube. According to the present invention, since a slag bear continuous casting machine and method using molten mold flux is removed, a consumption of mold flux is greatly increased compared with a case of a conventional casting work, so that the friction between a mold and a solidified shell is reduced. As a result, an amount of scarfing of a cast piece is greatly reduced and no carbon pick-up occurs.

摘要翻译： 本发明涉及使用熔融熔渣的连续铸造机和方法。 连续铸造机包括用于覆盖模具的上部的模具盖; 用于熔化待供应到模具中的熔渣的熔模熔化单元; 以及模具通量输送单元，用于向模具供应在熔剂熔化单元中熔化的熔融熔渣，其中所述输送单元包括注射管，所述注射管的一端连接到模具熔剂单元，而另一端位于模具通过 模具盖和用于加热注射管的注射管加热器。 根据本发明，由于去除了渣渣连续铸造机和使用熔融模具助熔剂的方法，与常规铸造工艺相比，模具熔剂的消耗大大增加，使得模具和固化的模具之间的摩擦 壳减少。 结果，铸件的切割量大大降低，并且不会发生碳吸收。

公开(公告)号：US07412354B2

公开(公告)日：2008-08-12

申请号：US11410834

申请日：2006-04-26

申请人： Sang Ho Lee ,  Jang Keun Oh

发明人： Sang Ho Lee ,  Jang Keun Oh

IPC分类号： G06F15/00

CPC分类号： G06F11/3419 ,  G06F11/3423 ,  Y02D10/34

摘要： The present invention relates to a method for measuring a quantity of usage of a CPU, in particular to a method for measuring a quantity of usage of a CPU which is capable of getting a credible quantity of usage of a CPU without amending an algorithm in order to adapt it to the an operating system, e.g., MS-Windows System, or requiring a complicated code. The method uses various algorithms provided by the operating system on the behalf of a registry storing a quantity of usage of a CPU inside a system. Accordingly the present invention can measure a quantity of usage of a CPU easily without lowering a performance of the operating system.

摘要翻译： 本发明涉及一种用于测量CPU使用量的方法，特别涉及一种用于测量CPU使用量的方法，该方法能够获得CPU的可靠数量的使用量，而无需按顺序修改算法 以适应操作系统，例如MS-Windows系统，或需要复杂的代码。 该方法使用由操作系统提供的各种算法，代表存储系统内CPU使用量的注册表。 因此，本发明可以容易地测量CPU的使用量而不降低操作系统的性能。

公开(公告)号：US20080172663A1

公开(公告)日：2008-07-17

申请号：US11953191

申请日：2007-12-10

申请人： Sang Ho Lee

发明人： Sang Ho Lee

IPC分类号： G06F9/44 ,  G06F15/16

CPC分类号： H04L51/38

摘要： A method of displaying an attachment file list in a mobile communication terminal comprises receiving a message, selecting an attachment file list view menu in order to check entire attachment files comprised in the message, and extracting the attachment files comprised in the message and then displaying a list of the extracted attachment files.

摘要翻译： 一种在移动通信终端中显示附件文件列表的方法包括接收消息，选择附件文件列表视图菜单以便检查包含在消息中的整个附件文件，以及提取消息中包含的附件​​文件，然后显示 提取的附件文件列表。

公开(公告)号：US07203160B1

公开(公告)日：2007-04-10

申请号：US09666054

申请日：2000-09-20

申请人： Sang Ho Lee

发明人： Sang Ho Lee

IPC分类号： G01R31/08

CPC分类号： H04L43/0817

摘要： A duplexing control system and method of an ATM switching system capable of carrying out a stable switching of duplexing with a simple circuit construction is disclosed. The system has two boards respectively having a first interface matching with an input bus so as to interface received ATM cell, a second interface matching with an output bus so as to interface a transmitted ATM cell, an SAR for disassembling and assembling data units contained in an application layer in the transmitted/received ATM cell by a unit of ATM cell, a control section for controlling general operation in order to maintain the active state according to data processing information contained in a signal applied from the cell disassembling and assembling circuit, when the its own board is endowed with the active authority by the signal, and a DRAM for storing data transmitted/received for the switching of duplexing between the boards. The duplexing control system and method in an ATM system causes data processing information of one board and a duplexing authority to be formed into an ATM cell and to be transferred through a cell bus, so that a duplexing control can be stably carried out.

摘要翻译： 公开了一种能够以简单的电路结构实现双工的稳定切换的ATM交换系统的双工控制系统和方法。 该系统具有两个板，分别具有与输入总线匹配的第一接口，以便接收接收到的ATM信元，与输出总线匹配的第二接口，以便接收所发送的ATM信元，用于拆卸和组合包含在其中的数据单元 通过ATM信元单元发送/接收的ATM信元中的应用层，控制部分，用于控制一般操作，以便根据包含在从信元拆卸和组装电路施加的信号中的数据处理信息来保持活动状态，当时 其自己的板被信号赋予主动权限，以及用于存储用于在板之间切换双工的发送/接收数据的DRAM。 ATM系统中的双工控制系统和方法使一个电路板和双工部门的数据处理信息形成为一个ATM信元，并通过一个信元总线进行传输，从而可以稳定地进行双工控制。

公开(公告)号：USD527366S1

公开(公告)日：2006-08-29

申请号：US29224845

申请日：2005-03-09

申请人： Sang Ho Lee

设计人： Sang Ho Lee

公开(公告)号：US5966420A

公开(公告)日：1999-10-12

申请号：US908571

申请日：1997-08-08

申请人： Sang Ho Lee

发明人： Sang Ho Lee

IPC分类号： G11C11/413 ,  H03K21/00

CPC分类号： H03K21/00

摘要： A counter circuit uses a plurality of counter circuits so as to be used in all products employing a counter circuit in a semiconductor device, and thereby performs a multi-bit linear burst sequence operation. The counter circuit for embodying a linear burst sequence includes: a low order counting means which responds to an external clock signal and an external counting control signal, receives and counts a least significant first bit data among base input signals having bits ranging from a first bit to a N-th bit, and then generates a first data signal and a first high order control signal; and a plurality of high order counting means which receive bits ranging from a second bit successively connected to the least significant first bit to N-th bit, perform a counting operation, and generate a second data signal and a second high order control signal. The high order counting means which responds to the high order control signal and the counting control signal which are generated from the high order counting means of a previous bit of a present input bit, performs a counting operation, and outputs data signal.

摘要翻译： 计数器电路使用多个计数器电路，以便在半导体器件中采用计数器电路的所有产品中使用，从而执行多位线性突发序列操作。 用于实现线性突发序列的计数器电路包括：响应于外部时钟信号的一个低阶计数装置和一个外部计数控制信号，在基本输入信号中接收和计数最低有效的第一位数据，该基本输入信号具有从第一位 到第N位，然后产生第一数据信号和第一高阶控制信号; 以及多个高阶计数装置，其接收从连续连接到最低有效第一比特到第N比特的第二比特的比特，执行计数操作，并产生第二数据信号和第二高阶控制信号。 响应于从当前输入位的先前位的高位计数装置产生的高阶控制信号和计数控制信号的高阶计数装置执行计数操作，并输出数据信号。

公开(公告)号：US5877988A

公开(公告)日：1999-03-02

申请号：US901433

申请日：1997-07-25

申请人： Jae Kwang Shim ,  Sang Ho Lee

发明人： Jae Kwang Shim ,  Sang Ho Lee

IPC分类号： G06F12/16 ,  G11C7/00 ,  G11C7/10 ,  G11C7/22 ,  G11C11/407 ,  G11C11/408 ,  G11C11/409 ,  G11C16/04

CPC分类号： G11C7/1078 ,  G11C7/22

摘要： A write error preventing circuit for a semiconductor memory device prevents an erroneous reading operation an input buffer compares an externally applied write enable signal to an effective level signal, which is preset therein. A write error preventive circuit outputs a disable signal to the input buffer during an interval of time when a ground voltage bounces in accordance with an internal output signal from a NAND gate of an output buffer. The circuit prevents the outputting of a write signal from the input buffer during a read operation in accordance with the internal output signal from the output buffer when the ground voltage bounces.

摘要翻译： 用于半导体存储器件的写入错误防止电路防止错误读取操作，输入缓冲器将外部施加的写使能信号与其中预设的有效电平信号进行比较。 写入错误防止电路在接地电压根据来自输出缓冲器的与非门的内部输出信号反弹的时间间隔期间向输入缓冲器输出禁止信号。 当接地电压反弹时，该电路根据来自输出缓冲器的内部输出信号，在读取操作期间防止从输入缓冲器输出写入信号。

公开(公告)号：US5798240A

公开(公告)日：1998-08-25

申请号：US584226

申请日：1996-01-11

申请人： Susan A. Martinis ,  Mandana Sassanfar ,  Sunghoon Kim ,  Sang Ho Lee ,  Paul R. Schimmel

发明人： Susan A. Martinis ,  Mandana Sassanfar ,  Sunghoon Kim ,  Sang Ho Lee ,  Paul R. Schimmel

IPC分类号： A61K38/00 ,  C12N9/00 ,  C07H21/04 ,  C12N1/20 ,  C12N15/00

CPC分类号： C12N9/93 ,  A61K38/00 ,  Y10S435/863

摘要： Isolated and/or recombinant nucleic acids encoding mycobacterial methionyl-tRNA synthetase have been characterized. Recombinant DNA constructs and vectors having a sequence which encodes mycobacterial methionyl-tRNA synthetase have been made, and can be used for the construction of tester strains as well as for the production of isolated and/or recombinant methionyl-tRNA synthetases. These enzymes or portions thereof are useful in the biochemical separation of methionine and quantification of methionine or ATP, and for producing antibodies useful in the purification and study of the enzyme, for example. Host cells and methods useful for producing recombinant mycobacterial methionyl-tRNA synthetases are described, as are tester strains, which are cells engineered to rely on the function of the tRNA synthetase encoded by an introduced cloned gene. Tester strains can be used to identify inhibitors of the essential tRNA synthetase enzyme encoded by the introduced cloned gene, and thus provide a means to assess the antimicrobial effect and specificity of the inhibitor without employing slow-growing, pathogenic strains of mycobacteria, such as Mycobacterium tuberculosis.

摘要翻译： 已经表征了编码分枝杆菌甲硫氨酰-tRNA合成酶的分离和/或重组核酸。 已经制备了具有编码分枝杆菌甲硫氨酰-tRNA合成酶的序列的重组DNA构建体和载体，并且可用于构建测试菌株以及用于分离和/或重组甲硫氨酰-tRNA合成酶的产生。 这些酶或其部分可用于甲硫氨酸的生物化学分离和甲硫氨酸或ATP的定量，以及用于产生用于纯化和研究酶的抗体。 描述了可用于产生重组分枝杆菌甲硫氨酰-tRNA合成酶的宿主细胞和方法，试验菌株是被依赖于引入的克隆基因编码的tRNA合成酶的功能而被工程化的细胞。 测试菌株可以用于鉴定由引入的克隆基因编码的必需tRNA合成酶的抑制剂，并且因此提供了评估抑制剂的抗微生物效果和特异性的方法，而不使用分枝杆菌的缓慢生长的致病菌株，例如分枝杆菌 结核。

公开(公告)号：US5689464A

公开(公告)日：1997-11-18

申请号：US600599

申请日：1994-04-19

申请人： Jong Seuk Lee ,  Seung Min Kim ,  Jae Hyeoung Kim ,  Sang Ho Lee

发明人： Jong Seuk Lee ,  Seung Min Kim ,  Jae Hyeoung Kim ,  Sang Ho Lee

IPC分类号： G11C11/413 ,  G11C29/00 ,  G11C29/04 ,  G11C7/00

CPC分类号： G11C29/812 ,  G11C29/846

摘要： A column repair circuit for a semiconductor memory having an input/output selection circuit for inputting a control signal, selecting a bit line and a bit bar line corresponding to a faulty memory cell and replacing the selected bit line and bit bar line with a spare bit line and a spare bit bar line. The input/output selection circuit includes an input stage for inputting the control signal, a spare bit line and a spare bit bar line, and a plurality of fuses each having one side connected to the input stage and other side connected to a plurality of resistors. The other side of the resistors are connected to ground for outputting the output signals. The input/output selection circuit further has a plurality of n-channel MOSFETs each including a gate connected to each of the other stages of the plurality of fuses via the resistors in a 2 to 1 manner for inputting the output signals. The drains of the MOSFETS are connected to the spare bit line and spare bit bar line and their sources are connected to each of the plurality of data bit lines and the plurality of data bit bar lines for functioning as a switch. Therefore, the present invention can provide the column repair circuit for a semiconductor memory which is capable of increasing its repair yield by adding the input/output selecting circuit enabling input/output selecting.

摘要翻译： 一种用于半导体存储器的列修复电路，具有用于输入控制信号的输入/输出选择电路，选择与故障存储器单元相对应的位线和位线，并用备用位替换所选位线和位线 线和备用位线。 输入/输出选择电路包括用于输入控制信号的输入级，备用位线和备用位线条，以及多个熔丝，每个熔丝具有连接到输入级的一侧和连接到多个电阻器的另一侧 。 电阻的另一侧连接到地，用于输出输出信号。 所述输入/输出选择电路还具有多个n沟道MOSFET，每个n沟道MOSFET包括通过所述电阻器以多个熔丝连接到所述多个熔丝中的每一个的栅极，以2:1的方式输入所述输出信号。 MOSFETS的漏极连接到备用位线和备用位线，并且它们的源极连接到用作开关的多个数据位线和多个数据位线中的每一个。 因此，本发明可以提供半导体存储器的列修复电路，该半导体存储器能够通过添加能够进行输入/输出选择的输入/输出选择电路来提高其修复产率。