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公开(公告)号：US5526393A
公开(公告)日：1996-06-11
申请号：US405152
申请日：1995-03-16
申请人： Mitsuaki Kondo , Takamoto Watanabe
发明人： Mitsuaki Kondo , Takamoto Watanabe
CPC分类号： H03K23/50
摘要： A synchronous counter comprises one D flip-flop circuit for performing divide-by-2 frequency division of a clock signal CK, JK flip-flop circuits for, when input signals have HIGH levels (logical value 1), inverting the levels of the output signals in synchronization with the clock signal CK, logic circuits for inputting control signals to the JK flip-flop circuits, lower-stage signal assembling circuits for grouping the output signals from the JK flip-flop circuits into two-signal-unit groups to produce logical product signals of the signals in these two,signal-unit groups, and upper-stage signal assembling circuits for further handling the output signals from the lower-stage signal assembling circuits, thereby firstly simultaneously satisfying an increase in speed of the counting operation as well as simplification of the wiring pattern and reduction in the circuit area and secondly realizing further increase in the counting operation.
摘要翻译： 同步计数器包括一个D触发器电路，用于在输入信号具有高电平（逻辑值1）时执行时钟信号CK的二分频分频，JK触发器电路，使输出的电平反相 与时钟信号CK同步的信号，用于向JK触发器电路输入控制信号的逻辑电路，用于将来自JK触发器电路的输出信号分组为双信号单元组的下级信号组合电路，以产生 这两个信号单元组中的信号的逻辑积信号和用于进一步处理来自下级信号组合电路的输出信号的上级信号组合电路，从而首先同时满足计数操作的速度增加，如 以及布线图案的简化和电路面积的缩小，二次实现计数操作的进一步增加。
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72.发明授权Magnetic detecting circuit having magnetoresistance effective elements oriented in at least two different directions 失效具有在至少两个不同方向上取向的磁阻有效元件的磁检测电路
公开(公告)号：US5359287A
公开(公告)日：1994-10-25
申请号：US89610
申请日：1993-07-12
摘要： A magnetic detecting circuit has a magneto resistance element which converts a change of magnetism detected into a signal. A plurality of these magneto resistive elements are provided on a plane, and are oriented on the plane in two opposite directions having angles, relative to a bias direction, having substantially equal absolute values. The placement in opposite directions allows the resistance values from the elements to change in approximately the same direction as the object moves, to allow a monotonic change in the bias magnetic field. The change of the bias magnetic field can be detected from the change of resistance values of the magneto resistive elements.
摘要翻译： 磁检测电路具有将检测到的磁性变化转换为信号的磁阻元件。 多个这样的磁阻元件设置在平面上，并且在两个相反的方向上在平面上取向，该角度相对于偏置方向具有基本相等的绝对值。 沿相反方向的放置允许来自元件的电阻值与物体移动大致相同的方向改变，以允许偏置磁场中的单调变化。 可以从磁阻元件的电阻值的变化来检测偏置磁场的变化。
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公开(公告)号：US08316710B2
公开(公告)日：2012-11-27
申请号：US12587555
申请日：2009-10-08
CPC分类号： G05D3/12
摘要： The physical quantity measuring apparatus includes a first function of generating voltage used for position-controlling a movable body, a second function of detecting a position of the movable body during a position detecting period, a third function of calculating a control amount necessary to keep the movable body at a predetermined position on the basis of a detection result by the second function, and causing the first function to generate a control voltage corresponding to the calculated control amount to keep the movable body at the predetermined position during a position controlling period, and a fourth function of setting the position detecting period and the position controlling period in a time-sharing manner so that the position detecting period and the position controlling period do not overlap with each other.
摘要翻译： 物理量测量装置包括产生用于位置控制可移动体的电压的第一功能，在位置检测期间检测可移动体的位置的第二功能，计算保持所述可移动体所需的控制量的第三功能 基于第二功能的检测结果在预定位置处的移动体，并且使第一功能产生与计算出的控制量对应的控制电压，以在位置控制期间将移动体保持在预定位置，以及 以分时方式设定位置检测期间和位置控制期间的第四功能，使得位置检测期间和位置控制期间彼此不重叠。
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公开(公告)号：US20100149016A1
公开(公告)日：2010-06-17
申请号：US12653186
申请日：2009-12-09
申请人： Takamoto Watanabe
发明人： Takamoto Watanabe
CPC分类号： H03M1/0845 , H03M1/145 , H03M1/502 , H03M1/60
摘要： The pulse delay circuit includes a plurality of delay units connected in series or in a ring, each of the delay units being constituted of at least one inverter gate circuit grounded to a ground line, and configured to delay a pulse signal passing therethrough by a delay time thereof depending on an input signal applied thereto, and a capacitor connected between a signal line through which the voltage signal is applied to each of the delay units and the ground line. The capacitor serves as a current source to supply a current which each of the delay units consumes to invert a state thereof.
摘要翻译： 脉冲延迟电路包括串联或环形连接的多个延迟单元，每个延迟单元由至少一个接地到地线的反相器门电路构成，并且被配置为延迟通过其中的脉冲信号延迟 取决于施加到其上的输入信号的时间，以及连接在电压信号被施加到每个延迟单元和接地线的信号线之间的电容器。 电容器用作电流源，以提供每个延迟单元消耗的电流来反转其状态。
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公开(公告)号：US07660369B2
公开(公告)日：2010-02-09
申请号：US11699576
申请日：2007-01-30
申请人： Takamoto Watanabe , Sumio Masuda
发明人： Takamoto Watanabe , Sumio Masuda
IPC分类号： H03D3/22
CPC分类号： H04L27/066 , G04R20/12 , H04L2027/003 , H04L2027/0046
摘要： In a radio-controlled device for measuring time, a demodulating unit demodulates the time information from the received electric signal based on amplitude information of the target radio wave. The amplitude information is obtained from in-phase and quadrature-phase components of the target radio wave. A phase calculator calculates phase data associated with a phase of the target radio wave based on the in-phase and quadrature-phase components. A variability calculator calculates a variability of the phase data of the target radio wave relative to a reference phase. The reference phase changes at a constant rate in time according to a frequency error. The frequency error is contained in the reference signal relative to a frequency of the target carrier wave. A reception determining unit determines whether reception of the radio-controlled device is good based on the calculated variability.
摘要翻译： 在用于测量时间的无线电控制装置中，解调单元基于目标无线电波的振幅信息来解调来自接收到的电信号的时间信息。 振幅信息从目标无线电波的同相和正交相位分量获得。 相位计算器基于同相和正交相位分量来计算与目标无线电波的相位相关联的相位数据。 可变性计算器计算目标无线电波相对于参考相位的相位数据的可变性。 参考相位根据频率误差以恒定的速率变化。 相对于目标载波的频率，参考信号中包含频率误差。 接收确定单元基于所计算的可变性来确定无线电控制设备的接收是否良好。
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公开(公告)号：US07545887B2
公开(公告)日：2009-06-09
申请号：US10926286
申请日：2004-08-26
IPC分类号： H04L27/00
CPC分类号： H04L27/00
摘要： In a synchronous detection method, an input signal is averaged over at least first and second phase ranges of a target carrier wave within each period thereof to obtain at least first and second moving average values of the input signal within the at least first and second phase ranges, respectively. The first phase range corresponds to a positively oscillating phase range of the target carrier wave, and the second phase range corresponds to a negatively oscillating phase range thereof. A difference between the first and second moving averages is calculated as a detection result of the target carrier wave.
摘要翻译： 在同步检测方法中，输入信号在其每个周期内的目标载波的至少第一和第二相位范围上进行平均，以在至少第一和第二阶段内获得输入信号的至少第一和第二移动平均值 范围。 第一相位范围对应于目标载波的正振荡相位范围，第二相位范围对应于其负振荡相位范围。 计算第一和第二移动平均值之间的差异作为目标载波的检测结果。
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公开(公告)号：US07450049B2
公开(公告)日：2008-11-11
申请号：US11803392
申请日：2007-05-14
IPC分类号： H03M1/60
摘要： The digitization apparatus includes, as a main scale, a pulse delay circuit constituted by a plurality of delay units connected in series or in ring form, a latch/encoder, a circulation number counter, and a latch circuit, and includes, as a vernier, a reverse timing extraction circuit detecting a reverse timing at which any one of the delay units has reversed, and an interpolation circuit. The main scale digitizes a time interval between two successive measurement signals in a resolution equal to a delay time per one delay unit. The vernier digitizes a time difference between a measurement timing indicated by the measurement signal and the reverse timing in a resolution equal to 1/M (M being an integer not smaller than 2). The interpolation circuit includes two delay lines each constituted by a plurality of delay units connected in series or in ring form.
摘要翻译： 数字化装置包括作为主要尺度的由串联或环形连接的多个延迟单元，锁存/编码器，循环号计数器和锁存电路构成的脉冲延迟电路，并且包括作为游标 检测任一个延迟单元已经反转的反向定时的反向定时提取电路和内插电路。 主比例数字化两个连续的测量信号之间的时间间隔，其分辨率等于每个延迟单元的延迟时间。 游标数字化测量信号所示的测量定时与反向定时之间的时差，其分辨率等于1 / M（M为不小于2的整数）。 插补电路包括两个延迟线，每条延迟线由串联或环形连接的多个延迟单元构成。
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公开(公告)号：US07345614B2
公开(公告)日：2008-03-18
申请号：US11586653
申请日：2006-10-26
申请人： Yasuaki Makino , Noboru Endo , Takamoto Watanabe , Mitsuharu Kato
发明人： Yasuaki Makino , Noboru Endo , Takamoto Watanabe , Mitsuharu Kato
IPC分类号： H03M1/60
CPC分类号： H03M1/0836 , G04F10/005 , H03M1/14 , H03M1/502 , H03M1/60
摘要： An A/D converter has inverting elements and delay elements alternately disposed in series. Each inverting element receives an analog voltage signal as a power source and converts a pulse signal in an inversion operation time depending on the analog voltage signal. Each delay element delays transmission of the pulse signal. The transmission of the pulse signal is started from a starting inverting element at a start time, and a transit position of the pulse signal is detected at a detection time later than the start time by a predetermined time. A digital value indicating a level of the analog voltage signal is determined from the detected transit position of the pulse signal. Because transmission of the pulse signal is delayed by the delay elements, the transit position depending on the analog voltage signal can be correctly detected.
摘要翻译： A / D转换器具有交替设置的反相元件和延迟元件。 每个反相元件接收模拟电压信号作为电源，并根据模拟电压信号在反转操作时间中转换脉冲信号。 每个延迟元件延迟脉冲信号的传输。 脉冲信号的发送在开始时从启动反转元件开始，并且在比开始时间晚一个预定时间的检测时间检测脉冲信号的转接位置。 从检测到的脉冲信号的转接位置确定表示模拟电压信号的电平的数字值。 由于脉冲信号的传输被延迟元件延迟，所以可以正确地检测取决于模拟电压信号的传输位置。
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公开(公告)号：US20070280054A1
公开(公告)日：2007-12-06
申请号：US11807712
申请日：2007-05-30
申请人： Takamoto Watanabe
发明人： Takamoto Watanabe
IPC分类号： G04F10/00
CPC分类号： G04F10/00
摘要： In a time measuring circuit, a pulse delay circuit is provided with a plurality of delay units. The pulse delay circuit is configured to transfer a pulse signal through the plurality of delay units while the pulse signal is delayed by the plurality of delay units. A delay time of each of the plurality of delay units depends on a level of a first drive voltage being input to each of the plurality of delay units. A generating circuit is configured to obtain a number of the delay units through which the pulse signal has passed within a predetermined period to generate, as time measurement data, digital data based on the obtained number. A first setting unit is configured to variably set the level of the first drive voltage being input to each of the plurality of delay units.
摘要翻译： 在时间测量电路中，脉冲延迟电路具有多个延迟单元。 脉冲延迟电路被配置为在脉冲信号被多个延迟单元延迟的同时通过多个延迟单元传送脉冲信号。 多个延迟单元中的每一个的延迟时间取决于输入到多个延迟单元中的每一个的第一驱动电压的电平。 发电电路被配置为获得脉冲信号在预定时间段内通过的多个延迟单元，作为时间测量数据生成基于获得的数量的数字数据。 第一设置单元被配置为可变地设置输入到多个延迟单元中的每一个的第一驱动电压的电平。
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公开(公告)号：US20070263732A1
公开(公告)日：2007-11-15
申请号：US11803392
申请日：2007-05-14
IPC分类号： H04B14/04
摘要： The digitization apparatus includes, as a main scale, a pulse delay circuit constituted by a plurality of delay units connected in series or in ring form, a latch/encoder, a circulation number counter, and a latch circuit, and includes, as a vernier, a reverse timing extraction circuit detecting a reverse timing at which any one of the delay units has reversed, and an interpolation circuit. The main scale digitizes a time interval between two successive measurement signals in a resolution equal to a delay time per one delay unit. The vernier digitizes a time difference between a measurement timing indicated by the measurement signal and the reverse timing in a resolution equal to 1/M (M being an integer not smaller than 2). The interpolation circuit includes two delay lines each constituted by a plurality of delay units connected in series or in ring form.
摘要翻译： 数字化装置包括作为主要尺度的由串联或环形连接的多个延迟单元，锁存/编码器，循环号计数器和锁存电路构成的脉冲延迟电路，并且包括作为游标 检测任一个延迟单元已经反转的反向定时的反向定时提取电路和内插电路。 主比例数字化两个连续的测量信号之间的时间间隔，其分辨率等于每个延迟单元的延迟时间。 游标数字化测量信号所示的测量定时与反向定时之间的时差，其分辨率等于1 / M（M为不小于2的整数）。 插补电路包括两个延迟线，每条延迟线由串联或环形连接的多个延迟单元构成。
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