公开(公告)号：US07685257B2

公开(公告)日：2010-03-23

申请号：US10704939

申请日：2003-11-10

Applicant: James E. King ,  Karen E. Roles

Inventor： James E. King ,  Karen E. Roles

IPC: G06F15/16

CPC classification number: H04L29/06 ,  H04L67/14 ,  H04L69/329 ,  H04W4/00 ,  H04W88/02

Abstract: A system and method is provided for designing (or re-architecting) a personal digital assistant (PDA) as a portable thin client of a network. The portable thin client is a small, stateless, “plug and work” computer whose main function is to process all input and output for the user, as well as to manage communication with at least one server. All other computational tasks (or services) for the user of the PDA are performed on the server which is shared amongst a community of thin clients. As a result of re-architecting the PDA as a portable thin client, there is no need to download application(s) and operating system(s) running the application(s) to the PDA because the server—through the network—provides these services. In addition, no data is lost when a PDA is faulty or has to be changed. Moreover, in one embodiment, the portable thin client (or thin client PDA) includes smart card capabilities so that an enterprise (or business organization) can pool its PDAs with the users of the PDA on a need-to-use basis.

Abstract translation: 提供了一种用于将个人数字助理（PDA）设计（或重新构建）为网络的便携式瘦客户端的系统和方法。 便携式瘦客户机是一种小型，无状态的“插件和工作”计算机，其主要功能是处理用户的所有输入和输出，以及管理与至少一个服务器的通信。 PDA用户的所有其他计算任务（或服务）在瘦客户端社区之间共享的服务器上执行。 作为将PDA重新构建为便携式瘦客户端的结果，不需要将运行应用的应用程序和操作系统下载到PDA，因为服务器通过网络提供这些 服务。 此外，当PDA出现故障或必须更改时，不会丢失任何数据。 此外，在一个实施例中，便携式瘦客户端（或瘦客户端PDA）包括智能卡功能，使得企业（或商业组织）能够在需要使用的基础上与PDA的用户集合其PDA。

公开(公告)号：US20100070210A1

公开(公告)日：2010-03-18

申请号：US12209745

申请日：2008-09-12

Applicant: Aleksey M. Urmanov ,  Anton A. Bougaev ,  David K. McElfresh

Inventor： Aleksey M. Urmanov ,  Anton A. Bougaev ,  David K. McElfresh

IPC: G06F19/00

CPC classification number: G06F11/3058 ,  G06F11/3034 ,  G06F11/3409

Abstract: Some embodiments of the present invention provide a system that detects the presence of constrained motion in one or more components in a computer system. First, a vibrational spectrum of the computer system is monitored while the computer system operates. Then, the vibrational spectrum is analyzed using a pattern-recognition model to detect constrained motion in one or more components in the computer system, wherein the pattern-recognition model classifies the vibrational spectrum as indicating constrained motion or as not indicating constrained motion.

Abstract translation: 本发明的一些实施例提供了一种在计算机系统中的一个或多个组件中检测约束运动的存在的系统。 首先，在计算机系统运行时监视计算机系统的振动频谱。 然后，使用模式识别模型分析振动频谱，以检测计算机系统中的一个或多个组件中的约束运动，其中模式识别模型将振动频谱分类为指示约束运动或不指示受限运动。

公开(公告)号：US07680989B2

公开(公告)日：2010-03-16

申请号：US11465383

申请日：2006-08-17

Applicant: Mark S. Moir ,  Robert E. Cypher ,  Paul N. Loewenstein

Inventor： Mark S. Moir ,  Robert E. Cypher ,  Paul N. Loewenstein

IPC: G06F13/00

CPC classification number: G06F9/3834 ,  G06F9/3004 ,  G06F9/30072 ,  G06F9/30087 ,  G06F9/30094 ,  G06F9/3861 ,  G06F12/0815

Abstract: We propose a class of mechanisms to support a new style of synchronization that offers simple and efficient solutions to several existing problems for which existing solutions are complicated, expensive, and/or otherwise inadequate. In general, the proposed mechanisms allow a program to read from a first memory location (called the “flagged” location), and to then continue execution, storing values to zero or more other memory locations such that these stores take effect (i.e., become visible in the memory system) only while the flagged memory location does not change. In some embodiments, the mechanisms further allow the program to determine when the first memory location has changed. We call the proposed mechanisms conditional multi-store synchronization mechanisms and define aspects of an instruction set architecture consistent therewith.

Abstract translation: 我们提出一类机制来支持新的同步风格，为现有解决方案复杂，昂贵和/或其他不足的现有问题提供简单而有效的解决方案。 通常，所提出的机制允许程序从第一存储器位置（称为“标记的”位置）读取，然后继续执行，将值存储到零个或多个其他存储器位置，使得这些存储器生效（即，变为 只有当标记的存储器位置不改变时，才能在存储器系统中可见） 在一些实施例中，机制还允许程序确定第一存储器位置何时改变。 我们将所提出的机制称为条件多存储同步机制，并且定义与其一致的指令集架构的方面。

公开(公告)号：US07680986B1

公开(公告)日：2010-03-16

申请号：US11026849

申请日：2004-12-30

Applicant: Mark S. Moir ,  Simon Doherty ,  Victor M. Luchangco ,  Maurice P. Herlihy

Inventor： Mark S. Moir ,  Simon Doherty ,  Victor M. Luchangco ,  Maurice P. Herlihy

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC classification number: G06F9/52

Abstract: Many conventional lock-free data structures exploit techniques that are possible only because state-of-the-art 64-bit processors are still running 32-bit operating systems and applications. As software catches up to hardware, “64-bit-clean” lock-free data structures, which cannot use such techniques, are needed. We present several 64-bit-clean lock-free implementations: including load-linked/store conditional variables of arbitrary size, a FIFO queue, and a freelist. In addition to being portable to 64-bit software (or more generally full-architectural-width pointer operations), our implementations also improve on existing techniques in that they are (or can be) space-adaptive and do not require a priori knowledge of the number of threads that will access them.

Abstract translation: 许多传统的无锁数据结构利用了仅仅因为最先进的64位处理器仍在运行32位操作系统和应用程序而可能的技术。 随着软件的升级，硬件需要“64位清理”的无锁数据结构，不能使用这种技术。 我们提出了几个64位无干扰的无锁实现：包括任意大小的加载链接/存储条件变量，FIFO队列和freelist。 除了可移植到64位软件（或更通常的全架构宽度指针操作）之外，我们的实现还改进了现有技术，因为它们（或可以）是空间自适应的，并且不需要先验知识 将访问它们的线程数。

公开(公告)号：US07680142B1

公开(公告)日：2010-03-16

申请号：US10843193

申请日：2004-05-11

Applicant: Knut Tvete ,  Hans Rygh ,  Bjorn Dag Johnsen

Inventor： Knut Tvete ,  Hans Rygh ,  Bjorn Dag Johnsen

IPC: H04L12/54 ,  H04J3/02

CPC classification number: H04L45/00

Abstract: A communications chip having a plurality of ports. Each port is provided with an interface for attachment to an external communications facility to exchange data traffic. There is also a switching matrix for routing data traffic on the chip between the ports. The chip further includes a plurality of logic analyzers. Each logic analyzer is associated with a corresponding one of the ports. Each logic analyzers is operable to monitor data traffic passing through its corresponding port and to trigger on one or more predetermined conditions relating to the monitored data traffic. The chip further includes a control interface to allow reconfiguration of the predetermined conditions for at least one of the logic analyzers.

Abstract translation: 一种具有多个端口的通信芯片。 每个端口设置有用于附接到外部通信设备以交换数据业务的接口。 还有一个用于在端口之间的芯片上路由数据业务的交换矩阵。 芯片还包括多个逻辑分析器。 每个逻辑分析仪与相应的一个端口相关联。 每个逻辑分析器可操作以监视通过其对应端口的数据流量并且在与所监视的数据业务相关的一个或多个预定条件下触发。 该芯片还包括控制接口，以允许为至少一个逻辑分析器重新配置预定条件。

公开(公告)号：US07676729B2

公开(公告)日：2010-03-09

申请号：US11508758

申请日：2006-08-23

Applicant: Charles Cheng ,  Robert E. Cypher ,  Michael W. Parkin

Inventor： Charles Cheng ,  Robert E. Cypher ,  Michael W. Parkin

IPC: G11C29/00

CPC classification number: G11C5/04 ,  G11C2029/0411

Abstract: A memory controller, system, and methods are disclosed. The system comprises a memory controller interconnected to a plurality of memory chips. Each memory chip stores data at a plurality of locations. The memory controller performs a sparing transaction comprising reading data from a given location of one or more of the memory chips including a first memory chip, writing the data to a given location of one or more of the memory chips including a second memory chip, wherein during writing, data from the first memory chip is written to the second memory chip, and allowing additional memory transactions directed to the memory chips between the start of reading and the end of writing unless the additional memory transaction is targeted to the given location. In a further embodiment, the sparing transaction comprises correcting errors in the data before writing the data.

Abstract translation: 公开了一种存储器控制器，系统和方法。 该系统包括互连到多个存储器芯片的存储器控​​制器。 每个存储器芯片在多个位置存储数据。 存储器控制器执行备用事务，包括从包括第一存储器芯片的一个或多个存储器芯片的给定位置读取数据，将数据写入包括第二存储器芯片的一个或多个存储器芯片的给定位置，其中 在写入期间，来自第一存储器芯片的数据被写入第二存储器芯片，并且允许在读取开始和写入结束之间指向存储器芯片的附加存储器事务，除非额外的存储器事务被定位到给定位置。 在另一个实施例中，备用事务包括在写入数据之前校正数据中的错误。

公开(公告)号：US07676511B2

公开(公告)日：2010-03-09

申请号：US11340940

申请日：2006-01-27

Applicant: Antonios Printezis ,  David L. Detlefs ,  Fabio Rojas

Inventor： Antonios Printezis ,  David L. Detlefs ,  Fabio Rojas

IPC: G06F17/30

CPC classification number: G06F12/0276

Abstract: In some circumstances a generational garbage collector may be made more efficient by “pre-tenuring” objects or directly allocating new objects in an old generation instead of allocating them in the normal fashion in a young generation. A pre-tenuring decision is made by a two step process. In the first step, during a young-generation collection, an execution frequency is determined for each allocation site and sites with the highest execution frequency are selected as candidate sites. In the second step, during a subsequent young-generation collection, the survival rates are determined for the candidate sites. After this, objects allocated from sites with sufficiently high survival rates are allocated directly in the old generation.

Abstract translation: 在某些情况下，世代垃圾收集器可以通过“预置换”对象或直接分配新的对象，而不是以年轻一代中的正常方式分配，从而更有效率。 通过两步过程进行了一项前期终身决定。 第一步，在年轻一代的收集中，为每个分配站点确定执行频率，并选择具有最高执行频率的站点作为候选站点。 在第二步，在随后的年轻一代收集中，确定候选地点的存活率。 之后，从具有足够高存活率的地点分配的物品直接分配给老一代。

公开(公告)号：US07675163B2

公开(公告)日：2010-03-09

申请号：US11726302

申请日：2007-03-21

Applicant: Ali Heydari ,  Chien Ouyang

Inventor： Ali Heydari ,  Chien Ouyang

IPC: H01L23/12

CPC classification number: H01L23/473 ,  H01L23/42 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2224/0401

Abstract: A system for cooling a semiconductor device is disclosed. The system includes a lid encasing the semiconductor device, a first plurality of carbon nanotubes disposed within the lid, and a fluid system configured to pass a fluid through the lid. Furthermore, a second system for cooling a semiconductor device is disclosed. The second system includes a lid, a first plurality of carbon nanotubes disposed within the lid, and a fluid system configured to pass a fluid through the lid. The lid is configured to be mounted over and encase the semiconductor device. Additionally, a method for cooling a semiconductor device is disclosed. The method includes disposing a first plurality of carbon nanotubes within a lid, mounting the lid over the semiconductor device, and passing a fluid through the lid.

Abstract translation: 公开了一种用于冷却半导体器件的系统。 该系统包括封装半导体器件的盖子，设置在盖子内的第一多个碳纳米管和配置成使流体通过盖子的流体系统。 此外，公开了一种用于冷却半导体器件的第二系统。 第二系统包括盖子，布置在盖子内的第一多个碳纳米管和被配置为使流体通过盖子的流体系统。 盖被配置成安装在半导体器件上并包围半导体器件。 另外，公开了一种用于冷却半导体器件的方法。 该方法包括将第一多个碳纳米管设置在盖内，将盖安装在半导体器件上，并使流体通过盖子。

公开(公告)号：US20100058092A1

公开(公告)日：2010-03-04

申请号：US12200775

申请日：2008-08-28

Applicant: Anton A. Bougaev ,  Aleksey M. Urmanov ,  Kenny C. Gross

Inventor： Anton A. Bougaev ,  Aleksey M. Urmanov ,  Kenny C. Gross

IPC: G06F1/28

CPC classification number: G06F11/3062 ,  G06F1/28 ,  G06F11/3006

Abstract: Some embodiments of the present invention provide a system that controls a device that characterizes the health of a computer system power supply. During operation, a signature for the power supply is generated based on measurements of a set of performance parameters for the power supply. Then, the health of the power supply is characterized based on a comparison between the signature for the power supply and signatures for one or more other power supplies.

Abstract translation: 本发明的一些实施例提供一种系统，其控制表征计算机系统电源的健康状况的装置。 在操作期间，基于用于电源的一组性能参数的测量来生成电源的签名。 然后，基于电源的签名与一个或多个其他电源的签名之间的比较来表征电源的健康状况。

公开(公告)号：US20100057383A1

公开(公告)日：2010-03-04

申请号：US12204124

申请日：2008-09-04

Applicant: Kenny C. Gross ,  Aleksey M. Urmanov ,  Anton A. Bougaev

Inventor： Kenny C. Gross ,  Aleksey M. Urmanov ,  Anton A. Bougaev

IPC: G06F19/00

CPC classification number: G01M7/025 ,  G01M7/027

Abstract: Some embodiments of the present invention provide a system that generates a composite vibration profile in a frequency range for a computer system. First, a vibration spectrum in the frequency range is measured for a test computer system in each configuration in a set of configurations. Then, the composite vibration profile for the computer system is generated based on the measured vibration spectra.

Abstract translation: 本发明的一些实施例提供一种在计算机系统的频率范围内产生复合振动分布的系统。 首先，在一组配置中，针对每个配置中的测试计算机系统测量频率范围内的振动频谱。 然后，计算机系统的复合振动曲线基于测得的振动谱产生。