Transmitting apparatus, receiving apparatus, and communication system for formatting data
    71.
    发明授权
    Transmitting apparatus, receiving apparatus, and communication system for formatting data 有权
    发送设备,接收设备和用于格式化数据的通信系统

    公开(公告)号:US07983140B2

    公开(公告)日:2011-07-19

    申请号:US11004256

    申请日:2004-12-03

    IPC分类号: H04J9/00 H04J11/00 H04B15/00

    摘要: A transmitting apparatus, a receiving apparatus, and a communication system are provided that allow a reduction in a frame loss due to interference caused by use of the same channel. A transmitting apparatus disposed in a base station includes a GPS receiver for receiving a GPS signal, a timing generator for controlling respective function blocks in accordance with the GPS signal and an inter-base-station control signal so as to precisely synchronize the timing of frame transmission among base stations, the front-end transmission processing unit including for converting transmission information into transmission time slots, a frame generator for generating a frame including a plurality of time slots and one frame guard, and a back-end transmission processing unit for transmitting the generated frame as a radio signal.

    摘要翻译: 提供一种发送装置,接收装置和通信系统,其允许由于使用相同信道造成的干扰而减少帧丢失。 设置在基站中的发送装置包括:GPS接收器,用于接收GPS信号;定时发生器,用于根据GPS信号和基站间控制信号控制各个功能块,以便精确地同步帧的定时 基站之间的发送,将发送信息转换为发送时隙的前端发送处理单元,生成包括多个时隙的帧的帧生成器和一个帧保护装置,以及用于发送的后端发送处理单元 生成的帧作为无线电信号。

    METHOD AND APPARATUS FOR TRANSMITTING SRS IN LTE TDD SYSTEM
    72.
    发明申请
    METHOD AND APPARATUS FOR TRANSMITTING SRS IN LTE TDD SYSTEM 有权
    用于在LTE TDD系统中发送SRS的方法和装置

    公开(公告)号:US20100309852A1

    公开(公告)日:2010-12-09

    申请号:US12865334

    申请日:2009-01-07

    IPC分类号: H04W40/00

    摘要: The method for transmitting an uplink SRS by an LTE UE comprising steps of: the UE receiving information N indicating SRS transmission; generating an SRS sequence by the UE; and the UE transmitting the SRS in two OFDM symbol in a half-frame or frame if the information N indicates that a period of SRS transmission is 2 ms. With present invention, a format of SRS in LTE FDD and LTE TDD will be the same. Meanwhile, a problem of supporting 2 ms period in the LTE TDD system is solved.

    摘要翻译: LTE UE发送上行SRS的方法,包括步骤:UE接收指示SRS发送的信息N; 由UE生成SRS序列; 如果信息N表示SRS传输的周期为2ms,则UE以半帧或帧的方式在两个OFDM符号中发送SRS。 通过本发明,LTE FDD和LTE TDD中的SRS格式将相同。 同时,解决了在LTE TDD系统中支持2ms周期的问题。

    DEDICATED CARRIER CONFIGURATION METHOD AND DEVICE AND MULTIMEDIA BROADCAST MULTICAST SERVICE TRANSMISSION METHOD
    73.
    发明申请
    DEDICATED CARRIER CONFIGURATION METHOD AND DEVICE AND MULTIMEDIA BROADCAST MULTICAST SERVICE TRANSMISSION METHOD 有权
    专用载波配置方法和设备和多媒体广播多播服务传输方法

    公开(公告)号:US20100284319A1

    公开(公告)日:2010-11-11

    申请号:US12598130

    申请日:2008-04-24

    IPC分类号: H04W40/00

    摘要: The present invention discloses a MBMS dedicated carrier configuration method, including: at least one of MBMS dedicated carriers in a cell is chose and assigned MBMS control information of all MBMS dedicated carriers and MBMS system information; and frequency information and scrambling code group ID information of at least one MBMS dedicated carriers assigned bundling information is assigned to conventional service carriers in the cell. The present invention also discloses a device for realizing said method and a MBMS transmission method based on dedicated carriers assigned the bundling information. The present invention realizes MBMS bundling on the dedicated carriers, and UE can receive services by directly sensing the carriers bearing control signaling, and thus it can reduce meaningless switching sense by the UE and save power.

    摘要翻译: 本发明公开了一种MBMS专用载波配置方法,包括:选择小区中的MBMS专用载波中的至少一个,并分配所有MBMS专用载波和MBMS系统信息的MBMS控制信息; 并且分配了捆绑信息的至少一个MBMS专用载波的频率信息和扰码组ID信息被分配给小区中的常规服务载波。 本发明还公开了一种用于实现所述方法的设备和基于分配了捆绑信息的专用载波的MBMS传输方法。 本发明实现专用载波上的MBMS捆绑,并且UE可以通过直接感知承载控制信令的载波来接收业务,从而可以减少UE的无意义的交换感觉并节省功率。

    Data communication
    75.
    发明申请
    Data communication 失效
    数据通信

    公开(公告)号:US20040234000A1

    公开(公告)日:2004-11-25

    申请号:US10803621

    申请日:2004-03-18

    发明人: Michael Page

    IPC分类号: H04L027/00

    CPC分类号: H04L7/0008 H04J3/00

    摘要: A data communications system for communicating a data signal formed of successive data elements, said system comprising a transmission node; a reception node; and a link providing a data connection from said transmission node to said reception node; in which: said transmission node comprises a clock signal transmitter for transmitting a synchronisation clocking signal to said reception node via said link, said synchronisation clocking signal having synchronising features occurring at a frequency lower than a data element rate; an assembler for assembling elements of said data signal into data frames, each data frame having a plurality of successive data elements of said data signal, for transmission to said reception node via said link, said assembler being responsive to said synchronisation clocking signal so as to set a synchronisation flag associated with a data element having a first predetermined temporal relationship with a synchronising feature of said synchronisation clocking signal; and said reception node comprises: a detector detecting a synchronising feature of said synchronisation clocking signal received from said transmission node; a disassembler for disassembling received data frames to regenerate said data signal, said disassembler being operable to detect a data element associated with a set synchronisation flag; an output unit for outputting a data element associated with a set synchronisation flag at a second predetermined temporal relationship with respect to said synchronising feature of said received synchronisation clocking signal; said first and second predetermined temporal relationships being arranged so that a predetermined system latency exists between input of a data element to said transmission node and subsequent output of that data element by said reception node.

    摘要翻译: 一种用于传送由连续数据元素形成的数据信号的数据通信系统,所述系统包括传输节点; 接收节点; 以及提供从所述传输节点到所述接收节点的数据连接的链路; 其中:所述传输节点包括时钟信号发射机,用于经由所述链路向所述接收节点发送同步时钟信号,所述同步时钟信号具有以比数据元素速率低的频率出现的同步特征; 用于将所述数据信号的元件组合成数据帧的汇编器,每个数据帧具有所述数据信号的多个连续数据元素,用于经由所述链路发送到所述接收节点,所述汇编器响应于所述同步时钟信号,以便 设置与具有与所述同步时钟信号的同步特征具有第一预定时间关系的数据元素相关联的同步标记; 并且所述接收节点包括:检测器,检测从所述传输节点接收的所述同步时钟信号的同步特征; 用于拆卸所接收的数据帧以再生所述数据信号的反汇编器,所述反汇编器可操作以检测与设置的同步标志相关联的数据元素; 输出单元,用于相对于所述接收到的同步时钟信号的所述同步特征以与第二预定时间关系相关联的与设置的同步标记相关联的数据元素; 所述第一和第二预定时间关系被布置成使得在所述传输节点的数据元素的输入和所述接收节点的该数据元素的后续输出之间存在预定的系统等待时间。

    Controlling asynchronous conversion between analog and digital parameters
    76.
    发明授权
    Controlling asynchronous conversion between analog and digital parameters 失效
    控制模拟和数字参数之间的异步转换

    公开(公告)号:US4151518A

    公开(公告)日:1979-04-24

    申请号:US777956

    申请日:1977-03-16

    IPC分类号: H03M1/00 H04J3/00 H03K13/02

    CPC分类号: H04J3/00 H03M1/005 H03M1/504

    摘要: A PCM codec for converting between PCM words and analog signals has at least one element which is used for both types of conversions even though the clock pulse frequencies of the incoming and outgoing PCM words are different; a timing unit for generating time intervals wherein a first and second number are needed at the very most to carry out the respective conversion operations, the shorter of the period lengths determined by the two clock pulse frequencies includes at least the sum of the two numbers of time intervals; and a control unit for receiving the clock pulses in order to indicate the respective conversion type and for generating conversion type signals by means of which each of the time intervals is associated with one of the two conversion types. In order to control states where a type signal is generated delayed with respect to a notification pulse, the codec includes information memories to store the influenced information. And in order to control states where the control unit interrupts the present conversion operation of one type due to the priority of the other type, the codec includes a result memory to store such intermediate results which make it possible to continue the interrupted operation after the termination of the priority operation.

    摘要翻译: 用于在PCM字和模拟信号之间转换的PCM编解码器具有至少一个元件,其用于两种类型的转换,即使输入和输出PCM字的时钟脉冲频率不同; 用于产生时间间隔的定时单元,其中最多需要第一和第二数量来执行相应的转换操作,由两个时钟脉冲频率确定的较短的周期长度至少包括两个数字的和 时间间隔; 以及控制单元,用于接收时钟脉冲,以指示相应的转换类型,并产生转换类型信号,通过该转换类型信号,每个时间间隔与两种转换类型之一相关联。 为了控制相对于通知脉冲延迟的类型信号的状态,编解码器包括用于存储受影响的信息的信息存储器。 并且为了控制由于其他类型的优先级而使控制单元中断一种类型的当前转换操作的状态,编解码器包括存储这样的中间结果的结果存储器,这使得可以在终止之后继续中断的操作 的优先操作。

    Overlap PCM coder/decoder with reaction time compensation
    77.
    发明授权
    Overlap PCM coder/decoder with reaction time compensation 失效
    重叠PCM编码器/解码器,具有反应时间补偿

    公开(公告)号:US4034294A

    公开(公告)日:1977-07-05

    申请号:US687624

    申请日:1976-05-19

    摘要: A PCM coder/decoder circuit is disclosed employing a counter that counts clock pulses until a transmitting ramp voltage equals that of an outgoing speech sample. The encoded count is transmitted in complemented form to the distant station where it is eventually entered into a counter similar to that of the transmitting station. Clock pulses are then applied to the receiving counter until a carry is generated at which time a receiving ramp waveform is disconnected from a decoding capacitor. The counter at the receiving station is enabled prematurely to generate the count so that the "reaction time" of the physical circuit components is compensated for. Compensation of this reaction time is important in reducing the nonlinear distortion that would otherwise be introduced when the ramp waveforms that are employed are of the companded type. The circuit operates in an overlap fashion, encoding and receiving in one field and decoding and transmitting in another field. Control time slots are interspersed between these fields and the control time slot intervals are advantageously employed to augment the code in the counter.

    摘要翻译: 公开了PCM编码器/解码器电路,其采用计数时钟脉冲的计数器,直到发送斜坡电压等于输出语音样本的发送斜坡电压。 编码的计数以补充的形式发送到远程站,其最终进入类似于发射站的计数器的计数器。 然后将时钟脉冲施加到接收计数器,直到产生进位,此时接收斜坡波形与解码电容器断开。 接收站的计数器能够过早地产生计数,从而补偿物理电路部件的“反应时间”。 该反应时间的补偿对于减少当所采用的斜坡波形是压缩类型时将引入的非线性失真是重要的。 电路以重叠的方式工作,在一个字段中进行编码和接收,并在另一个领域进行解码和发送。 控制时隙散布在这些场之间,并且有利地采用控制时隙间隔来增加计数器中的代码。

    TDM switch with plural single-character buffers associated with each output line
    79.
    发明授权
    TDM switch with plural single-character buffers associated with each output line 失效
    具有与每个输出线相关联的多个单字符缓冲器的TDM开关

    公开(公告)号:US3860758A

    公开(公告)日:1975-01-14

    申请号:US40166073

    申请日:1973-09-28

    申请人: PHILIPS CORP

    IPC分类号: H04J3/00 H04Q11/04

    CPC分类号: H04Q11/04 H04J3/00

    摘要: A telecommunication system with time division multiplex in which between a second-order multiplex channel, comprising a multiple group of connection channels for the transmission of information characters, and a transmission line unit a switching unit is provided for switching the second-order multiplex channel to the transmission line unit in sub-time intervals of selected connection channels; in which in order to increase the accessibility of the outgoing main time interval channels of the outgoing transmission line, the transmission line unit comprises more than two single character buffers over which the information characters are distributed in dependence upon variable control information, the single character buffers being connected to the transmission line in a cyclic sequence.

    摘要翻译: 一种具有时分复用的电信系统,其中包括用于传输信息字符的多组连接信道的二阶多路复用信道和传输线路单元,提供了一个用于将二阶多路复用信道切换到 所述传输线单元在所选择的连接信道的子时间间隔中; 其中为了增加输出传输线的输出主时间间隔信道的可访问性,传输线单元包括多于两个单字符缓冲器,根据可变控制信息,信息字符在其上分布,单个字符缓冲器 以循环顺序连接到传输线。