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71.发明公开公开(公告)号：US20240129254A1
公开(公告)日：2024-04-18
申请号：US18276883
申请日：2021-03-04
发明人： Go YAZAWA , Takahiro KUBO , Natsuki YASUHARA , Shinichi YOSHIHARA
摘要： An information processing device in a communication apparatus performs a management process of traffic flow management information for transfer of data including a plurality of frames from a transmission source terminal to a transmission destination terminal. Where new traffic flow management information of a traffic flow associated with a data frame identified by an identification unit on the basis of identification information included in the received data frame is recorded in the communication apparatus, a recording unit determines whether the number of pieces of traffic flow management information already recorded is equal to or more than a threshold value, and calculates and records a scheduled release time of the traffic flow management information according to a determination result.
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72.发明公开公开(公告)号：US20240129250A1
公开(公告)日：2024-04-18
申请号：US17968071
申请日：2022-10-18
摘要： A method is provided to compensate for differential delay among a plurality of paths between first and second nodes in a network. The method may involve measuring delay for each of the plurality of paths for a plurality of sub-flows transmitted between the first node and the second node on respective paths of the plurality of paths. The plurality of sub-flows are obtained by splitting a traffic flow. The method involves determining delay differences among the delay for each of the plurality of paths, and adjusting, based on the delay differences, a queue delay associated with a respective flow of the plurality of sub-flows on one or more of the plurality of paths to achieve a path delay that is equal to a target path delay for each of the plurality of paths.
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公开(公告)号：US11956162B2
公开(公告)日：2024-04-09
申请号：US18169418
申请日：2023-02-15
IPC分类号： H04L47/72 , H04L7/00 , H04L41/5003 , H04L47/56 , H04W48/16 , H04W72/0446
CPC分类号： H04L47/72 , H04L7/0008 , H04L41/5003 , H04L47/56 , H04W48/16 , H04W72/0446
摘要： An asynchronous medium access control layer scheduler increases efficiency for directional mesh networks by removing extra overhead in the time slots. The efficiency is increased by dividing time slots into sub-slots to allow for a receiving node to be offset by at least one sub-slot from the transmitting node. This enables the scheduler to more efficiently schedule operations for the nodes so that nodes can be performing other functions rather than waiting to receive a transmission or waiting after transmitting a transmission. The sub-slots may be sized to approximate the transmission propagation time or time of flight delay.
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公开(公告)号：US11956161B2
公开(公告)日：2024-04-09
申请号：US17625529
申请日：2019-07-10
发明人： János Harmatos , Sándor Rácz , Geza Szabo
IPC分类号： H04L47/56 , H04L43/0852 , H04L43/106
CPC分类号： H04L47/56 , H04L43/0852 , H04L43/106
摘要： A technique for determining an available delay budget for transmission of a packet by a base station to a user equipment, UE, in a cellular network is disclosed. A method implementation of the technique is performed by the base station and includes receiving a packet from a sending node, the packet including a timestamp set by the sending node when processing the packet, triggering determining a latency of the packet based on a difference between a time determined by the base station upon receipt of the packet and the timestamp set by the sending node in the packet, the base station and the sending node being synchronized in time, and triggering determining an available delay budget for transmission of the packet to the UE based on the latency of the packet.
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公开(公告)号：US20240056400A1
公开(公告)日：2024-02-15
申请号：US17886606
申请日：2022-08-12
发明人： Zsolt Alon Wertheimer , Omer Shabtai , Barak Goldberg , Lion Levi , Gil Mey-Tal , Bar Or Shapira , Dotan David Levi
IPC分类号： H04L47/56 , H04L43/0894
CPC分类号： H04L47/56 , H04L43/0894
摘要： Systems, methods, and devices that perform computing operations are provided. In one example, a system includes a least one node, the at least one node having one or more processors, each having associated memory, a clock, a scheduler, the scheduler monitoring one or more of rates, rates of lanes, rates at which packets are sent, times, latencies of packets, topology, communication states, nodes, and packets in the system, an attribute monitor that measures counters for one or more of congestion state, line rate, and communication attributes. A packet scheduler determines a destination node based on information from the scheduler and the attribute monitor, and sends at least a portion of a packet to the destination node.
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76.发明公开公开(公告)号：US20240015577A1
公开(公告)日：2024-01-11
申请号：US18347462
申请日：2023-07-05
发明人： Hyunjeong KANG , Anil AGIWAL , Taeseop LEE
CPC分类号： H04W28/0278 , H04W28/0231 , H04L47/56
摘要： The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. Specifically, the present disclosure provides an apparatus and method of the terminal and base station to handle enhanced assistance information for a scheduler. The method comprises: receiving, from a base station, first information indicating that the base station supports a report of a remaining delivery time of an uplink data; identifying that a shortest remaining delivery time for at least one uplink data in a buffer is less than a threshold for a logical channel; and transmitting, to the base station, second information including an identity of the logical channel and information on the shortest remaining delivery time.
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77.发明公开公开(公告)号：US20230403239A1
公开(公告)日：2023-12-14
申请号：US18270923
申请日：2021-12-28
CPC分类号： H04L47/56 , H04L47/26 , H04L47/29 , H04L47/323
摘要： A method, a communication device, an apparatus, and a storage medium for measuring and feeding back delay information. The method comprises: receiving, by a reception terminal, a physical layer signal or channel that is transmitted by a transmission terminal and carries clock reference information corresponding to a service to be transmitted, wherein the clock reference information represents reference arrival time of the service to be transmitted to the reception terminal; demodulating, by the reception terminal, the physical layer signal or channel, obtaining, by the reception terminal, the clock reference information, and determining, by the reception terminal, corresponding delay information at least based on the clock reference information and actual arrival time of the physical layer signal or channel; and feeding back, by the reception terminal, the delay information to a target terminal.
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公开(公告)号：US20230396552A1
公开(公告)日：2023-12-07
申请号：US18196620
申请日：2023-05-12
发明人： CHI-SHAO LAI , HSU-TUNG SHIH
摘要： A memory control system includes a front-end circuitry, a back-end circuitry, and a traffic scheduling circuitry. The front-end circuitry is configured to receive a plurality of access requests from a plurality of devices, and adjust an order of the plurality of devices to access a memory according to a plurality of control signals. The traffic scheduling circuitry is configured to generate a plurality of traffic data based on the plurality of access requests and analyze the plurality of traffic data based on a neural network model and a predetermined rule, in order to determine the plurality of control signals. The back-end circuitry is configured to adjust a task schedule of the memory according to the plurality of control signals.
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公开(公告)号：US20230388254A1
公开(公告)日：2023-11-30
申请号：US17827476
申请日：2022-05-27
发明人： Syed Noman Ahmad , Pushkar Upadhyay
IPC分类号： H04L49/9057 , H04L47/56 , H04W28/08
CPC分类号： H04L49/9057 , H04L47/56 , H04W28/0908
摘要： Out-of-order packet processing in a wireless communications system (WCS) is provided. A reordering queue is established for each data session to temporally hold an incoming data packet(s) until an out-of-order data packet(s) is received or discarded. A reordering timer is initiated to define a lifespan of the earliest detected missed data packet in the data session. If the earliest detected missed data packet is received before the reordering timer expires, the received data packet will be forwarded to a core network together with any subsequent in-order data packet(s) in the reordering queue. Otherwise, the missed data packet is discarded, the subsequent in-order data packet(s) in the reordering queue is forwarded to the core network, and the reordering timer may be redefined for a next missed data packet in the data session. Hence, it is possible to process out-of-order data packets for multiple data sessions with reduced processing complexity and latency.
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公开(公告)号：US20230328000A1
公开(公告)日：2023-10-12
申请号：US18078659
申请日：2022-12-09
发明人： Ping Wang , Achaleshwar Sahai , Swaminathan Balakrishnan , Yi Lu , Yee Sin Chan , Xiaodi Zhang
摘要： Disclosed herein are aspects related to a device including a wireless communication interface and one or more processors. In an aspect, the wireless communication interface can establish a wireless connection with a remote device. In an aspect, the one or more processors can determine a signal indicative of a value of a discard timer according to at least one of a type of an application implemented by the one or more processors, a type of data communicated over the wireless connection, or a hardware capability of the device. In an aspect, the discard timer can be for discarding data packets from one or more buffers. In an aspect, the one or more processors can provide the signal to the remote device.
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