公开(公告)号：US20050111451A1

公开(公告)日：2005-05-26

申请号：US10994150

申请日：2004-11-19

Applicant: Dong-Kyu Kim

Inventor： Dong-Kyu Kim

IPC: H04L1/00 ,  H04L1/16 ,  H04L1/18 ,  H04L12/28 ,  H04L12/951 ,  H04L29/02 ,  H04L29/06 ,  H04L29/10 ,  H04W28/04 ,  H04W28/06 ,  H04W84/12 ,  H04L12/56

CPC classification number: H04L1/0061 ,  H04L1/0072 ,  H04L1/0075 ,  H04L1/0083 ,  H04L1/08 ,  H04L1/1809 ,  H04W80/00 ,  H04W84/12 ,  H04W99/00

Abstract: Provided is a method of dividing a payload intra-frame for improving throughput of a carrier sensing multiple access/collision avoidance (CSMA/CA) wireless communication network. The payload intra-frame dividing method includes a data frame dividing step and a physical layer frame generating step in which a physical layer receives a plurality of data frames from an upper layer within a range of the maximum data frame length the physical layer can transmit and transmits the data frames as a single physical layer data frame. Furthermore, an acknowledge (ACK) frame is provided, which can minimize the deterioration of throughput even when a data frame, which has been divided into a plurality of data frames and transmitted as a single data frame, is required to be re-transmitted because an error is generated in the data frame.

Abstract translation: 提供了一种划分有效载荷帧内以提高载波感测多址/冲突避免（CSMA / CA）无线通信网络的吞吐量的方法。 有效载荷帧内分割方法包括数据帧划分步骤和物理层帧生成步骤，其中物理层在物理层可以发送的最大数据帧长度的范围内从上层接收多个数据帧;以及 将数据帧作为单个物理层数据帧发送。 此外，提供了确认（ACK）帧，即使当被划分为多个数据帧并作为单个数据帧发送的数据帧被要求重新发送时，也可以最小化吞吐量的恶化，因为 在数据帧中产生错误。

公开(公告)号：US5990492A

公开(公告)日：1999-11-23

申请号：US879964

申请日：1997-06-20

Applicant: Dong-Kyu Kim

Inventor： Dong-Kyu Kim

IPC: G02F1/1368 ,  H01L21/336 ,  H01L29/417 ,  H01L29/786 ,  G02F1/13

CPC classification number: H01L29/66765 ,  G02F1/1368 ,  H01L29/41733 ,  H01L29/78618 ,  H01L29/78669

Abstract: A self-aligned thin-film transistor, fabricated by depositing a conductive layer on a transparent insulating substrate, etching the conductive layer so as to form a gate electrode together with gate lines, forming a triple layer having of a gate insulating layer, a semiconductor layer and an extrinsic semiconductor layer sequentially deposited over the substrate, etching the triple layer so that only a part thereof covering the gate electrode only remains to form an active pattern, depositing a transparent conductive layer over the substrate to form a drain electrode part by etching the transparent conductive layer so that a part of the transparent conductive layer remains overlapping the gate electrode, depositing a negative photoresist over the substrate, exposing the negative photoresist to a light supplied from the back of the transparent substrate opposite the gate and developing the thus-exposed photoresist, forming a drain electrode by removing the part of a transparent conductive layer appearing in a region over the gate wherefrom the photoresist is removed, depositing a conductive layer over the substrate to form a source electrode together with data lines by etching the conductive layer so that there remains a portion of the conductive layer opposite to the drain electrode with respect to the gate electrode, and removing a portion of the extrinsic semiconductor layer exposed over the gate electrode so as to form a channel.

Abstract translation: 通过在透明绝缘基板上沉积导电层制造的自对准薄膜晶体管，蚀刻导电层，以便与栅极线一起形成栅电极，形成具有栅极绝缘层的三层结构，半导体 层和外部半导体层，其顺序地沉积在衬底上，蚀刻三重层，使得只有其一部分覆盖栅电极才能保持形成有源图案，在衬底上沉积透明导电层以通过蚀刻形成漏电极部分 所述透明导电层使得所述透明导电层的一部分保持与所述栅电极重叠，在所述衬底上沉积负性光致抗蚀剂，将所述负性光致抗蚀剂暴露于从所述透明衬底的与所述栅极相对的背面提供的光， 曝光的光致抗蚀剂，通过去除透明导电体的一部分形成漏电极 ve层出现在去除光致抗蚀剂的栅极上的区域中，在衬底上沉积导电层，通过蚀刻导电层与数据线一起形成源电极，使得导体层的与漏极相对的一部分 电极，并且去除在栅电极上暴露的外部半导体层的一部分以形成沟道。

公开(公告)号：US5674757A

公开(公告)日：1997-10-07

申请号：US454027

申请日：1995-05-30

Applicant: Dong-Kyu Kim

Inventor： Dong-Kyu Kim

IPC: G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/45 ,  H01L29/786

CPC classification number: H01L29/78696 ,  H01L27/1214 ,  H01L29/66765 ,  G02F1/1368 ,  H01L29/458

Abstract: A self-aligned thin-film transistor, fabricated by depositing a conductive layer on a transparent insulating substrate, etching the conductive layer so as to form a gate electrode together with gate lines, forming a triple layer having of a gate insulating layer, a semiconductor layer and an extrinsic semiconductor layer sequentially deposited over the substrate, etching the triple layer so that only a part thereof covering the gate electrode only remains to form an active pattern, depositing a transparent conductive layer over the substrate to form a drain electrode part by etching the transparent conductive layer so that a part of the transparent conductive layer remains overlapping the gate electrode, depositing a negative photoresist over the substrate, exposing the negative photoresist to a light supplied from the back of the transparent substrate opposite the gate and developing the thus-exposed photoresist, forming a drain electrode by removing the part of a transparent conductive layer appearing in a region over the gate wherefrom the photoresist is removed, depositing a conductive layer over the substrate to form a source electrode together with data lines by etching the conductive layer so that there remains a portion of the conductive layer opposite to the drain electrode with respect to the gate electrode, and removing a portion of the extrinsic semiconductor layer exposed over the gate electrode so as to form a channel.

Abstract translation: 通过在透明绝缘基板上沉积导电层制造的自对准薄膜晶体管，蚀刻导电层，以便与栅极线一起形成栅电极，形成具有栅极绝缘层的三层结构，半导体 层和外部半导体层，其顺序地沉积在衬底上，蚀刻三重层，使得仅覆盖栅电极的部分仅保留以形成有源图案，在衬底上沉积透明导电层以通过蚀刻形成漏极部分 所述透明导电层使得所述透明导电层的一部分保持与所述栅电极重叠，在所述衬底上沉积负性光致抗蚀剂，将所述负性光致抗蚀剂暴露于从所述透明衬底的与所述栅极相对的背面提供的光， 曝光的光致抗蚀剂，通过去除透明导电体的一部分形成漏电极 ve层出现在去除光致抗蚀剂的栅极上的区域中，在衬底上沉积导电层，通过蚀刻导电层与数据线一起形成源电极，使得导体层的与漏极相对的一部分 电极，并且去除在栅电极上暴露的外部半导体层的一部分以形成沟道。