Deglitching Circuit and Method in Class-D Amplifier

    公开(公告)号:US20200295723A1

    公开(公告)日:2020-09-17

    申请号:US16354760

    申请日:2019-03-15

    Abstract: In an embodiment, a class-D amplifier includes an input terminal configured to receive an input signal; a comparator having an input coupled to the input terminal; a deglitching circuit having an input coupled to an output of the comparator; and a driving circuit having an input coupled to an output of the deglitching circuit. The deglitching circuit includes a logic circuit coupled between the input of the deglitching circuit and the output of the deglitching circuit. The logic circuit is configured to receive a clock signal having the same frequency as the switching frequency of the class-D amplifier.

    Methods and circuits to reduce pop noise in an audio device

    公开(公告)号:US10530309B2

    公开(公告)日:2020-01-07

    申请号:US16222281

    申请日:2018-12-17

    Abstract: A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.

    Current limiting circuit
    83.
    发明授权

    公开(公告)号:US10209725B2

    公开(公告)日:2019-02-19

    申请号:US15675872

    申请日:2017-08-14

    Inventor: Ni Zeng

    Abstract: A current limiting circuit includes a current sensing module that is configured to sense an output current of a power transistor and to generate a corresponding sensing current which is proportional to the output current. A first current limiting module coupled to the current sensing module is configured to generate a first limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a first current level. A second current limiting module coupled to the current sensing module is configured to generate a second limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a second current level. A converting module coupled to the first and second current limiting modules and the power transistor controls a gate voltage of the power transistor based at least on the first and second limiting currents.

    Bidirectional voltage differentiator circuit

    公开(公告)号:US09891250B2

    公开(公告)日:2018-02-13

    申请号:US15641088

    申请日:2017-07-03

    Inventor: Yijun Duan

    CPC classification number: G01R19/12 G01R19/16557 H05B33/0845 H05B33/0887

    Abstract: A bidirectional voltage differentiator circuit comprises start-up circuitry, sensing circuitry, and output circuitry coupled to logic circuitry. The start-up circuitry acts to start-up the sensing circuitry when the circuit is powered on, and accelerates the response of the sensing circuitry thereafter. The sensing circuitry senses variation in an input voltage applied to an input node. Responsive to the voltage variation sensed by the sensing circuitry, the output circuitry produces a state change at a first or second output node. The logic circuitry receives the states of the output nodes and produces a logic output signal to indicate the occurrence of the variation sensed in the input voltage. The voltage sensing circuit is operable to sense variation of the input voltage regardless of whether the voltage is rising or falling and without regard to the DC value of the input voltage.

    CURRENT LIMITING CIRCUIT
    87.
    发明申请

    公开(公告)号:US20180017983A1

    公开(公告)日:2018-01-18

    申请号:US15675872

    申请日:2017-08-14

    Inventor: Ni Zeng

    CPC classification number: G05F1/573

    Abstract: A current limiting circuit includes a current sensing module that is configured to sense an output current of a power transistor and to generate a corresponding sensing current which is proportional to the output current. A first current limiting module coupled to the current sensing module is configured to generate a first limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a first current level. A second current limiting module coupled to the current sensing module is configured to generate a second limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a second current level. A converting module coupled to the first and second current limiting modules and the power transistor controls a gate voltage of the power transistor based at least on the first and second limiting currents.

    Method and apparatus for generating a direct current bias

    公开(公告)号:US09836075B2

    公开(公告)日:2017-12-05

    申请号:US14521536

    申请日:2014-10-23

    CPC classification number: G05F5/00 G05F3/205

    Abstract: A voltage detector operates to detect a system power supply voltage and generate a trigger signal. A control signal generator responds to the trigger signal and generates a control signal. A DC bias generator responds to the control signal by generating a DC bias. The control signal controls the DC bias to have a first value when the power supply voltage is a first voltage and have a second value when the power supply voltage is a second voltage different from the first voltage, wherein the first value is different from the second value. A dynamic DC bias is generated which can not only support a larger voltage scope, but also significantly improves signal to noise ratio. The system power supply detection may concern stop/start operation of an automobile engine.

    Two-stage error amplifier with nested-compensation for LDO with sink and source ability

    公开(公告)号:US09772638B2

    公开(公告)日:2017-09-26

    申请号:US14592040

    申请日:2015-01-08

    Inventor: Ni Zeng

    CPC classification number: G05F1/575

    Abstract: A low dropout amplifier may include an error amplifier having first and second inputs coupled to a reference signal and a feedback signal, respectively. The error amplifier may be configured to generate first and second error signals at first and second outputs, respectively, with the first and second error signals based upon a difference between the reference signal and the feedback signal. A sink stage may be coupled to the first output and configured to generate a sink current based upon the first error signal. A source stage may be coupled to the second output and configured to generate a source current based upon the second error signal. An output node may be coupled to receive the sink and source currents.

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