公开(公告)号：US07053647B2

公开(公告)日：2006-05-30

申请号：US10841083

申请日：2004-05-07

申请人： Yue-Der Chih ,  Ping-Chun Tai

发明人： Yue-Der Chih ,  Ping-Chun Tai

IPC分类号： G11C29/00 ,  G01R31/00

CPC分类号： G11C29/025 ,  G11C29/02

摘要： A method and system for detecting a potential reliability problem cause by electrical bridging in an integrated circuit. A voltage difference is created between two conducting lines in the integrated circuit to accelerate the bridging effect for a predetermined period of time. The conducting lines are detected to determine whether an undesired connection has occurred due to the bridging effect between the conducting lines.

摘要翻译： 一种用于检测由集成电路中的电桥引起的潜在可靠性问题的方法和系统。 在集成电路中的两个导线之间产生电压差以加速桥接效应达预定时间段。 检测导线以确定由于导线之间的桥接效应是否发生了不期望的连接。

公开(公告)号：US20050280463A1

公开(公告)日：2005-12-22

申请号：US10871292

申请日：2004-06-17

申请人： Yue-Der Chih

发明人： Yue-Der Chih

IPC分类号： G05F1/10 ,  G05F3/20

CPC分类号： G05F3/205 ,  H03K2217/0018

摘要： Disclosed herein is a back-bias voltage regulator circuit for regulating a back-bias voltage used to control leakage current in at least one transistor within a primary circuit. In one embodiment, the back-bias voltage regulator circuit includes a voltage divider circuit configured to receive a back-bias voltage from a charge pump, and to generate a divided voltage signal by dividing the back-bias voltage based on a ratio of resistances of resistive elements within the voltage divider. In addition, the regulator circuit includes an output circuit configured to receive the back-bias voltage from the charge pump and having an output node for outputting the back-bias voltage, as well as a reference voltage circuit configured to generate a reference voltage signal based on a threshold voltage of the at least one transistor in the primary circuit. Also in such an embodiment, the regulator circuit includes a comparison circuit configured to compare the divided voltage signal to the reference voltage signal and to operate the output circuit to regulate the back-bias voltage level based on the comparison. Also disclosed is a related method of regulating a back-bias voltage to control leakage current in at least one transistor within a primary circuit.

摘要翻译： 本文公开了一种用于调节用于控制主电路内的至少一个晶体管中的漏电流的反偏压的背偏压调节器电路。 在一个实施例中，背偏压调节器电路包括分压器电路，其被配置为从电荷泵接收反向偏置电压，并且通过基于电压的比率来分离反偏压来产生分压电压信号 分压器内的电阻元件。 此外，调节器电路包括：输出电路，被配置为从电荷泵接收反偏压，并具有用于输出反偏压的输出节点，以及被配置为基于电压信号产生基准电压信号的参考电压电路 在初级电路中的至少一个晶体管的阈值电压。 同样在这样的实施例中，调节器电路包括比较电路，其被配置为将分压电压信号与参考电压信号进行比较，并且基于该比较操作输出电路来调节反偏压电平。 还公开了一种调节反偏压以控制主电路内的至少一个晶体管中的漏电流的相关方法。

公开(公告)号：US6128221A

公开(公告)日：2000-10-03

申请号：US150666

申请日：1998-09-10

申请人： Yue-Der Chih

发明人： Yue-Der Chih

IPC分类号： G11C16/10 ,  H03K17/687

CPC分类号： G11C16/3427 ,  G11C16/10

摘要： A circuit for the operation of flash memories is proposed. By applying a raised voltage on unselected bit lines of a flash memory array during the programming process, the present invention prevents unselected flash cells from undesired programming disturbances. In the programming process, unselected bit lines of the flash memories are provided with a raised voltage higher than the high state operating voltage of the flash memories, in order to prevent undesired disturbances. In the operation circuit, a current limiting circuit is applied for providing the drain current, and a raised voltage source is employed for supplying a raised voltage to the current limiting circuit, in order provide a raised voltage for unselected bit lines.

摘要翻译： 提出了一种用于闪速存储器操作的电路。 通过在编程过程期间将闪电存储器阵列的未选择位线上的升高电压施加到本发明，本发明防止未选择的闪存单元受到不期望的编程干扰。 在编程过程中，为了防止不期望的干扰，闪速存储器的未选位线被提供有高于闪存的高状态工作电压的升高电压。 在运算电路中，施加限流电路以提供漏极电流，并且使用升压电压源将升高的电压提供给限流电路，以便为未选择的位线提供升高的电压。