公开(公告)号：US09548551B1

公开(公告)日：2017-01-17

申请号：US14833729

申请日：2015-08-24

Applicant: International Business Machines Corporation

Inventor： Wiren D. Becker ,  William L. Brodsky ,  Matteo Cocchini ,  Michael A. Cracraft

IPC: H01R12/70 ,  H01R43/20

CPC classification number: H01R12/737 ,  H01R12/526 ,  H01R12/7076 ,  H01R43/205 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/112 ,  H05K1/113 ,  H05K1/141 ,  H05K2201/094 ,  H05K2201/10159

Abstract: A dual in-line memory module (DIMM) connector system is provided. The DIMM connector system includes a motherboard, a DIMM card and a connector by which the DIMM card is coupled with the motherboard. The motherboard includes a printed circuit board (PCB) formed of a mid-loss dielectric constant material, signal pads that are thinner than ground pads, ground pads disposed proximate to signal pads, signal vias connected to distal edges of signal pads and shared antipads. The DIMM card includes a printed circuit board (PCB) formed of a mid-loss dielectric constant material, signal pads that are thinner than ground pads, signal vias connected to distal edges of signal pads and shared antipads for respective pairs of signal vias.

Abstract translation: 提供双列直插式内存模块（DIMM）连接器系统。 DIMM连接器系统包括主板，DIMM卡和DIMM卡与主板耦合的连接器。 主板包括由中间损耗介电常数材料形成的印刷电路板（PCB），比接地焊盘更薄的信号焊盘，靠近信号焊盘设置的接地焊盘，连接到信号焊盘的远端边缘的信号通孔和共享的反焊盘。 DIMM卡包括由中间损耗介电常数材料形成的印刷电路板（PCB），比接地焊盘薄的信号焊盘，连接到信号焊盘的远端边缘的信号通孔和用于相应的信号通道对的共用反接头。

公开(公告)号：US09543241B2

公开(公告)日：2017-01-10

申请号：US14551185

申请日：2014-11-24

Applicant: International Business Machines Corporation

Inventor： Zhaoqing Chen ,  Matteo Cocchini ,  Rohan U. Mandrekar ,  Tingdong Zhou

IPC: H01L23/498 ,  H01L23/528 ,  H04B3/32 ,  H01P3/02 ,  H01P3/08 ,  H05K1/02 ,  H04B1/00

CPC classification number: H01L23/49838 ,  H01L23/528 ,  H01L23/66 ,  H01L2223/6627 ,  H01P3/02 ,  H01P3/026 ,  H01P3/081 ,  H04B1/00 ,  H04B3/32 ,  H05K1/0216 ,  H05K1/0245

Abstract: An electronic device including a plurality of interconnects are orthogonally arranged in a grid pattern and evenly spaced by a first distance, the plurality of interconnects include: a first conductor pair with conductors arranged next to each other in a first direction, the first direction is oriented diagonally relative to the orthogonal grid pattern, a second conductor pair with conductors arranged next to each other in a second direction substantially perpendicular to the first direction, each conductor of the second conductor pair is spaced by the first distance from each signal conductor of the first conductor pair, and a third conductor pair with conductors arranged next to each other in a third direction substantially parallel to the first direction, each conductors of the third conductor pair is spaced by the first distance from one of the signal elements of the second conductor pair.

Abstract translation: 包括多个互连件的电子设备以网格图案正交布置并均匀间隔第一距离，所述多个互连件包括：第一导体对，其具有沿第一方向彼此相邻布置的导体，所述第一方向定向 相对于正交栅格图案的对角线的第二导体对，具有基本上垂直于第一方向的第二方向彼此相邻布置的导体的第二导体对，第二导体对的每个导体与第一导体对的每个信号导体间隔开第一距离 导体对和第三导体对，其中导体在基本上平行于第一方向的第三方向上彼此相邻布置，第三导体对的每个导体与第二导体对的信号元件之一间隔开第一距离 。

公开(公告)号：US20160371417A1

公开(公告)日：2016-12-22

申请号：US14842862

申请日：2015-09-02

Applicant: International Business Machines Corporation

Inventor： Sungjun Chun ,  Matteo Cocchini ,  Michael A. Cracraft

IPC: G06F17/50

CPC classification number: G06F17/5077

Abstract: One aspect is a method that includes identifying a substantially uniform distribution of signal vias for a multi-layer circuit board based on a design file defining a layout that includes via groups in a two-to-one signal-to-ground via ratio configuration. A signal via pitch is determined as a center-to-center distance between a neighboring pair of signal vias. The signal via pitch is compared to a target minimum drilling distance. A ground via is identified proximate the neighboring pair of the signal vias. Based determining that the signal via pitch of the neighboring pair is less than the target minimum drilling distance, at least one of the signal vias is positioned closer to the ground via such that after the positioning, the signal via pitch of the neighboring pair meets or exceeds the target minimum drilling distance. The design file is modified to include the positioning of the signal vias.

公开(公告)号：US20160371416A1

公开(公告)日：2016-12-22

申请号：US14745964

申请日：2015-06-22

Applicant: International Business Machines Corporation

Inventor： Sungjun Chun ,  Matteo Cocchini ,  Michael A. Cracraft

IPC: G06F17/50

CPC classification number: G06F17/5077

Abstract: One aspect is a method that includes identifying a substantially uniform distribution of signal vias for a multi-layer circuit board based on a design file defining a layout that includes via groups in a two-to-one signal-to-ground via ratio configuration. A signal via pitch is determined as a center-to-center distance between a neighboring pair of signal vias. The signal via pitch is compared to a target minimum drilling distance. A ground via is identified proximate the neighboring pair of the signal vias. Based determining that the signal via pitch of the neighboring pair is less than the target minimum drilling distance, at least one of the signal vias is positioned closer to the ground via such that after the positioning, the signal via pitch of the neighboring pair meets or exceeds the target minimum drilling distance. The design file is modified to include the positioning of the signal vias.

Abstract translation: 一个方面是一种方法，其包括基于设计文件来识别多层电路板的信号通路的基本上均匀的分布，所述设计文件定义了包括二对一的信号对地通孔配置中的通孔组的布局。 通过间距的信号被确定为相邻的一对信号通孔之间的中心到中心距离。 将信号经由间距与目标最小钻孔距离进行比较。 在邻近的信号通孔对之间识别接地通孔。 基于确定相邻对的信号经由间距小于目标最小钻孔距离，至少一个信号通孔被定位成更靠近地面，使得在定位之后，相邻对的信号经由间距与 超过目标最小钻孔距离。 修改设计文件以包括信号通孔的定位。