Scheduling Threads In A Multi-Processor Computer
    81.
    发明申请
    Scheduling Threads In A Multi-Processor Computer 有权
    在多处理器计算机中调度线程

    公开(公告)号:US20080178183A1

    公开(公告)日:2008-07-24

    申请号:US12055179

    申请日:2008-03-25

    IPC分类号: G06F9/46

    CPC分类号: G06F9/4812

    摘要: Scheduling threads in a multi-processor computer system including establishing an interrupt threshold for a thread, where the interrupt threshold represents a maximum permissible number of interrupts during thread execution on a processor; executing the thread on a current processor, where the thread has thread affinity for one or more processors including the current processor; counting a number of interrupts during execution of the thread on the current processor; and removing thread affinity for the current processor in dependence upon the counted number of interrupts and the interrupt threshold.

    摘要翻译: 在多处理器计算机系统中调度线程,包括建立线程的中断阈值,其中中断阈值表示在处理器上的线程执行期间的最大允许中断次数; 在当前处理器上执行线程,其中线程对于包括当前处理器的一个或多个处理器具有线程亲和性; 在当前处理器上的线程执行期间对多个中断进行计数; 并根据计数的中断次数和中断阈值去除当前处理器的线程亲和度。

    System and method for scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval
    82.
    发明授权
    System and method for scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval 有权
    用于在同步多线程处理器中调度兼容线程的系统和方法,使用在指定时间间隔期间的每个指令值周期

    公开(公告)号:US07360218B2

    公开(公告)日:2008-04-15

    申请号:US10671132

    申请日:2003-09-25

    CPC分类号: G06F9/4881 G06F2209/483

    摘要: A system and method for identifying compatible threads in a Simultaneous Multithreading (SMT) processor environment is provided by calculating a performance metric, such as cycles per instruction (CPI), that occurs when two threads are running on the SMT processor. The CPI that is achieved when both threads were executing on the SMT processor is determined. If the CPI that was achieved is better than the compatibility threshold, then information indicating the compatibility is recorded. When a thread is about to complete, the scheduler looks at the run queue from which the completing thread belongs to dispatch another thread. The scheduler identifies a thread that is (1) compatible with the thread that is still running on the SMT processor (i.e., the thread that is not about to complete), and (2) ready to execute. The CPI data is continually updated so that threads that are compatible with one another are continually identified.

    摘要翻译: 通过计算在SMT处理器上运行两个线程时发生的性能指标(例如每个指令周期(CPI)),可以提供用于在同时多线程(SMT)处理器环境中识别兼容线程的系统和方法。 确定在两个线程在SMT处理器上执行时实现的CPI。 如果实现的CPI优于兼容性阈值,则记录指示兼容性的信息。 当线程即将完成时,调度程序将查看完成线程所属的运行队列,以调度另一个线程。 调度程序标识(1)与SMT处理器上仍然运行的线程(即,即将完成的线程)兼容的线程,以及(2)准备执行。 持续更新CPI数据,以便不断地识别彼此兼容的线程。

    Nodelay per port
    83.
    发明授权
    Nodelay per port 失效
    Nodelay每口

    公开(公告)号:US07275151B2

    公开(公告)日:2007-09-25

    申请号:US10860409

    申请日:2004-06-03

    IPC分类号: G06F9/00 G06F15/173

    CPC分类号: H04L67/322

    摘要: Methods, systems, and media are disclosed for improved granularity of a response-request communication on a networked computer system. One example embodiment includes receiving the request-response communication by the networked computer system, and associating the request-response communication with a port, having a nodelay setting, from a set of ports on the networked computer system. Further, the example embodiment includes enabling, based upon the associating, the nodelay setting upon connection of the request-response communication with the port. Further still, the example embodiment includes sending, in accordance with the enabling, the request-response communication to a destination in communication with the networked computer system. In addition, further example embodiments include configuring the ports on the networked computer system with nodelay values indicating whether a particular port is assigned nodelay or no nodelay for a request portion or request portion of a request-response communication connecting to that particular port.

    摘要翻译: 公开了用于网络计算机系统上的响应请求通信的粒度的方法,系统和媒体。 一个示例性实施例包括:由联网计算机系统接收请求 - 响应通信,并且从联网计算机系统上的一组端口将请求响应通信与具有节日设置的端口相关联。 此外,示例性实施例包括在连接请求响应通信与端口时基于关联启用节目设置。 此外,示例实施例包括根据启用的方式向与联网的计算机系统通信的目的地发送请求 - 响应通信。 另外,进一步的示例性实施例包括在网络计算机系统上配置端口,其中节点值指示特定端口是否被分配了节目,或者没有连接到该特定端口的请求响应通信的请求部分或请求部分。

    System and method for dynamically adjusting read ahead values based upon memory usage
    84.
    发明授权
    System and method for dynamically adjusting read ahead values based upon memory usage 失效
    基于内存使用动态调整预读值的系统和方法

    公开(公告)号:US07120753B2

    公开(公告)日:2006-10-10

    申请号:US10828455

    申请日:2004-04-20

    IPC分类号: G06F12/00 G06F9/38

    CPC分类号: G06F12/023

    摘要: A system and method for dynamically altering a Virtual Memory Manager (VMM) Sequential-Access Read Ahead settings based upon current system memory conditions is provided. Normal VMM operations are performed using the Sequential-Access Read Ahead values set by the user. When low memory is detected, the system either turns off Sequential-Access Read Ahead operations or decreases the maximum page ahead (maxpgahead) value based upon whether the amount of free space is simply low or has reached a critically low level. The altered VMM Sequential-Access Read Ahead state remains in effect until enough free space is available so that normal VMM Sequential-Access Read Ahead operations can be performed (at which point the altered Sequential-Access Read Ahead values are reset to their original levels).

    摘要翻译: 提供了一种基于当前系统内存条件动态更改虚拟内存管理器(VMM)顺序访问预读设置的系统和方法。 使用用户设置的顺序访问读取前值可以执行正常的VMM操作。 当检测到低内存时,系统会根据自由空间量是否很低或已经达到极低的水平,关闭顺序访问预读操作或者减小最大页面前提(maxpgahead)值。 改变的VMM顺序访问预读状态在有足够的可用空间可用之前保持有效,以便可以执行正常的VMM顺序访问预读操作(此时,改变的顺序访问读取前置值被重置为其原始级别) 。

    System, method and computer program product for application-level cache-mapping awareness and reallocation
    85.
    发明申请
    System, method and computer program product for application-level cache-mapping awareness and reallocation 有权
    系统,方法和计算机程序产品,用于应用级缓存映射意识和重新分配

    公开(公告)号:US20060123197A1

    公开(公告)日:2006-06-08

    申请号:US11006127

    申请日:2004-12-07

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0864 G06F12/1045

    摘要: The present invention provides an improved method, system, and computer program product that can optimize cache utilization. In one embodiment, a kernel service creates a storage map, and sending said storage map to an application. In one embodiment of the present invention, the step of the kernel service creating the storage map may further comprise the kernel service creating a cache map. In one embodiment of the present invention, the step of the kernel service creating the storage map may further comprise the kernel service creating an indication of one or more storage locations that have been allocated to store information for the application. In one embodiment of the present invention, the step of the kernel service creating the storage map may further comprise the kernel service creating the storage map in response to receiving a request for the storage map from the application.

    摘要翻译: 本发明提供了可以优化缓存利用的改进的方法,系统和计算机程序产品。 在一个实施例中,内核服务创建存储映射,并将所述存储映射发送到应用。 在本发明的一个实施例中,创建存储映射的内核服务的步骤还可以包括创建高速缓存映射的内核服务。 在本发明的一个实施例中,创建存储映射的内核服务的步骤还可以包括内核服务,其创建已被分配以存储用于应用的信息的一个或多个存储位置的指示。 在本发明的一个实施例中,创建存储映射的内核服务的步骤还可以包括响应于从应用接收对存储映射的请求而创建存储映射的内核服务。

    System and method for delayed priority boost
    88.
    发明授权
    System and method for delayed priority boost 失效
    用于延迟优先级提升的系统和方法

    公开(公告)号:US08132178B2

    公开(公告)日:2012-03-06

    申请号:US11943649

    申请日:2007-11-21

    IPC分类号: G06F9/46

    CPC分类号: G06F9/52 G06F9/4818

    摘要: A system and method is provided for delaying a priority boost of an execution thread. When a thread prepares to enter a critical section of code, such as when the thread utilizes a shared system resource, a user mode accessible data area is updated indicating that the thread is in a critical section and, if the kernel receives a preemption event, the priority boost that the thread should receive. If the kernel receives a preemption event before the thread finishes the critical section, the kernel applies the priority boost on behalf of the thread. Often, the thread will finish the critical section without having to have its priority actually boosted. If the thread does receive an actual priority boost then, after the critical section is finished, the kernel resets the thread's priority to a normal level.

    摘要翻译: 提供了一种用于延迟执行线程的优先级提升的系统和方法。 当线程准备进入代码的关键部分时,例如当线程利用共享系统资源时,更新用户模式可访问数据区域,指示线程处于关键部分,并且如果内核接收到抢占事件, 线程应该接收的优先级提升。 如果内核在线程完成关键部分之前收到抢占事件,则内核将代表线程应用优先级提升。 通常,线程将完成关键部分,而无需实际提升优先级。 如果线程确实接收到实际的优先级提升,那么在关键部分完成之后,内核会将线程的优先级重置为正常级别。

    Scheduling threads in a multiprocessor computer
    89.
    发明授权
    Scheduling threads in a multiprocessor computer 失效
    在多处理器计算机中调度线程

    公开(公告)号:US07962913B2

    公开(公告)日:2011-06-14

    申请号:US12342352

    申请日:2008-12-23

    IPC分类号: G06F9/46 G06F13/24

    CPC分类号: G06F9/5027 G06F9/4812

    摘要: Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.

    摘要翻译: 提供方法,系统和计算机程序产品用于在多处理器计算机中调度线程。 实施例包括选择要发送到处理器的准备队列中的线程,并且确定是否在与线程相关联的线程控制块中设置了中断屏蔽标志。 如果在与线程相关联的线程控制块中设置中断屏蔽标志,则实施例通常包括选择处理器,将所选择的处理器的当前处理器优先级寄存器设置为最不利,并将线程从就绪队列调度到所选择的处理器 。 在一些实施例中,将所选择的处理器的当前处理器优先级寄存器设置为最不利的是通过在当前处理器优先级寄存器中存储与最高中断优先级相关联的值来执行。

    PRESELECT LIST USING HIDDEN PAGES
    90.
    发明申请
    PRESELECT LIST USING HIDDEN PAGES 失效
    使用隐藏页的预约清单

    公开(公告)号:US20100161934A1

    公开(公告)日:2010-06-24

    申请号:US12339443

    申请日:2008-12-19

    IPC分类号: G06F12/10

    摘要: Disclosed is a computer implemented method, computer program product, and apparatus for maintaining a preselect list. The method comprises software components detecting a page fault of a memory page. In response to detecting a page fault, the software components determine whether the memory page is referenced in the preselect list and unhide the memory page. Upon determining whether the memory page is referenced in the preselect list, the software components remove an entry of the preselect list corresponding to the memory page to form at least one removed candidate page and skip paging-out of the at least one removed candidate page.

    摘要翻译: 公开了一种用于维护预选列表的计算机实现方法,计算机程序产品和装置。 该方法包括检测存储器页的页错误的软件组件。 响应于检测到页面错误,软件组件确定在预选列表中是否引用了存储器页面,并取消隐藏存储器页面。 在确定在预选列表中是否引用存储器页面时,软件组件移除对应于存储器页面的预选列表的条目以形成至少一个移除的候选页面,并跳过至少一个移除的候选页面的寻呼。