COMPUTER SYSTEM, INTERRUPT RELAY CIRCUIT AND INTERRUPT RELAY METHOD
    81.
    发明申请
    COMPUTER SYSTEM, INTERRUPT RELAY CIRCUIT AND INTERRUPT RELAY METHOD 审中-公开
    计算机系统,中断继电器电路和中断继电器方法

    公开(公告)号:US20100262741A1

    公开(公告)日:2010-10-14

    申请号:US12758246

    申请日:2010-04-12

    IPC分类号: G06F13/24 G06F9/455

    CPC分类号: G06F13/24

    摘要: A method for making it possible for a virtualization software (VMM) to generally identify a PCI function of an interrupt requester presupposing the existing I/O devices based on the PCI express is provided. An interrupt relay circuit is provided between an I/O device based on the PCI express and a PCI express bridge. The interrupt relay circuit receives and relays an interrupt transaction issued by the I/O device, and records whether there is an interrupt request in an interrupt indicator in association with an interrupt identifier. A VMM 114 uniquely identifies an I/O device of interrupt requester by referring to the interrupt indicator 134.

    摘要翻译: 提供一种使虚拟化软件(VMM)能够基于PCI express来预先假定现有I / O设备的中断请求者的PCI功能的方法。 在基于PCI Express的I / O设备和PCI Express桥之间提供中断继电器电路。 中断继电器电路接收和中断I / O设备发出的中断事务,并记录与中断标识符相关联的中断指示符中是否存在中断请求。 VMM 114通过参考中断指示符134唯一地识别中断请求者的I / O设备。

    Method and program for partitioning a physical computer into logical partitions
    82.
    发明授权
    Method and program for partitioning a physical computer into logical partitions 有权
    将物理计算机划分为逻辑分区的方法和程序

    公开(公告)号:US07725642B2

    公开(公告)日:2010-05-25

    申请号:US11288175

    申请日:2005-11-29

    IPC分类号: G06F12/00 G06F21/00

    摘要: This invention provides a program product for a virtual computer that partitions a physical computer into a plurality of logical partitions through a hypervisor and runs an OS on each of the logical partitions, the program product including: a procedure (S1) of detecting an exception or an interruption occurring in the physical computer; a procedure (S2) of identifying an OS on a logical partition where the detected exception or interruption occurring; a procedure (S4) of copying a given storage area that contains an instruction that is the subject of the exception or interruption from a storage area where the identified OS is stored to a storage area that is managed by the hypervisor; a procedure (S6) of replacing, in the copied storage area, the exception or interruption subject instruction with an instruction that substitutes for the exception or interruption subject instruction; and a procedure (S7) of moving a location where the physical computer executes an instruction to the copied storage area.

    摘要翻译: 本发明提供了一种用于虚拟计算机的程序产品,其通过管理程序将物理计算机分割成多个逻辑分区,并在每个逻辑分区上运行OS,该程序产品包括:检测异常的过程(S1) 在物理计算机中发生中断; 在所检测的异常或中断发生的逻辑分区上识别OS的过程(S2); 将包含作为异常或中断的对象的指令的给定存储区域从存储有所识别的OS的存储区域复制到由管理程序管理的存储区域的过程(S4) 在复制的存储区域中用替代异常或中断主题指令的指令来替换异常或中断主题指令的过程(S6) 以及将物理计算机执行指令的位置移动到复制存储区域的步骤(S7)。

    Cluster system and failover method for cluster system
    83.
    发明申请
    Cluster system and failover method for cluster system 有权
    群集系统的群集系统和故障转移方法

    公开(公告)号:US20100017643A1

    公开(公告)日:2010-01-21

    申请号:US12585734

    申请日:2009-09-23

    IPC分类号: G06F11/14

    摘要: Provided is a failover method for a cluster system for realizing smooth failover of the guest OS's, even when there are many guest OS's, while reducing consumption of computer resources of a server. Smooth failover is realized by preventing competition during failover even when the number of guest OS's is increased. In a cluster configuration in which a slave/master cluster program is operated in a guest OS/host OS, the master cluster program (510) collects and transmits heartbeats of the slave cluster program, thereby realizing failure monitoring through the certain amount of heartbeats without depending on the number of guest OS's. Further, when the master cluster program monitors failures of the slave cluster program of its own computer to find a normal operation of the guest OS, the amount of communication through heartbeats is reduced by eliminating the necessity of communication to a standby system slave cluster program.

    摘要翻译: 提供了一种集群系统的故障转移方法,即使客户操作系统有很多客户操作系统也能实现客户操作系统的平滑故障切换,同时降低服务器计算机资源的消耗。 即使客户操作系统的数量增加,也可以通过防止故障切换期间的竞争来实现平滑的故障切换。 在从机/主机集群程序在客户OS /主机OS中运行的集群配置中,主集群程序(510)收集并发送从属集群程序的心跳,从而通过一定数量的心跳来实现故障监视,而没有 取决于客户操作系统的数量。 此外,当主集群程序监视其自己的计算机的从属集群程序的故障以查找客户OS的正常操作时,通过消除与备用系统从属集群程序的通信的必要性来减少通过心跳的通信量。

    METHOD FOR SPEEDING UP PAGE TABLE ADDRESS UPDATE ON VIRTUAL MACHINE
    84.
    发明申请
    METHOD FOR SPEEDING UP PAGE TABLE ADDRESS UPDATE ON VIRTUAL MACHINE 失效
    用于在虚拟机上加速页面地址更新的方法

    公开(公告)号:US20070162683A1

    公开(公告)日:2007-07-12

    申请号:US11621609

    申请日:2007-01-10

    IPC分类号: G06F12/00

    摘要: A method is provided which eliminates redundancy from the shadow PT operation performed by the VMM when the guest operating system running on a virtual machine updates a guest PT address. The VMM associates a plurality of shadow PTs with guest PTs and allocates their relation in memory. When it detects the update of a guest PT address, the VMM searches for a shadow PT corresponding to the updated guest PT. If the associated shadow PT exists, the VMM omits rewriting the shadow PT and registers the address of the shadow PT with the CPU. If the associated shadow PT does not exist, the VMM allocates a memory, creates a shadow PT, registers an address of the created shadow PT with the CPU, and records a relationship between the updated guest PT and the generated shadow PT.

    摘要翻译: 当在虚拟机上运行的客机操作系统更新客户PT地址时,提供一种消除由VMM执行的阴影PT操作的冗余的方法。 VMM将多个阴影PT与客户PT相关联,并将其关系分配给内存。 当检测到客户PT地址的更新时,VMM搜索与更新的客户PT相对应的影子PT。 如果相关的阴影PT存在,则VMM将省略重写阴影PT,并向CPU注册阴影PT的地址。 如果相关联的阴影PT不存在,则VMM分配存储器,创建阴影PT,向CPU注册创建的阴影PT的地址,并记录更新的客户PT与生成的阴影PT之间的关系。

    Control method for virtual machine
    85.
    发明申请
    Control method for virtual machine 审中-公开
    虚拟机的控制方法

    公开(公告)号:US20060064523A1

    公开(公告)日:2006-03-23

    申请号:US11195742

    申请日:2005-08-03

    IPC分类号: G06F13/38

    摘要: An object of this invention is to prevent logical partitions used by users from being affected by faults or errors in I/O devices. According to this invention, in an I/O device control method in which I/O devices connected to a computer are allocated among a plurality of logical partitions constructed of a hypervisor (10), the hypervisor (10) sets the logical partitions as a user LPAR to be provided to a user and as an I/O LPAR for controlling an I/O device, allocates the I/O device to the I/O LPAR, and an association between the user LPAR and the logical I/O LPAR is set by an I/O device table.

    摘要翻译: 本发明的一个目的是防止用户使用的逻辑分区受I / O设备中的故障或错误的影响。 根据本发明,在由管理程序(10)构成的多个逻辑分区中分配连接到计算机的I / O设备的I / O设备控制方法中,管理程序(10)将逻辑分区设置为 用户LPAR提供给用户和用作控制I / O设备的I / O LPAR,将I / O设备分配给I / O LPAR,以及用户LPAR与逻辑I / O LPAR之间的关联 由I / O设备表设置。

    Processor for VLIW instruction
    86.
    发明授权
    Processor for VLIW instruction 失效
    处理器用于VLIW指令

    公开(公告)号:US6044450A

    公开(公告)日:2000-03-28

    申请号:US824486

    申请日:1997-03-27

    IPC分类号: G06F9/30 G06F9/38 G06F7/00

    摘要: Each small instruction in a VLIW instruction (long instruction) is added with the number of NOP instructions which succeed the small instruction, and these NOP instructions are deleted from the succeeding long instruction. A plurality of long instructions are therefore time-compressed. Thereafter, a plurality of small instructions in each long instruction are divided into a plurality of groups, and a combination of operation codes (OP codes) of small instructions in each group is replaced by a group code to generate a compressed, grouped instruction. Each long instruction is therefore space-compressed. An instruction expanding unit has an instruction expanding circuit for each grouped instruction. Each instruction expanding circuit expands one grouped instruction in a long instruction, generates a group of small instructions represented by the grouped instruction, and supplies the group of generated small instructions to respective function units via a decode unit. In this case, each instruction expanding circuit supplies after each small instruction NOP instructions same in number as that designated by a NOP number associated with each small instruction in this grouped instruction.

    摘要翻译: VLIW指令(长指令)中的每个小指令都加上小指令成功的NOP指令数,并从后续长指令中删除这些NOP指令。 因此,多个长指令被时间压缩。 此后,每个长指令中的多个小指令被分成多个组,并且组中的小指令的操作码(OP代码)的组合被组代码替换以生成压缩的分组指令。 因此,每个长指令都是空间压缩的。 指令扩展单元具有用于每个分组指令的指令扩展电路。 每个指令扩展电路在长指令中扩展一个分组指令,生成由分组指令表示的一组小指令,并且经由解码单元将所生成的小指令组提供给各个功能单元。 在这种情况下,每个指令扩展电路在与分组指令中的每个小指令相关联的NOP号指定的每个小指令NOP指令之后提供数量相同的每个指令扩展电路。