Time domain reflectometer
    81.
    发明授权
    Time domain reflectometer 失效
    时域反射计

    公开(公告)号:US4789794A

    公开(公告)日:1988-12-06

    申请号:US912785

    申请日:1986-09-26

    摘要: A circuit is provided for sampling and accurately reproducing unknown signals, which could be electrical, optical, X-ray, gamma ray or particle signals, with picosecond resolution. The circuit comprises a superconductive sampling gate having at least two states which are distinguishable from one another and switching circuitry to switch the state of the sampling gate. The switching circuitry includes a sampling pulse source and a bias current source which are combined with the unknown signal to change the state of the monitor gate. A step generator utilizing Josephson junction technology is connected to the source of the unknown signal and sends a signal to the source of the unknown signal in order to initiate the outputting of the unknown signal and thus the sampling. Timing circuitry, also utilizing Josephson junction technology, provides an adjustable delay between the step signal generation and the sampling pulse generation.

    摘要翻译: 提供电路用于采样并准确再现未知信号,其可以是皮秒分辨率的电,光,X射线,γ射线或粒子信号。 该电路包括具有至少两个可彼此区分的状态的超导采样门和用于切换采样门的状态的开关电路。 开关电路包括采样脉冲源和偏置电流源,其与未知信号组合以改变监视器门的状态。 利用约瑟夫逊结技术的步进发生器连接到未知信号的源,并将信号发送到未知信号的源,以启动未知信号的输出,从而开始采样。 使用约瑟夫逊结技术的定时电路提供了步进信号产生和采样脉冲生成之间的可调延迟。

    Ultra high resolution Josephson sampling technique
    82.
    发明授权
    Ultra high resolution Josephson sampling technique 失效
    超高分辨率约瑟夫森采样技术

    公开(公告)号:US4631423A

    公开(公告)日:1986-12-23

    申请号:US516836

    申请日:1983-07-25

    申请人: Sadeg M. Faris

    发明人: Sadeg M. Faris

    摘要: A circuit is provided for sampling and accurately reproducing unknown signals with picosecond resolution, which could be electrical, optical, x-ray, gamma ray, or particle signals. The circuit comprises a superconductive monitor gate having at least two states which are distinguishable from one another. The monitor gate could be, for example, comprised of a Josephson device or a superconducting quantum interference device (SQUID). Switching means, including a source of the unknown signal, are provided to switch the state of the monitor gate. This switching means includes a sampling pulse source and a bias current source which are combined with the unknown signal to change the state of the monitor gate. A noise elimination means is also provided including a lock-in amplifier, a comparator, and a feedback loop. A time averaging technique eliminates any incorrect indications resulting from noise. A timing means establishes a timing reference and sampling delay, and includes the sampling pulse source, delay lines, and a trigger pulse source connected to the source of the unknown signal and to the sampling pulse source. A display, such as an x-y recorder or oscilloscope, indicates the unknown signal. The circuit has applications in all devices where fast unknown waveform must be measured exactly, and in the field of non-equilibrium superconductivity, where exceptionally high resolution and sensitivity are required.

    摘要翻译: 提供了一种电路,用于采样和准确再现具有皮秒分辨率的未知信号,其可以是电,光,X射线,γ射线或粒子信号。 该电路包括具有彼此可区分的至少两个状态的超导监视门。 监视器门可以例如由Josephson器件或超导量子干涉器件(SQUID)组成。 提供包括未知信号源的切换装置以切换监视器门的状态。 该开关装置包括采样脉冲源和偏置电流源,它们与未知信号组合以改变监视器门的状态。 还提供了包括锁定放大器,比较器和反馈回路的噪声消除装置。 时间平均技术消除了噪音引起的任何不正确的指示。 定时装置建立定时参考和采样延迟,并包括采样脉冲源,延迟线和连接到未知信号源和采样脉冲源的触发脉冲源。 显示器,如x-y记录器或示波器,表示未知信号。 该电路在所有器件中都有应用,其中必须精确测量快速未知波形,并且在非平衡超导领域,需要非常高的分辨率和灵敏度。

    Room temperature cryogenic test interface
    83.
    发明授权
    Room temperature cryogenic test interface 失效
    室温低温试验界面

    公开(公告)号:US4498046A

    公开(公告)日:1985-02-05

    申请号:US434770

    申请日:1982-10-18

    摘要: This interface permits the testing of high speed semiconductor devices (room-temperature chips) by a Josephson junction sampling device (cryogenic chip) without intolerable loss of resolution. The interface comprises a quartz pass-through plug which includes a planar transmission line interconnecting a first chip station, where the cryogenic chip is mounted, and a second chip station, where the semiconductor chip to be tested is temporarily mounted. The pass-through plug has a cemented long half-cylindrical portion and short half-cylindrical portion. The long portion carries the planar transmission line, the ends of which form the first and second chip mounting stations. The short portion completes the cylinder with the long portion for part of its length, where a seal can be achieved, but does not extend over the chip mounting stations. Sealing is by epoxy cement. The pass-through plug is sealed in place in a flange mounted to the chamber wall. The first chip station, with the cryogenic chip attached, extends into the liquid helium reservoir. The second chip station is in the room temperature environment required for semiconductor operation. Proper semiconductor operating temperature is achieved by a heater wire and control thermocouple in the vicinity of each other and the second chip mounting station. Thermal isolation is maintained by vacuum and seals. Connections for power and control, for test result signals, for temperature control and heating, and for vacuum complete the test apparatus.

    摘要翻译: 该接口允许通过约瑟夫逊结采样装置(低温芯片)测试高速半导体器件(室温芯片),而不会导致分辨率的损失。 接口包括石英直通插头,其包括互连第一芯片站的平面传输线,其中安装有低温芯片,以及第二芯片站,其中临时安装待测试的半导体芯片。 直通塞具有胶合的长半圆柱形部分和短的半圆柱形部分。 长部分承载平面传输线,其端部形成第一和第二芯片安装站。 短部分在其长度的一部分长部分处完成圆筒,其中可以实现密封,但不延伸在芯片安装台上。 密封是由环氧树脂水泥。 直通塞密封在安装在室壁上的凸缘中的适当位置。 附有低温芯片的第一个芯片站延伸到液氦储存器中。 第二个芯片站处于半导体操作所需的室温环境中。 适当的半导体工作温度是通过加热线和彼此附近的第二芯片安装站的控制热电偶实现的。 通过真空和密封保持热隔离。 用于电力和控制的连接,用于测试结果信号,用于温度控制和加热,以及真空完成测试设备。

    Programmable logic array system incorporating Josephson devices
    84.
    发明授权
    Programmable logic array system incorporating Josephson devices 失效
    包含约瑟夫逊设备的可编程逻辑阵列系统

    公开(公告)号:US4360898A

    公开(公告)日:1982-11-23

    申请号:US164118

    申请日:1980-06-30

    申请人: Sadeg M. Faris

    发明人: Sadeg M. Faris

    CPC分类号: H03K19/1952 Y10S505/832

    摘要: A Programmable Logic Array (PLA) system which utilizes Josephson devices and the noninverting capabilities of these devices is disclosed. The disclosed PLA system includes a personalized Read Only Memory (ROM) which is adapted to store the applied input signals as well as the output signals which are a logic function of the input signals. As soon as outputs from the ROM are available, an interface circuit which may be timed or untimed, inverting or noninverting provides output signals which can be utilized to drive other logic circuits or to act as inputs to another personalized Read Only Memory (ROM). The latter provides another logic function of the inputs at its outputs. Again, the outputs may be used directly or applied to another interface circuit which itself may provide inverted or noninverted outputs.Like the first mentioned ROM, the second mentioned ROM is capable of storing its inputs and the resulting outputs which are some logic function of the inputs as a result of the ROM personalization. The ROM's involved utilize memory cells which are programmable Josephson junction devices operating in a liquid helium environment.The programmable logic array system is disclosed in a full adder embodiment which is dc powered. A similar hybrid embodiment using both ac and dc power is also shown. The resulting system using high density ROM's provides high speed logic using relatively standard loop circuits which minimize the effect of the presence of resonances of known random logic circuits.

    摘要翻译: 公开了一种利用约瑟夫逊器件的可编程逻辑阵列(PLA)系统和这些器件的同相能力。 所公开的PLA系统包括个性化只读存储器(ROM),其适于存储所施加的输入信号以及作为输入信号的逻辑功能的输出信号。 一旦来自ROM的输出可用,可以被定时或未定时的反相或同相的接口电路提供可用于驱动其他逻辑电路或用作另一个性化的只读存储器(ROM)的输入的输出信号。 后者在其输出端提供输入的另一个逻辑功能。 再次,输出可以直接使用或应用于本身可以提供反相或非反相输出的另一接口电路。 像第一个提到的ROM一样,第二个提到的ROM能够存储其作为ROM个性化的结果的输入和作为输入的一些逻辑功能的结果输出。 所涉及的ROM涉及使用在液氦环境中操作的可编程约瑟夫逊结装置的存储单元。 可编程逻辑阵列系统在直流供电的全加器实施例中公开。 还示出了使用交流和直流功率的类似的混合实施例。 使用高密度ROM的所得系统使用相对标准的环路电路提供高速逻辑,这使得已知随机逻辑电路的共振的存在的影响最小化。

    Polarity switch incorporating Josephson devices
    85.
    发明授权
    Polarity switch incorporating Josephson devices 失效
    并入约瑟夫森设备的极性开关

    公开(公告)号:US4210921A

    公开(公告)日:1980-07-01

    申请号:US920911

    申请日:1978-06-30

    申请人: Sadeg M. Faris

    发明人: Sadeg M. Faris

    摘要: A polarity switch which utilizes Josephson interferometers and low drive currents is disclosed. Single ended and double ended polarity switches which are electrically the same include a pair of circuits interconnected so that the application of a pair of signals to the circuits applies a current of one polarity or the other to a utilization circuit connected to the pair of circuits. Each of the pair of circuits includes a Josephson device which carries gate current; a current path shunting the device having a transformer secondary disposed serially in the path and another Josephson device serially disposed in the same current path. The transformer secondary is coupled to a primary through which a current is passed at the outset of the memory cycle. A current is induced in the current path of one of the pair of circuits which is in opposition to the gate current flowing in the Josephson device carrying that current. The induced current and the gate current effectively cancel one another resulting in a total current of zero flowing in the Josephson device. Then, a decoder output control line which is disposed in electromagnetically coupled relationship with both of the Josephson devices of the other of the pair of circuit switches them to the voltage state causing current to be diverted into an interconnection line which is connected to the utilization circuit.

    摘要翻译: 公开了一种利用约瑟夫逊干涉仪和低驱动电流的极性开关。 电气相同的单端和双端极性开关包括互连的一对电路,使得向电路施加一对信号将一个极性的电流施加到连接到该对电路的利用电路。 该对电路中的每一个包括携带栅极电流的约瑟夫逊器件; 电流通路使具有在路径上串联设置的变压器次级装置的器件分流,以及串联地设置在同一电流路径中的另一约瑟夫逊器件。 变压器次级耦合到主电路,电流在存储器周期开始时通过该主电路。 一对电路中的一个电流的电流被感应出来,该电流与在携带该电流的约瑟夫逊器件中流动的栅极电流相对立。 感应电流和栅极电流有效地彼此抵消,导致在约瑟夫逊器件中流过零电流。 然后,与该对电路中的另一个的约瑟夫逊器件的两个电磁耦合关系设置的解码器输出控制线切换到电压状态,导致电流被转移到连接到利用电路的互连线 。

    SanSSoil (soil-less) indoor farming for food and energy production

    公开(公告)号:US09606553B2

    公开(公告)日:2017-03-28

    申请号:US13887333

    申请日:2013-05-05

    申请人: Sadeg M. Faris

    发明人: Sadeg M. Faris

    IPC分类号: A01G31/00 A01G3/00 G05D27/02

    摘要: To produce food, plants rely on three main ingredients, sun energy, water, and carbon dioxide, the cost of which is zero. To address the food and energy security concerns, two mysteries are resolved for the first time: i)—Photosynthetic efficiency is known to be very low, the scientific full accounting for all the losses is lacking; ii)—Fanning is known to be profitable, yet accounting for the zero cost of solar energy is not understood. This inventor resolved them by the derivation of a simple mathematical law, AgriPAL, comprising explicitly, a new solar gain factor >200× which offset the low efficiency of ˜0.005. In the absence of the sun, the newly found solar gain goes to 1. Since SanSSoil enables harnessing the third dimension, the sky is the limit. Water saving of >100 is realized through the controlled enclosed environment.

    Traveling Seed Amplifier, TSA, Continuous Flow Farming of Material Products, MP
    87.
    发明申请
    Traveling Seed Amplifier, TSA, Continuous Flow Farming of Material Products, MP 审中-公开
    旅游种子放大器,TSA,材料产品的连续流动农业,MP

    公开(公告)号:US20140325910A1

    公开(公告)日:2014-11-06

    申请号:US13887337

    申请日:2013-05-05

    申请人: Sadeg M. Faris

    发明人: Sadeg M. Faris

    IPC分类号: A01G31/06

    CPC分类号: A01G31/06 Y02P60/216

    摘要: A novel continuous flow farming method for the production of material products is introduced. It is based on 3D SansSoil, (soil-less) mobile multi-layer architecture comprising the traveling seed amplifier, TSA concept, which features the continuous planting of seed mass mi in planting layers, and synchronously harvesting an amplified mass M=Gsthmi, where Gsth is the seed to harvest TSA gain and compresses the intrinsic seed to harvest time, τsth, by a factor of N/τsth, where N is the number of traveling layers. The TSA continuous flow farming increases the volumetric productivity and 3D yield. In 3D tower architecture, and for plants with short heights annual yield per hectare increases in the range of several 100 to several 1000 are feasible. This architecture saves land, water, nitrate and phosphate resources, alleviating the “food vs. biofuel” concerns, and paving the pathway for food and energy sovereignty.

    摘要翻译: 介绍了一种用于生产材料产品的新型连续流动养殖​​方法。 它基于3D SansSoil(无土壤)移动多层架构,包括旅行种子放大器,TSA概念,其特征在于种植层中连续种植种子质量mi,并同步收获放大质量M = Gsthmi,其中 Gsth是收获TSA增益的种子,并将内在种子压缩到收获时间τsth,乘以N /τsth,其中N是旅行层数。 TSA连续流动养殖​​增加了体积生产力和3D产量。 在3D塔架构中,对于高度短的植物,每公顷的年产量在几百到几千的范围内增加是可行的。 这种结构节省了土地,水,硝酸盐和磷酸盐资源,减轻了“食物与生物燃料”的关切,为粮食和能源主权铺平了道路。

    Probes and methods of making probes using folding techniques
    88.
    发明授权
    Probes and methods of making probes using folding techniques 失效
    使用折叠技术制作探针的探针和方法

    公开(公告)号:US07765607B2

    公开(公告)日:2010-07-27

    申请号:US11453572

    申请日:2006-06-15

    申请人: Sadeg M. Faris

    发明人: Sadeg M. Faris

    IPC分类号: H01J37/26 G21K5/04

    CPC分类号: G01Q70/16 H01L29/1606

    摘要: Probes and methods of making probes are provided, particularly probes or nano-tools having tip active areas of extremely small dimensions, e.g., on the order of one angstrom to a few nanometers. One method of making a nano-tool includes forming a composite including a tool layer less than 10 nm thick on a substrate layer, subtracting a region of the substrate layer at least partially through the thickness of the substrate layer, thereby exposing a well surface, and folding the composite so that portions of the tool layer surface diverge and portions of the well surface converge, wherein an outer crease of the folded tool layer is a nanotool active area. Another method of making a nano-tool includes forming a composite including a tool layer less than 10 nm thick on a substrate, subtracting a region of the substrate layer at least partially through the thickness of the substrate layer, thereby exposing a well surface, and folding the composite so that portions of the tool layer surface diverge and portions of the well surface converge, wherein an outer crease of the folded tool layer is a nanotool active area, whereby the tip may be cut mechanically or altered to expose two probe active areas. The herein probes may be very useful in systems and methods that benefit from probes having resolution capabilities less than the dimensions of the objects to be analyzed.

    摘要翻译: 提供探针和探针的方法,特别是具有极小尺寸的尖端活性区域的探针或纳米工具,例如大约一埃至几纳米。 制造纳米工具的一种方法包括在衬底层上形成包括小于10nm厚的工具层的复合材料,至少部分地减去衬底层的区域,从而暴露阱表面, 并且折叠所述复合材料,使得所述工具层表面的部分发散并且所述孔表面的部分会聚,其中所述折叠工具层的外部折痕是纳米工具的有效区域。 制造纳米工具的另一种方法包括在衬底上形成包括小于10nm厚的工具层的复合材料,至少部分地通过衬底层的厚度减去衬底层的区域,从而暴露阱表面,以及 折叠复合材料,使得工具层表面的部分发散并且孔表面的部分会聚,其中折叠的工具层的外部折痕是纳米工具有源区域,由此尖端可被机械地切割或改变以暴露两个探针有源区域 。 本文中的探针可能在受益于具有小于待分析对象的尺寸的分辨能力的探针的系统和方法中非常有用。

    Internet-based method of and system for monitoring space-time coordinate information
    89.
    发明申请
    Internet-based method of and system for monitoring space-time coordinate information 审中-公开
    基于互联网的方法和系统,用于监视时空坐标信息

    公开(公告)号:US20090063675A1

    公开(公告)日:2009-03-05

    申请号:US12077731

    申请日:2008-03-20

    IPC分类号: G06F15/173

    摘要: An Internet-based method of and system for monitoring space-time coordinate information and biophysiological state information collected from an animate object moving along a course through the space-time continuum. The Internet-based system comprise a wireless GSU-enabled client network device affixed to the body of an animate object. The wireless device includes a global synchronization unit (GSU) for automatically generating time and space (TS) coordinate information corresponding to the time and space coordinate of the animate object with respect to a globally referenced coordinate system, as the animate object moves along a course through the space time continuum. The device also includes biophysiological state sensor affixed to the body of the animate object, for automatically sensing the biophysiological state of the animate object and generating biophysiological state information indicative of the sensed biophysiological state of the animate object along its course. The wireless device also includes a wireless date transmitter for transmitting the TS coordinate information and the biophysiological state information through free-space. A TS-stamping based tracking server receives the TS coordinate information and the biophysiological state information through in a wireless manner, and stores the same as the animate object moves along its course. An Internet information server serves Internet-based documents containing the collected TS coordinate and biophysiological state information. An Internet-enabled client system enables authorized persons to view the served Internet-based documents and monitor the collected TS coordinate and biophysiological state information, for various purposes.

    摘要翻译: 一种基于互联网的方法和系统,用于监测从沿着通过时空连续体的过程移动的动画对象收集的时空坐标信息和生物生理状态信息。 基于因特网的系统包括固定到动画对象的主体的无线GSU使能的客户端网络设备。 无线设备包括全局同步单元(GSU),用于当动画对象沿着一个路线移动时,自动生成对应于动画对象相对于全局参考坐标系的时间和空间坐标的时间和空间(TS)坐标信息 通过时空连续体。 该装置还包括固定在动画对象的身体上的生物物理状态传感器,用于自动检测动画对象的生物生理状态,并产生生物生理状态信息,该信息表示该动画对象沿其过程的感测生物生理状态。 无线设备还包括用于通过自由空间发送TS坐标信息和生物生理状态信息的无线日期发送器。 基于TS-冲印的跟踪服务器通过无线方式接收TS坐标信息和生物生理状态信息,并且存储与动画对象沿着其进程移动的信息。 互联网信息服务器提供包含收集的TS坐标和生物生理状态信息的基于因特网的文档。 支持因特网的客户端系统使得授权人员能够查看所提供的基于Internet的文档,并监视所收集的TS坐标和生物物理状态信息,以用于各种目的。

    Electrochemical lithography memory system and method
    90.
    发明授权
    Electrochemical lithography memory system and method 失效
    电化学光刻记忆系统及方法

    公开(公告)号:US07388767B2

    公开(公告)日:2008-06-17

    申请号:US11180897

    申请日:2005-07-13

    申请人: Sadeg M. Faris

    发明人: Sadeg M. Faris

    IPC分类号: G11C19/08

    摘要: Electronic memory devices fabricated using nanolithography techniques enables rapid and reliable storage of data on a substrate. One such device includes a memory access head, which includes a conductive member and an insulative member. The conductive member includes a proximal conductive tip, a distal conductive tip, and a body portion. The body portion is embedded in the insulative member. The device further includes a substrate adjacent to the distal conductive tip, an electrolyte disposed between the distal conductive tip and the substrate; and a microchip in communication with the proximal conductive tip.

    摘要翻译: 使用纳米光刻技术制造的电子存储器件使得能够在衬底上快速可靠地存储数据。 一种这样的装置包括存储器存取头,其包括导电构件和绝缘构件。 导电构件包括近端导电尖端,远端导电尖端和主体部分。 主体部分嵌入在绝缘构件中。 所述装置还包括邻近所述远侧导电尖端的基底,设置在所述远侧导电尖端和所述基底之间的电解质; 以及与近端导电尖端连通的微芯片。