-
公开(公告)号:US10685675B2
公开(公告)日:2020-06-16
申请号:US15987037
申请日:2018-05-23
申请人: Jasmin Ajanovic
发明人: Jasmin Ajanovic
IPC分类号: G11B7/0065 , G11B7/09 , G11B7/1362 , G11B7/127 , G11B7/005 , G11B7/013 , G11B7/007 , G11B7/085
摘要: Systems and methods for long-term non-volatile non-rotating optical storage of digital information rely on storage elements that include optical storage media, an access subsystem configured to access bits of information from one of the storage elements, and a support structure configured to support multiple storage elements. A laser used to retrieve and/or record bits of digital information may be moved along two orthogonal dimensions while the storage element is non-rotating.
-
公开(公告)号:US09990953B1
公开(公告)日:2018-06-05
申请号:US15675522
申请日:2017-08-11
申请人: Jasmin Ajanovic
发明人: Jasmin Ajanovic
摘要: Systems and methods for long-term non-volatile non-rotating optical storage of digital information rely on storage elements that include optical storage media, an access subsystem configured to access bits of information from one of the storage elements, and a support structure configured to support multiple storage elements. A laser used to retrieve and/or record bits of digital information may be moved along two orthogonal dimensions while the storage element is non-rotating.
-
公开(公告)号:US08811430B2
公开(公告)日:2014-08-19
申请号:US13428068
申请日:2012-03-23
申请人: Mahesh Wagh , Abhishek Singhal , Jasmin Ajanovic
发明人: Mahesh Wagh , Abhishek Singhal , Jasmin Ajanovic
CPC分类号: H04L69/22 , G06F13/385 , Y02D10/14 , Y02D10/151
摘要: In one embodiment, the present invention includes a fabric on a first semiconductor die to communicate with at least one agent on the die according to an on-chip protocol and a packetization layer coupled to the fabric to receive command and data information from the fabric on multiple links and to packetize the information into a packet for transmission from the die to another die via an in-package packetized link. Other embodiments are described and claimed.
摘要翻译: 在一个实施例中,本发明包括在第一半导体管芯上的结构,以根据片上协议与管芯上的至少一个代理进行通信,以及耦合到该结构的分组层,以从该结构接收命令和数据信息 多个链路并且将信息分组成分组,以经由内部分组化链路从芯片传输到另一个管芯。 描述和要求保护其他实施例。
-
公开(公告)号:US20130132622A1
公开(公告)日:2013-05-23
申请号:US13713635
申请日:2012-12-13
申请人: Jasmin Ajanovic , Mahesh Wagh , Prashant Sethi , Debendra Das Sharma , David J. Harriman , Mark B. Rosenbluth , Ajay V. Bhatt , Peter Barry , Scott Dion Rodgers , Anil Vasudevan , Sridhar Muthrasanallur , James Akiyama , Robert G. Blankenship , Ohad Falik , Avi Mendelson , Ilan Pardo , Eran Tamari , Eliezer Weissmann , Doron Shamia
发明人: Jasmin Ajanovic , Mahesh Wagh , Prashant Sethi , Debendra Das Sharma , David J. Harriman , Mark B. Rosenbluth , Ajay V. Bhatt , Peter Barry , Scott Dion Rodgers , Anil Vasudevan , Sridhar Muthrasanallur , James Akiyama , Robert G. Blankenship , Ohad Falik , Avi Mendelson , Ilan Pardo , Eran Tamari , Eliezer Weissmann , Doron Shamia
IPC分类号: G06F13/42
CPC分类号: G06F12/0831 , G06F1/3203 , G06F1/324 , G06F1/3253 , G06F12/0815 , G06F13/385 , G06F13/4045 , G06F13/4068 , G06F13/4265 , G06F2212/621 , H04L12/66 , Y02D10/126 , Y02D10/151
摘要: A method and apparatus forenhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.
摘要翻译: 这里描述了诸如外围组件互连Express(PCIe)之类的串行点到点互连体系结构的增强/扩展的方法和装置。 提供了时间和地点缓存提示和预取提示,以改进系统范围的缓存和预取。 包括用于仲裁系统设备/资源之间的所有权的原子操作的消息代码,以便有效地访问/拥有共享数据。 提供的松散的事务排序,同时将对应的事务优先级保持到内存位置,以确保数据完整性和高效的内存访问。 包括有功功率子状态及其设置以允许更有效的电源管理。 并且,提供设备本地存储器在主机地址空间中的缓存以及设备本地存储器地址空间中的系统存储器的缓存,以提高存储器访问的带宽和延迟。
-
公开(公告)号:US20130111086A1
公开(公告)日:2013-05-02
申请号:US13691106
申请日:2012-11-30
申请人: Jasmin Ajanovic , Mahesh Wagh , Prashant Sethi , Debendra Das Sharma , David J. Harriman , Mark B. Rosenbluth , Ajay V. Bhatt , Peter Barry , Scott Dion Rodgers , Anil Vasudevan , Sridhar Muthrasanallur , James Akiyama , Robert G. Blankenship , Ohad Falik , Avi Mendelson , Ilan Pardo , Eran Tamari , Eliezer Weissmann , Doron Shamia
发明人: Jasmin Ajanovic , Mahesh Wagh , Prashant Sethi , Debendra Das Sharma , David J. Harriman , Mark B. Rosenbluth , Ajay V. Bhatt , Peter Barry , Scott Dion Rodgers , Anil Vasudevan , Sridhar Muthrasanallur , James Akiyama , Robert G. Blankenship , Ohad Falik , Avi Mendelson , Ilan Pardo , Eran Tamari , Eliezer Weissmann , Doron Shamia
IPC分类号: G06F13/38
CPC分类号: G06F12/0831 , G06F1/3203 , G06F1/324 , G06F1/3253 , G06F12/0815 , G06F13/385 , G06F13/4045 , G06F13/4068 , G06F13/4265 , G06F2212/621 , H04L12/66 , Y02D10/126 , Y02D10/151
摘要: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.
摘要翻译: 这里描述了用于增强/扩展串行点对点互连架构的方法和装置,例如外围组件互连Express(PCIe)。 提供了时间和地点缓存提示和预取提示,以改进系统范围的缓存和预取。 包括用于仲裁系统设备/资源之间的所有权的原子操作的消息代码,以便有效地访问/拥有共享数据。 提供的松散的事务排序,同时将对应的事务优先级保持到内存位置,以确保数据完整性和高效的内存访问。 包括有功功率子状态及其设置以允许更有效的电源管理。 并且,提供设备本地存储器在主机地址空间中的缓存以及设备本地存储器地址空间中的系统存储器的缓存,以提高存储器访问的带宽和延迟。
-
公开(公告)号:US20130097353A1
公开(公告)日:2013-04-18
申请号:US13706575
申请日:2012-12-06
申请人: Jasmin Ajanovic , Mahesh Wagh , Prashant Sethi , Debendra Das Sharma , David J. Harriman , Mark B. Rosenbluth , Ajay V. Bhatt , Peter Barry , Scott Dion Rodgers , Anil Vasudevan , Sridhar Muthrasanallur , James Akiyama , Robert G. Blankenship , Ohad Falik , Avi Mendelson , Ilan Pardo , Eran Tamari , Eliezer Weissmann , Doron Shamia
发明人: Jasmin Ajanovic , Mahesh Wagh , Prashant Sethi , Debendra Das Sharma , David J. Harriman , Mark B. Rosenbluth , Ajay V. Bhatt , Peter Barry , Scott Dion Rodgers , Anil Vasudevan , Sridhar Muthrasanallur , James Akiyama , Robert G. Blankenship , Ohad Falik , Avi Mendelson , Ilan Pardo , Eran Tamari , Eliezer Weissmann , Doron Shamia
IPC分类号: G06F13/40
CPC分类号: G06F12/0831 , G06F1/3203 , G06F1/324 , G06F1/3253 , G06F12/0815 , G06F13/385 , G06F13/4045 , G06F13/4068 , G06F13/4265 , G06F2212/621 , H04L12/66 , Y02D10/126 , Y02D10/151
摘要: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.
-
公开(公告)号:US20120284486A1
公开(公告)日:2012-11-08
申请号:US13550966
申请日:2012-07-17
申请人: Zhen Fang , Mahesh Wagh , Jasmin Ajanovic , Michael E. Espig , Ravishankar Iyer
发明人: Zhen Fang , Mahesh Wagh , Jasmin Ajanovic , Michael E. Espig , Ravishankar Iyer
IPC分类号: G06F12/08
CPC分类号: G06F12/1036 , G06F12/0292 , G06F12/0888 , G06F12/10 , G06F12/1027 , G06F2212/206
摘要: Methods and apparatus for control of On-Die System Fabric (OSF) blocks are described. In one embodiment, a shadow address corresponding to a physical address may be stored in response to a user-level request and a logic circuitry (e.g., present in an OSF) may determine the physical address from the shadow address. Other embodiments are also disclosed.
摘要翻译: 描述了用于控制片上系统结构(OSF)块的方法和装置。 在一个实施例中,响应于用户级请求可以存储对应于物理地址的影子地址,并且逻辑电路(例如,存在于OSF中)可以从影子地址确定物理地址。 还公开了其他实施例。
-
公开(公告)号:US20120254563A1
公开(公告)日:2012-10-04
申请号:US13493606
申请日:2012-06-11
申请人: Jasmin Ajanovic , Mahesh Wagh , Prashant Sethi , Debendra Das Sharma , David Harriman , Mark Rosenbluth , Ajay Bhatt , Peter Barry , Scott Dion Rodgers , Anil Vasudevan , Sridhar Muthrasanallur , James Akiyama , Robert Blankenship , Ohad Falik , Avi Abraham Mendelson , Ilan Pardo , Eran Tamari , Eliezer Weissmann , Doron Shamia
发明人: Jasmin Ajanovic , Mahesh Wagh , Prashant Sethi , Debendra Das Sharma , David Harriman , Mark Rosenbluth , Ajay Bhatt , Peter Barry , Scott Dion Rodgers , Anil Vasudevan , Sridhar Muthrasanallur , James Akiyama , Robert Blankenship , Ohad Falik , Avi Abraham Mendelson , Ilan Pardo , Eran Tamari , Eliezer Weissmann , Doron Shamia
IPC分类号: G06F12/00
CPC分类号: G06F12/0831 , G06F1/3203 , G06F1/324 , G06F1/3253 , G06F12/0815 , G06F13/385 , G06F13/4045 , G06F13/4068 , G06F13/4265 , G06F2212/621 , H04L12/66 , Y02D10/126 , Y02D10/151
摘要: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.
-
公开(公告)号:US08230120B2
公开(公告)日:2012-07-24
申请号:US13073149
申请日:2011-03-28
申请人: Jasmin Ajanovic , Mahesh Wagh , Prashant Sethi , Debendra Das Sharma , David Harriman , Mark Rosenbluth , Ajay Bhatt , Peter Barry , Scott Dion Rodgers , Anil Vasudevan , Sridhar Muthrasanallur , James Akiyama , Robert Blankenship , Ohad Falik , Abraham Mendelson , Ilan Pardo , Eran Tamari , Eliezer Weissmann , Doron Shamia
发明人: Jasmin Ajanovic , Mahesh Wagh , Prashant Sethi , Debendra Das Sharma , David Harriman , Mark Rosenbluth , Ajay Bhatt , Peter Barry , Scott Dion Rodgers , Anil Vasudevan , Sridhar Muthrasanallur , James Akiyama , Robert Blankenship , Ohad Falik , Abraham Mendelson , Ilan Pardo , Eran Tamari , Eliezer Weissmann , Doron Shamia
CPC分类号: G06F12/0831 , G06F1/3203 , G06F1/324 , G06F1/3253 , G06F12/0815 , G06F13/385 , G06F13/4045 , G06F13/4068 , G06F13/4265 , G06F2212/621 , H04L12/66 , Y02D10/126 , Y02D10/151
摘要: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.
-
公开(公告)号:US20120176909A1
公开(公告)日:2012-07-12
申请号:US13428068
申请日:2012-03-23
申请人: Mahesh Wagh , Abhishek Singhal , Jasmin Ajanovic
发明人: Mahesh Wagh , Abhishek Singhal , Jasmin Ajanovic
CPC分类号: H04L69/22 , G06F13/385 , Y02D10/14 , Y02D10/151
摘要: In one embodiment, the present invention includes a fabric on a first semiconductor die to communicate with at least one agent on the die according to an on-chip protocol and a packetization layer coupled to the fabric to receive command and data information from the fabric on multiple links and to packetize the information into a packet for transmission from the die to another die via an in-package packetized link. Other embodiments are described and claimed.
摘要翻译: 在一个实施例中,本发明包括在第一半导体管芯上的结构,以根据片上协议与管芯上的至少一个代理进行通信,以及耦合到该结构的分组层,以从该结构接收命令和数据信息 多个链路并且将信息分组成分组,以经由内部分组化链路从芯片传输到另一个管芯。 描述和要求保护其他实施例。
-
-
-
-
-
-
-
-
-