公开(公告)号：USD651542S1

公开(公告)日：2012-01-03

申请号：US29391729

申请日：2011-05-12

申请人： Yuuki Nagasawa ,  Isao Abe

设计人： Yuuki Nagasawa ,  Isao Abe

公开(公告)号：US20110284618A1

公开(公告)日：2011-11-24

申请号：US13111252

申请日：2011-05-19

申请人： Noriaki MUKAI ,  Isao Abe

发明人： Noriaki MUKAI ,  Isao Abe

IPC分类号： B23Q15/20

CPC分类号： H01L24/742 ,  H01L24/11 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014

摘要： A micro-bump forming apparatus includes: a film attachment mechanism that attaches a film on a surface of a substrate; exposure and developing mechanisms that provide openings in the film on electrodes formed on the substrate; a solder ball loading mechanism that loads solder balls into the openings, a flux printing mechanism that prints flux through the openings loaded with the solder balls; a reflow part that heats the solder balls to form solder bumps; and a film detachment mechanism that detaches the film from the surface of the substrate. After a loading head loads the solder balls into the openings of the film, a controller of the solder ball loading mechanism allows a line sensor to operate to check a loading state of the solder balls, and determines, based on the check result, whether to reload the solder balls.

摘要翻译： 微凸块形成装置包括：膜附着机构，其将膜附着在基板的表面上; 曝光和显影机构，其在形成在基板上的电极上的膜中提供开口; 将焊球加载到开口中的焊球加载机构，通过装载有焊料球的开口打印焊剂的焊剂打印机构; 回流部，其加热焊球以形成焊料凸块; 以及将膜从基板的表面分离的膜分离机构。 在加载头将焊球加载到膜的开口中之后，焊球加载机构的控制器允许线传感器操作以检查焊球的负载状态，并且基于检查结果确定是否 重新加载焊球。

公开(公告)号：US5283565A

公开(公告)日：1994-02-01

申请号：US939708

申请日：1992-09-02

申请人： Satoshi Suzuki ,  Isao Abe

发明人： Satoshi Suzuki ,  Isao Abe

IPC分类号： G09G3/18 ,  G09G3/36 ,  H03K19/0185 ,  H03K19/20 ,  H03K3/01

CPC分类号： H03K19/018521 ,  G09G3/3685

摘要： A multimode input circuit comprises a input terminal, first outputting circuit including a buffer circuit, for receiving a first signal having a first amplitude variation via the input terminal and outputting the first signal of a preset potential; second outputting circuit for receiving a second signal having a second amplitude variation different from the first amplitude variation via the input terminal and outputting a third signal of a preset potential, the second outputting circuit including a power source supplying terminal for supplying the same potential as the maximum potential of the second signal, a first FET having a source connected to said power source supplying terminal, a gate supplied with a selection signal for specifying one of the input signals to be selected by the multimode input circuit and a drain, and a second FET formed to make a complementary structure together with the first FET and having a drain connected to the drain of the first FET, a gate connected to the input terminal and a source connected to a circuit ground, and selecting circuit for receiving the first and third signals from the first and second outputting circuit and a selection signal from the exterior and selecting and outputting one of the first and third signals according to the state of the selection signal.

摘要翻译： 多模输入电路包括输入端，包括缓冲电路的第一输出电路，用于经由输入端接收具有第一振幅变化的第一信号，并输出预置电位的第一信号; 第二输出电路，用于经由输入端子接收具有与第一振幅变化不同的第二振幅变化的第二信号，并输出预设电位的第三信号，第二输出电路包括用于提供与第一振幅变化相同的电位的电源供应端 第二信号的最大电位，具有连接到所述电源供给端的源极的第一FET，提供有用于指定由多模输入电路和漏极选择的输入信号之一的选择信号的栅极和第二 形成为与第一FET一起形成互补结构的FET，并且具有连接到第一FET的漏极的漏极，连接到输入端子的栅极和连接到电路接地的源极，以及用于接收第一和第三FET的选择电路 来自第一和第二输出电路的信号和来自外部的选择信号，并选择并输出其中之一 第一和第三信号根据选择信号的状态。

公开(公告)号：US5124763A

公开(公告)日：1992-06-23

申请号：US651435

申请日：1991-02-07

申请人： Tsutomu Takahasi ,  Takeshi Suyama ,  Satoshi Suzuki ,  Isao Abe ,  Akihiro Sueda

发明人： Tsutomu Takahasi ,  Takeshi Suyama ,  Satoshi Suzuki ,  Isao Abe ,  Akihiro Sueda

IPC分类号： H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/092 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78

CPC分类号： H01L29/402 ,  H01L27/0927 ,  H01L29/7813 ,  H01L29/7835

摘要： A P-well region is provided in a semiconductor substrate of N-type. A P-channel MOSFET is arranged in the N-type substrate while an N-channel MOSFET is arranged in the P-well region. The drain regions of the respective MOSFETs consist of high concentration impurity diffused regions and low concentration impurity diffused regions arranged about the respective high concentration impurity diffused regions. Also, a drain electrode is provided to cover the entire of the high and low concentration impurity diffused regions.

公开(公告)号：US5031149A

公开(公告)日：1991-07-09

申请号：US425947

申请日：1989-10-24

申请人： Osamu Matsumoto ,  Yuji Nakano ,  Isao Abe ,  Mika Saeki

发明人： Osamu Matsumoto ,  Yuji Nakano ,  Isao Abe ,  Mika Saeki

IPC分类号： G11C17/00 ,  G11C5/02 ,  G11C11/407 ,  G11C16/06 ,  G11C16/08 ,  G11C16/10 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： G11C5/025 ,  G11C16/08 ,  G11C16/10

摘要： A non-volatile semiconductor device includes word lines, and a non-volatile memory cell array having a plurality of non-volatile memory cells respectively connected to the word lines. The non-volatile semiconductor memory device further includes a level shifter for receiving, in a programmming mode, an address signal supplied from outside, and shifting the potential level of the address signal to a higher programming potential level, and a row decoder, provided between the word lines and the level shifter, for receiving and decoding the address signal which has been shifted by the level shifter, and selecting one of the word lines in accordance with the result of the decoding of the address signal, and setting the potential of the selected word line to the programming potential level.