公开(公告)号：US07804859B2

公开(公告)日：2010-09-28

申请号：US12164624

申请日：2008-06-30

申请人： D. Matthew Landry ,  Phillip A. Callahan

发明人： D. Matthew Landry ,  Phillip A. Callahan

IPC分类号： H04J3/04

CPC分类号： H03K17/689 ,  H04L12/40039

摘要： In a particular embodiment, a system includes an input/output (I/O) interface adapted to couple to a network cable to receive power and data and includes a physical transport layer (PHY) circuit including multiple channels coupled to the I/O interface. The PHY circuit is adapted to send data to and receive data from a network device via the multiple channels. The system further includes a multiplexer circuit coupled to the PHY circuit to multiplex data from the multiple channels into a multiplexed data stream and includes an isolation barrier circuit coupled to the multiplexer circuit and to a particular circuit. The isolation barrier is adapted to electrically isolate a particular circuit from the multiplexer circuit, the PHY circuit, and the I/O interface.

摘要翻译： 在特定实施例中，系统包括适于耦合到网络电缆以接收功率和数据的输入/输出（I / O）接口，并且包括物理传输层（PHY）电路，其包括耦合到I / O接口的多个信道 。 PHY电路适用于经由多个信道向网络设备发送数据和从数据接收数据。 该系统还包括耦合到PHY电路以将来自多个通道的数据复用到多路复用数据流中的多路复用器电路，并且包括耦合到多路复用器电路和特定电路的隔离屏障电路。 隔离屏障适于将特定电路与多路复用器电路，PHY电路和I / O接口电隔离。

公开(公告)号：US07769056B2

公开(公告)日：2010-08-03

申请号：US11661075

申请日：2005-06-27

申请人： Florian Hartwich

发明人： Florian Hartwich

IPC分类号： H04J3/04

CPC分类号： G06F13/4027

摘要： A communication interface element for a communication module is provided, which module contains a message memory and a first data path to and from the message memory via which data and/or messages are transmitted to and from the message memory. The communication interface element provides an additional, second data path in the communication module and includes switching arrangement configured in such a way that predefinable data and/or messages of the first data path are transmitted over the additional, second data path.

摘要翻译： 提供了一种用于通信模块的通信接口元件，该模块包含消息存储器和到消息存储器的第一条数据路径，经由该消息存储器向消息存储器传送数据和/或消息。 通信接口元件在通信模块中提供附加的第二数据路径，并且包括以这样的方式配置的交换布置，使得可以在附加的第二数据路径上传送第一数据路径的预定义数据和/或消息。

公开(公告)号：USRE41417E1

公开(公告)日：2010-07-06

申请号：US11257483

申请日：2005-10-24

申请人： John Paul Russell ,  Christopher David Murton ,  David Michael Goodman ,  Christopher Thomas William Ramsden ,  James Shields

发明人： John Paul Russell ,  Christopher David Murton ,  David Michael Goodman ,  Christopher Thomas William Ramsden ,  James Shields

IPC分类号： H04J3/04

CPC分类号： H04J3/0632 ,  H04J3/1611 ,  H04J3/1617 ,  H04J2203/0094

摘要： A method of transmitting OSI layer 2 datacoms data by direct incorporation into a plurality of synchronous digital hierarchy virtual containers is disclosed, in which a higher bit rate OSI layer 2 data frame is multiplexed into a plurality of lower bit rate SDH (or SONET) virtual containers, which are transmitted simultaneously and in parallel over a synchronous communications network. The plurality of virtual containers are virtually concatenated by association of the payloads of the plurality of virtual containers. Re-assembly of the OSI layer 2 data frames from a plurality of virtually concatenated VCs is achieved by storing each received VC payload corresponding to an OSI layer 2 data frame in a corresponding respective memory location, and alternately reading interleaved bytes from the plurality of payloads under control of a plurality of read pointers.

摘要翻译： 公开了一种通过直接并入多个同步数字分层虚拟容器来发送OSI第二层数据通信数据的方法，其中较高比特率的OSI层2数据帧被多路复用到多个低比特率SDH（或SONET）虚拟容器 容器，其通过同步通信网络同时并行地传输。 多个虚拟容器通过多个虚拟容器的有效载荷的关联来虚拟连接。 通过将对应于OSI层2数据帧的每个接收的VC有效载荷存储在对应的各个存储器位置中，并且从多个有效负载中交替地读取交错字节来实现来自多个虚拟级联VC的OSI层2数据帧的重新组合 在多个读指针的控制下。

公开(公告)号：US20100142947A1

公开(公告)日：2010-06-10

申请号：US12632588

申请日：2009-12-07

申请人： Jong-yoon Shin ,  Jong-ho Kim ,  Je-soo Ko

发明人： Jong-yoon Shin ,  Jong-ho Kim ,  Je-soo Ko

IPC分类号： H04J3/04 ,  H04J14/00

CPC分类号： H04J3/1652

摘要： A pseudo-inverse multiplexing/de-multiplexing apparatus and method are disclosed. The pseudo-inverse multiplexing apparatus maps a client signal to an OPUk-Xpv signal. The OPUk-Xpv signal has a payload area that can be segmented into a plurality of tributary slots and an overhead area into which frame configuration information related to the tributary slots is inserted. The pseudo-inverse multiplexing apparatus decides the number of tributary slots to be used to map client signals, according to a bit rate or bit tolerance of the client signals, and maps the client signals using the determined number of tributary slots. Accordingly, it is possible to map or frame a variety of client signals.

摘要翻译： 公开了一种伪逆多路复用/解复用装置和方法。 伪逆多路复用装置将客户端信号映射到OPUk-Xpv信号。 OPUk-Xpv信号具有能够被分割成多个支路时隙的有效载荷区域和插入与支路时隙相关的帧配置信息的开销区域。 伪反向多路复用装置根据客户端信号的比特率或比特容差来决定用于映射客户端信号的支路时隙数量，并使用确定数量的支路时隙对客户端信号进行映射。 因此，可以映射或框架各种客户端信号。

公开(公告)号：US07672340B2

公开(公告)日：2010-03-02

申请号：US10349560

申请日：2003-01-23

申请人： Daniel Schoch ,  Ichiro Fujimori

发明人： Daniel Schoch ,  Ichiro Fujimori

IPC分类号： H04J3/04

CPC分类号： G01R31/31723 ,  G01R31/3187 ,  H04J3/14 ,  H04L1/243

摘要： A bit stream multiplexer includes an input ordering block, a plurality of multiplexers, an output ordering block, and a Pseudo Random Bit Stream (PRBS) function. The input ordering block is operates to receive a first plurality of transmit bit streams at a first bit rate, order the first plurality of transmit bit streams based upon a first order select signal, and produce a first plurality of ordered transmit bit streams at the first bit rate. The input ordering block may also deskew the first plurality of transmit bit streams. The plurality of multiplexers operate to receive the first plurality of ordered transmit bit streams at the first bit rate and produce an interface plurality of transmit bit streams at an interface bit rate. The output ordering block operates to order the interface plurality of transmit bit streams based upon an interface order select signal. The PRBS function produces a PRBS that is coupled to at least one of the interface plurality of transmit bit streams. A bit stream demultiplexer is similarly constructed.

摘要翻译： 比特流多路复用器包括输入排序块，多个多路复用器，输出排序块和伪随机比特流（PRBS）功能。 输入排序块用于以第一比特率接收第一多个发送比特流，基于第一阶选择信号对第一多个发送比特流进行排序，并且在第一比特流产生第一多个有序发送比特流 比特率。 输入排序块还可能使第一多个发送比特流偏斜。 多个多路复用器操作以第一比特率接收第一多个有序发送比特流，并以接口比特率产生多个发送比特流的接口。 输出排序块基于接口顺序选择信号进行操作以对接口多个发送位流进行排序。 PRBS功能产生耦合到至少一个接收多个发送比特流的PRBS。 类似地构造位流解复用器。

公开(公告)号：US07656909B1

公开(公告)日：2010-02-02

申请号：US10430038

申请日：2003-05-05

申请人： Robert H. Sternowski

发明人： Robert H. Sternowski

IPC分类号： H04J3/04

CPC分类号： H04J1/08

摘要： A self-steering autoplexer for transmitter multicoupling has a linear summer for summing transmit signals at several frequencies. An input demultiplexer uses input diplexers to separate and route the transmit signals by frequency. Amplifiers amplify the separated transmit signals from the input demultiplexer. An output multiplexer uses diplexers to combining the amplified and separated transmit signals into a combined transmit signal for transmission by an antenna. The output multiplexer may have an even multiplexer for combining the transmit signals into even band transmit signals for transmission by an even band antenna and an odd multiplexer for combining the transmit signals into odd band transmit signals for transmission by the antenna. The input diplexers of the input demultiplexer comprise diplexers connected such that the transmit signals are applied to outputs of the diplexers to separate the transmit signals into low and high frequency signals.

摘要翻译： 用于发射机多重耦合的自我转向自动复合器具有用于在几个频率上求和发送信号的线性加法器。 输入解复用器使用输入双工器按频率分离和路由发送信号。 放大器放大来自输入解复用器的分离的发送信号。 输出多路复用器使用双工器将放大和分离的发射信号组合成组合的发射信号以供天线传输。 输出多路复用器可以具有偶数多路复用器，用于将发射信号组合成均匀带发射信号，以用于由均匀带天线和奇数多路复用器传输，用于将发送信号组合成奇数带发射信号以供天线传输。 输入解复用器的输入双工器包括连接的双工器，使得发射信号被施加到双工器的输出端以将发射信号分离成低频和高频信号。

公开(公告)号：US07649846B2

公开(公告)日：2010-01-19

申请号：US11394892

申请日：2006-03-31

申请人： Yukihiro Nakagawa ,  Takeshi Shimizu

发明人： Yukihiro Nakagawa ,  Takeshi Shimizu

IPC分类号： G01R31/08 ,  G06F11/00 ,  H04J3/14 ,  H04J1/16 ,  H04L1/00 ,  H04L12/26 ,  H04L12/50 ,  H04Q11/00 ,  H04L12/56 ,  H04J3/04 ,  H04L12/20

CPC分类号： H04L41/0896 ,  H04L47/125 ,  H04L69/14 ,  Y02D50/30

摘要： To enable quick movement of communications among links in a link aggregation group, network element use a purge mechanism. A network element implementing the purge mechanism may disable distribution of additional frames to output queues associated with aggregated ports and potentially drop some or all frames from the output queues associated with aggregated ports. In conjunction with the dropping of frames, the network element may exchange one or more marker messages and marker responses with a remote network element. After receiving appropriate responses, the network element may restart distribution of frames to the affected ports.

摘要翻译： 为了使链路聚合组中链路之间的通信能够快速移动，网元使用清除机制。 实现清除机制的网络元件可以禁止将附加帧分配到与聚合端口相关联的输出队列，并且可能从与聚合端口相关联的输出队列中丢弃一些或所有帧。 结合帧的丢弃，网络元件可以与远程网络元件交换一个或多个标记消息和标记响应。 在收到适当的响应后，网元可能会重新分配帧到受影响的端口。

公开(公告)号：US20090323730A1

公开(公告)日：2009-12-31

申请号：US12105845

申请日：2008-04-18

申请人： Joseph Caltagirone ,  James Dewey Parker ,  Brett Oliver

发明人： Joseph Caltagirone ,  James Dewey Parker ,  Brett Oliver

IPC分类号： H04J3/04

CPC分类号： G06F13/4291 ,  H04L25/14 ,  H04L25/4904

摘要： Methods and apparatus are provided for a system for aligning data. The apparatus comprises a demultiplexing component adapted to bifurcate a DDR data stream into first and second SDR data streams, a sequence detection component coupled to the demultiplexing component and adapted to detect a pattern of sequential bit values in the first SDR data stream, and a data alignment component coupled to the demultiplexing component and to the sequence detection component, the data alignment component adapted to place the second SDR data stream in alignment with the pattern of sequential bit values in the first SDR data stream.

摘要翻译： 为数据对齐的系统提供了方法和装置。 该装置包括：解复用部件，适于将DDR数据流分为第一和第二SDR数据流;序列检测部件，耦合到解复用部件，并适于检测第一SDR数据流中的连续位值的模式;以及数据 对齐分量耦合到解复用部件和序列检测部件，数据对准部件适于将第二SDR数据流与第一SDR数据流中的顺序位值的模式对准。

公开(公告)号：US07636368B2

公开(公告)日：2009-12-22

申请号：US11451969

申请日：2006-06-12

申请人： Kyung-Hun Jang ,  Young-Soo Kim ,  Jung-Hoon Suh ,  Dong-Jun Lee ,  Hyun-Ki Ahn ,  Tae-Jin Lee

发明人： Kyung-Hun Jang ,  Young-Soo Kim ,  Jung-Hoon Suh ,  Dong-Jun Lee ,  Hyun-Ki Ahn ,  Tae-Jin Lee

IPC分类号： H04L12/56 ,  H04J3/04

CPC分类号： H04L47/2441 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9042 ,  H04L49/9094

摘要： A buffering apparatus and method for packet aggregation are provided. A buffer buffers packet data to be transmitted on a frame basis. An aggregator represents the positions of the buffered packet data in an Access Category (AC) bitmap and a Traffic Identifier (TID) bitmap according to an AC and a TID of the buffered packet data, and provides a bitmap indicating the positions of packet data to be aggregated according to an aggregation condition to an aggregation controller. The aggregation controller aggregates the packet data based on the bitmap received from the aggregator, constructs an aggregation Physical Service Data Unit (PSDU) with the aggregated packet data, and transmits the aggregation PSDU to a destination.

摘要翻译： 提供了一种用于分组聚合的缓冲装置和方法。 缓冲器缓冲以帧为基础发送的分组数据。 聚合器根据缓冲的分组数据的AC和TID，在接入类别（AC）位图和流量标识符（TID）位图中表示缓冲的分组数据的位置，并且提供指示分组数据的位置的位图 根据聚合条件聚合到聚合控制器。 聚合控制器根据从聚合器接收的位图聚合分组数据，使用聚合分组数据构建聚合物理服务数据单元（PSDU），并将聚合PSDU发送到目的地。

公开(公告)号：US07634320B2

公开(公告)日：2009-12-15

申请号：US11669450

申请日：2007-01-31

申请人： Toshio Sakurai

发明人： Toshio Sakurai

IPC分类号： G05B19/18 ,  H04J3/04

CPC分类号： G05B15/02

摘要： An interlock control apparatus for a plurality of control modules each of which controls driving of at least one piece of equipment is of a simplified structure. The interlock control apparatus comprises slave switching apparatuses corresponding respectively to the control modules. Each of the slave switching apparatuses comprises a multiplexing apparatus that produces a multiplexed signal by multiplexing state detecting signals each of which indicates any of a plurality of states of a piece of the equipment whose driving is controlled by the corresponding control module, a storage apparatus that stores the multiplexed signal, a reading apparatus that reads out the stored multiplexed signal, a separating apparatus that separates the read out multiplexed signal so as to produce a plurality of separated signals, a transmitting apparatus that transmits a predetermined separated signal out of the separated signals to the control modules other than the corresponding control module, and at least one controller that controls driving of a corresponding piece of the equipment based on the predetermined separated signals.

摘要翻译： 用于多个控制模块的互锁控制装置，每个控制模块控制至少一件设备的驱动是简化的结构。 互锁控制装置包括分别对应于控制模块的从动切换装置。 每个从属交换装置包括多路复用装置，其通过多路复用状态检测信号来产生多路复用信号，每个状态检测信号表示由对应的控制模块控制其驱动的设备的多个状态中的任何一个状态;存储装置， 存储多路复用信号，读出所存储的多路复用信号的读取装置，分离装置，分离读出的多路复用信号以产生多个分离的信号;发送装置，从分离的信号中发送预定的分离信号 到相应的控制模块之外的控制模块，以及至少一个控制器，其基于预定的分离信号控制对应的设备的驱动。