公开(公告)号：US12020611B2

公开(公告)日：2024-06-25

申请号：US18115800

申请日：2023-03-01

申请人： CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

发明人： Yao Huang ,  Weiyun Huang ,  Yue Long ,  Chao Zeng ,  Meng Li

IPC分类号： G09G3/3266 ,  G09G3/00 ,  G09G3/20 ,  G11C19/28

CPC分类号： G09G3/035 ,  G09G3/20 ,  G11C19/287 ,  G09G2310/0221 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/045 ,  G09G2320/048 ,  G09G2320/064

摘要： A display panel and a display drive method thereof, and a display device are provided. The display panel comprises two parallel and non-overlapping display regions connected to individual scan drive circuits. The display drive method adjusts the pulse width of the light-emitting control signal for each display regions to adjust their respective light-emitting durations within a display period. This method enhances the display quality by avoiding the appearance of a yin-yang screen and improving the display brightness of each display region.

公开(公告)号：US20240203375A1

公开(公告)日：2024-06-20

申请号：US18386179

申请日：2023-11-01

申请人： LG DISPLAY CO., LTD.

发明人： Youngjun CHOI ,  SoJung LEE

IPC分类号： G09G3/36 ,  G09G3/32 ,  G09G3/3266

CPC分类号： G09G3/3677 ,  G09G3/32 ,  G09G3/3266 ,  G09G2300/0426 ,  G09G2310/0267 ,  G09G2310/0291 ,  G09G2320/0295

摘要： The present disclosure provides a gate driving circuit and a display device. An nth stage circuit among a plurality of stage circuits included in a gate driving circuit according to embodiments of the disclosure may include a scan output buffer circuit configured to output a scan signal according to voltages of a Q node and a Qb node, a control circuit including a plurality of transistors to control the voltages of the Q node and the Qb node, the plurality of transistors including a first Q node discharge transistor turned on or off by the voltage of the Qb node to control connection between the Q node and a low-potential voltage node, and a body bias circuit configured to supply a body bias voltage to a body of a first Q node discharge transistor.

公开(公告)号：US20240203364A1

公开(公告)日：2024-06-20

申请号：US18241268

申请日：2023-09-01

申请人： LG DISPLAY CO., LTD.

发明人： SungMin Park ,  Jinu Lee

IPC分类号： G09G3/3291 ,  G09G3/32 ,  G09G3/3266

CPC分类号： G09G3/3291 ,  G09G3/32 ,  G09G3/3266 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/08 ,  G09G2320/0247

摘要： A display panel includes a plurality of subpixels, a plurality of data lines, and a plurality of gate lines. A data driving circuit supplies a data voltage to the data lines. A gate driving circuit supplies a gate signal to the gate lines. A timing controller controls the data driving circuit and the gate driving circuit. A display area of the display panel includes a first area corresponding to the data driving circuit and a second area located outside of the first area. A first data link line group having a linear structure is connected to a first data line group disposed in the first area. A second data link line group having a bending structure is connected to a second data line group disposed in the second areas.

公开(公告)号：US12014689B2

公开(公告)日：2024-06-18

申请号：US18203639

申请日：2023-05-30

申请人： HEFEI BOE JOINT TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

发明人： Xuehuan Feng ,  Sixiang Wu

IPC分类号： G09G3/3266 ,  G11C19/28

CPC分类号： G09G3/3266 ,  G11C19/28 ,  G09G2310/0286 ,  G09G2310/061

摘要： A shift register unit, a driving method thereof, and a gate driving circuit are disclosed. The shift register unit includes: an input circuit configured to receive an input signal from an input signal terminal and output the input signal to a voltage stabilizer node; a voltage-stabilizing circuit configured to input potential of the voltage stabilizer node to a pull-up node and control potential of the voltage stabilizer node; an output circuit configured to receive a clock signal from a clock signal terminal and provide an output signal to an output signal terminal based on the clock signal received under control of the potential of the pull-up node; and a control circuit configured to control potential of the output signal terminal under control of the potential of the pull-up node.

公开(公告)号：US12014688B2

公开(公告)日：2024-06-18

申请号：US18109330

申请日：2023-02-14

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Chul Kim

IPC分类号： G09G3/3266 ,  G09G3/20 ,  G09G3/3233

CPC分类号： G09G3/3266 ,  G09G3/2096 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0202 ,  G09G2310/0291 ,  G09G2310/08 ,  G09G2360/14 ,  G09G2380/08

摘要： A display device including: a display panel including scan write lines, sensing lines, pixels respectively connected to the scan write lines, and optical sensors respectively connected to the scan write lines and the sensing lines; a scan driver configured to sequentially output scan write signals to the scan write lines in response to a scan control signal; a read-out circuit configured to receive light sensing signals of the optical sensors from the sensing lines in response to a first sampling signal; and a timing controller configured to control the scan driver and the read-out circuit, wherein an interval between pulses of the first sampling signal has a first horizontal period, and an interval between pulses of each of the scan write signals has a second horizontal period.

公开(公告)号：US20240194150A1

公开(公告)日：2024-06-13

申请号：US18471129

申请日：2023-09-20

申请人： LG Display Co., Ltd.

发明人： Seok NOH ,  Ki Min SON

IPC分类号： G09G3/3266 ,  G09G3/32 ,  G09G3/3291

CPC分类号： G09G3/3266 ,  G09G3/32 ,  G09G3/3291 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0286

摘要： A gate driver according to an embodiment and a display device using the same are disclosed. The gate driver includes a plurality of signal transmitters, wherein an nth signal transmitter includes, a (1-1)th output circuit configured to output a carry signal to a first output node according to a voltage of a first control node and a voltage of a second control node, a (1-2)th output circuit configured to output a boosting signal to a second output node according to a voltage of the first control node and a voltage of the second control node, wherein the (1-2)th output circuit includes a pull-up transistor configured to apply a gate high voltage to the first output node, a pull-down transistor configured to apply a gate low voltage to the first output node, and a first capacitor connected between a gate of the pull-up transistor and the second output node.

公开(公告)号：US20240194147A1

公开(公告)日：2024-06-13

申请号：US18424537

申请日：2024-01-26

申请人： LG Display Co., Ltd.

发明人： Taehwi KIM

IPC分类号： G09G3/3266

CPC分类号： G09G3/3266 ,  G09G2300/0852

摘要： According to an aspect of the present disclosure, there is provided a gate driver and a display device. The display device includes: a display panel having a plurality of sub-pixels defined thereon, the sub-pixels being connected to a plurality of scan lines; and a gate driver comprising a plurality of stages for supplying first and second scan signals to each of the plurality of scan lines. Each of the plurality of stages may include: a first output unit for outputting the first scan signal; a second output unit for outputting the second scan signal; a logic unit connected to the first output unit and the second output unit; a low-clock signal line connected to the logic unit; and a high-clock signal line connected to the second output unit. Therefore, a first and a second scan signal can be output from a single stage, so that the structure of the gate driver can become simpler.

公开(公告)号：US12008968B2

公开(公告)日：2024-06-11

申请号：US17974414

申请日：2022-10-26

申请人： LG Display Co., Ltd.

发明人： MooKyoung Hong

IPC分类号： G09G3/3291 ,  G09G3/3266

CPC分类号： G09G3/3291 ,  G09G3/3266 ,  G09G2310/0278 ,  G09G2310/0294 ,  G09G2310/08 ,  G09G2320/0626

摘要： A display device includes: a display panel on which a plurality of pixels are disposed; a timing controller configured to receive Nth frame data and (N+1)th frame data and output a luminance control signal; and a power supply configured to output a reference voltage from a plurality of reference voltages each having a different level in response to the luminance control signal, in which output luminance of the plurality of pixels is determined according to the level of the reference voltage thereby maximizing an HDR effect.

公开(公告)号：US12008963B2

公开(公告)日：2024-06-11

申请号：US18106321

申请日：2023-02-06

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Hai Jung In

IPC分类号： G09G3/3266

CPC分类号： G09G3/3266 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0233

摘要： A display device includes gate lines and pixels connected to the gate lines. The display device includes stages which provide gate signals to the gate lines, and first and second gate power lines which transfer a first voltage to the stages. A first stage among the stages includes a first node controller and a first output unit. The first node controller is connected to the second gate power line, and controls a voltage of a first control node. The first output unit is connected to the first gate power line, and outputs a first voltage of the first gate power line as a gate signal in response to a voltage of the first control node.

公开(公告)号：US20240185797A1

公开(公告)日：2024-06-06

申请号：US18407362

申请日：2024-01-08

申请人： Samsung Display Co., Ltd.

发明人： SEHYUK PARK ,  HONGSOO KIM ,  JINYOUNG ROH ,  BONGHYUN YOU ,  HYOJIN LEE ,  JAEKEUN LIM

IPC分类号： G09G3/3266 ,  G09G3/3275

CPC分类号： G09G3/3266 ,  G09G3/3275 ,  G09G2310/04 ,  G09G2320/0247 ,  G09G2320/103 ,  G09G2330/023 ,  G09G2330/028

摘要： A display apparatus includes a display panel, a gate driver, a data driver, a driving controller and a power voltage generator. The display panel displays an image based on input image data. The gate driver outputs a gate signal to a gate line. The data driver outputs a data voltage to a data line. The driving controller drives display areas of the display panel in different driving frequencies. The power voltage generator outputs a data power voltage to the data driver. The driving controller outputs an output data enable signal including a writing period having an active signal and a holding period having an inactive signal for the respective display areas. The power voltage generator generates the data power voltage having a high power voltage level during the writing period and a low power voltage level in at least a portion of the holding period.