Configurable digital interface for switching voltage regulators

    公开(公告)号:US11157062B2

    公开(公告)日:2021-10-26

    申请号:US16029050

    申请日:2018-07-06

    摘要: A high-speed, low-latency configurable digital interface for a voltage regulator includes a first hardwired unit, a second hardwired unit and a programmable microcontroller interfaced between the first and second hardwired units. The first hardwired unit is operable to deserialize incoming frames received over the configurable digital interface into commands and data associated with operation of a switching voltage regulator, and serialize outgoing data into new frames for transmission over the configurable digital interface. The second hardwired unit is operable to process the commands included in the incoming frames deserialized by the first hardwired unit, and provide the outgoing data to be serialized into new frames by the first hardwired unit. The programmable microcontroller is operable to change one or more of the commands and data flowing between the first and second hardwired units.

    Flexible Array of DC-DC Converters Reconfigurable Using a Shared Serial Bus

    公开(公告)号:US20210320590A1

    公开(公告)日:2021-10-14

    申请号:US16844104

    申请日:2020-04-09

    IPC分类号: H02M3/158 H02M3/157 H02M1/088

    摘要: A re-configurable bank of DC-DC converters has many channels, each with a DC-DC converter and a controller that senses the channel's output voltage and current to adjust a duty cycle of switch signals to the DC-DC converter. A serial bus connects to all controllers and writes digital voltage and current control targets into each controller. The controller has Digital-to-Analog Converters (DACs) that convert the targets to analog voltages that are compared to sensed output voltage and current. The comparison results are compared to a sawtooth wave to generate pulses of the switch signals that have a duty cycle adjusted for the target comparisons. In combined mode, a primary channel's controller generates switch signals for secondary channels having outputs shorted to the primary channel. Secondary channels have a mux to select switch signals from the primary controller during combined mode, and from the secondary controller during separated mode.

    Regulator control integrated circuit having COT and valley current modes

    公开(公告)号:US11139737B2

    公开(公告)日:2021-10-05

    申请号:US16428900

    申请日:2019-05-31

    申请人: Active-Semi, Inc.

    发明人: Masashi Nogawa

    摘要: A voltage regulator control integrated circuit includes constituent parts including an error amplifier circuit, a comparator circuit, a compensation signal generator circuit, an oscillator/one-shot circuit, a latch, and a current sense circuit. In a first example, the integrated circuit is operable in a first mode and in a second mode. In the first mode, the various parts are configured and interconnected in such a way that they operate together as a valley current mode regulator control circuit. In the second mode, the various parts are configured and interconnected in such a way that they operate together as a current-mode constant on-time mode regulator control circuit. In another example, a voltage regulator control integrated circuit has the same basic constituent parts and is operable in a first mode as a peak current mode regulator control circuit, or in a second mode as a constant off-time time mode regulator control circuit.

    Configurable multi-output charge pump

    公开(公告)号:US11121624B1

    公开(公告)日:2021-09-14

    申请号:US16992954

    申请日:2020-08-13

    发明人: Daran DeShazo

    IPC分类号: H02M3/07 H02M3/157

    摘要: A configurable multi-output charge pump for power supply generation includes one or more flying capacitors (FCs) arranged to be switchably connected into a plurality of circuit configurations operative to provide respective output voltages at a common charging node. A configuration logic circuit is operative to generate one or more configuration setting control signals to effectuate a particular circuit configuration. One or more storage capacitors (SC) are independently and individually connectable to the common charging node depending on a selection control logic having a configurable duty cycle, wherein each SC is operative to supply a respective voltage output to drive a corresponding electrical load.

    Power factor correction circuit with burst setting and method of operating the same

    公开(公告)号:US11095207B1

    公开(公告)日:2021-08-17

    申请号:US16859147

    申请日:2020-04-27

    摘要: A power factor correction circuit with burst setting includes a conversion circuit, a control unit, and a burst setting circuit. The burst setting circuit respectively sets at least one burst period when an input power source is at a rising edge of a positive half cycle, a falling edge of the positive half cycle, the rising edge of a negative half cycle, and the falling edge of the negative half cycle, and provides a burst setting signal corresponding to the at least one burst period to the control unit so that the control unit limits the conversion circuit to perform a burst operation during the at least one burst period.

    Slope detection and correction for current sensing using on-state resistance of a power switch

    公开(公告)号:US11081963B2

    公开(公告)日:2021-08-03

    申请号:US16698264

    申请日:2019-11-27

    发明人: Prasan Kasturi

    摘要: A current estimation circuit is configured to estimate current within a power switch, e.g., within a switching voltage converter, using a voltage measured across its load terminals and its on-state resistance. Ringing and other transient anomalies associated with a turn-on transition of the power switch are neglected by ignoring the measured voltage across the power switch for a blanking interval after the transition. During the remainder of the conduction interval of the power switch, the measured voltage is sampled to provide first and second samples. Also during this interval, a slope of the measured voltage is estimated and tracked. The estimated slope and the first and second samples are combined to produce an estimate of the current for the entire conduction interval of the power switch, including the blanked interval. The estimated slope is used to correct for inaccuracy introduced by not using measured voltage during the blanking interval.

    BOOSTER CIRCUIT AND DRIVING METHOD THEREOF, BACKLIGHT MODULE AND DISPLAY DEVICE

    公开(公告)号:US20210225296A1

    公开(公告)日:2021-07-22

    申请号:US16757963

    申请日:2019-10-11

    发明人: Yanwu Chen Bo Xu

    摘要: The embodiments of the present application disclose a booster circuit and a driving method thereof, a backlight module and a display device. The booster circuit includes: a booster sub-circuit and an oscillation elimination sub-circuit; wherein the booster sub-circuit includes a power supply element, an inductor, and a first switch; the booster sub-circuit is configured to provide, at a connection node, a voltage higher than a voltage provided from the power supply element; and wherein a parasitic capacitance occurs between the connection node and a ground terminal; the oscillation elimination sub-circuit is configured to prevent a current generated when the parasitic capacitance discharges from flowing through the inductor so as to eliminate an oscillation generated between the parasitic capacitance and the inductor.

    System and method for resonant buck regulator

    公开(公告)号:US11070130B2

    公开(公告)日:2021-07-20

    申请号:US15993785

    申请日:2018-05-31

    发明人: Jie Gu Tianyu Jia

    摘要: The systems and methods describe a buck regulator, on-chip inductor and/or power management circuits. A buck regulator circuit can include a first switch and a second switch connected with a resonant switching circuit. The resonant switching circuit includes an inductor, a first capacitor and a second capacitor configured to reduce a switching power from a switching frequency of the buck regulator.