摘要:
A computer network includes frame- or packet-based subnetworks connected by switches, the switches being interconnected by high-capacity trunks using a connection-based data transfer protocol similar to Asynchronous Transfer Mode (ATM). Some of the trunks include a Permanent Virtual Path (PVP) trunk crossing an ATM core network, the PVP trunk including one or more bidirectional PVPs. A multipoint-to-point (MPT) protocol is used among the switches to transfer packets as groups of cells directly from “leaf”, or source, switches to “root”, or destination, switches without requiring significant routing-related processing during cell transmission. The switches allocate virtual path identifiers in a conserving manner such that (i) MPT paths from multiple leaf switches are merged to one path with a single virtual path identifier terminating at a root switch; (ii) on the PVP trunks, a virtual path identifier already allocated for an outgoing connection is allocated to an incoming connection ahead of any virtual path identifiers that are completely unallocated; and (iii) a range of virtual path identifiers is pre-provisioned at the core network access points, so that a switch connected to an access point allocates virtual path identifiers from the pre-provisioned range on behalf of upstream switches to extend MPTs across the core network.
摘要:
A card cage for mounting printed circuit cards of at least two sizes is disclosed. The card cage includes an insert removably mounted to a mounting bar position between first and second ends of the card cage. The insert extends along a portion of the width of the card cage. When the insert is mounted to the mounting bar, a printed circuit card of a first length may be disposed between the insert and one of the card cage ends. When the insert is removed, a printed circuit card of a second length greater than the first length may be mounted between the first and second ends of the card cage. Plural mounting bars may be located between the respective card cage ends to accommodate printed circuit cards of different lengths.
摘要:
First and second control processor cards are employed in conjunction with first and second switch fabric cards to interconnect Input/Output cards in a telecommunications switch. The control processor cards provide a portion of the functionality previously associated with switch fabric cards, such as exertion of control over allocation of bandwidth within the switch. The control processor cards also provide new functionality. In particular, each control processor card can configure both switch fabric cards. Redundant control processor cards and redundant switch fabric cards are employed to provide a switch that is less susceptible to failure than switches with only redundant switch fabric cards. Hence, failure of a control processor card and a switch fabric card can be sustained without resulting in switch failure. Timing control functions may also be provided by a separate timing module card.
摘要:
A packet scheduler is disclosed which provides a high degree of fairness in scheduling packets associated with different sessions. The scheduler also minimizes packet delay for packet transmission from a plurality of sessions which may have different requirements and may operate at different transfer rates. When a packet is received by the scheduler, the packet is assigned its own packet virtual start time based on whether the session has any pending packets and the values of the virtual finish time of the previous packet in the session and the packets arrival time. The scheduler then determines a virtual finish time of the packet by determining the transfer time required for the packet based upon its length and rate and by adding the transfer time to the packet virtual start time of the packet. The packet with the smallest virtual finish time is then scheduled for transfer. By selecting packets for transmission in the above described manner, the available bandwidth may be shared in pro-rata proportion to the guaranteed session rate, thereby providing a scheduler with a high degree of fairness while also minimizing the amount of time a packet waits in the scheduler before being served.
摘要:
A computer network includes frame- or packet-based subnetworks connected by switches, the switches being interconnected by high-capacity trunks using a connection-based data transfer protocol similar to Asynchronous Transfer Mode (ATM). Some of the trunks include a Permanent Virtual Path (PVP) trunk crossing an ATM core network, the PVP trunk including one or more bidirectional PVPs. A multipoint-to-point (MPT) protocol is used among the switches to transfer packets as groups of cells directly from "leaf", or source, switches to "root", or destination, switches without requiring significant routing-related processing during cell transmission. The switches allocate virtual path identifiers in a conserving manner such that (i) MPT paths from multiple leaf switches are merged to one path with a single virtual path identifier terminating at a root switch; (ii) on the PVP trunks, a virtual path identifier already allocated for an outgoing connection is allocated to an incoming connection ahead of any virtual path identifiers that are completely unallocated; and (iii) a range of virtual path identifiers is pre-provisioned at the core network access points, so that a switch connected to an access point allocates virtual path identifiers from the pre-provisioned range on behalf of upstream switches to extend MPTs across the core network.
摘要:
A data communications switch and method of operation are presently disclosed enabling flexible, selectable provision of a common timing signal for synchronized external communication through physical layer interfaces with other network devices, synchronized internal communications within the switch, and for uninterrupted synchronization of such communications. Synchronization of external communications is enabled by programmable selection from among plural potential timing references at redundant timing modules (TMs). An active TM provides a primary external synchronization clock; a standby TM provides a redundant timing function. Both TMs access the same references. A state signal indicates which synchronization clock is active. External interfaces derive timing from this distributed clock. Synchronized internal timing is provided by an internal clock and phase-locked loop (PLL) on each TM. The clock/PLL timing signal output is routed to other switch elements, enabling synchronized internal data transfer. Both interconnected TMs actively generate clock signals for external and internal use, enabling seamless timing switchover should conditions warrant a change in TMs.
摘要:
A system and method for remote users to access a private network having a first communications protocol via a public network, such as any TCP/IP network having a second different communications protocol, in a secure manner so that the remote user appears to be connected directly to the private network and appears to be a node on that private network. A host connected to the private network may execute a host software application which establishes and provides a communications path for secure access of the remote client computer. An encrypted data stream may be communicated between the host and the client representing traffic and commands on the network.
摘要:
An apparatus and method for processing a data packet to determine the routing of the data packet through a communications network is provided in which the data packet has a header portion and a data portion. The apparatus stores the header portion of the data packet, and processes the header portion of the data packet. The processing may include using a processing core for executing instructions for processing the header portion, searching through a route table to determine a route of the data packet, and searching through a table memory for information about the destination of the data packet in which the route table search, the table memory search and the processing core operate simultaneously to process the header portion and generate an internal header or a network media header. A modified header portion is generated to route the data packet through the communications network. A method for processing data packets to determine the route of the data packet is also provided in which a header portion is received from an incoming data packet, an search based on the received header portion is performed, a route look-up search is performed, and the information contained within the header portion is processed simultaneously for determining if the header portion is valid and generating an internal header or network media header based on the results of the route look-up search, the interface search, and other processing.
摘要:
A module interconnection system which minimizes electronic signal propagation delays is disclosed. The module interconnection system includes a backplane, a first plurality of connectors arranged in a side by side generally parallel arrangement, and a second plurality of connectors arranged in a side by side generally parallel arrangement. In a preferred embodiment, the second plurality of connectors are mounted on the backplane at right angles to the first plurality of connectors so as provide short routing paths between each of the second plurality of connectors and at least one of the first plurality of connectors. Point-to-point signal interconnections are selectively utilized to provide data paths between selected contacts of at least one of the first plurality of connectors and selected contacts of the second plurality of connectors. The above described interconnection apparatus permits high speed data communication between modules disposed in at least one of said first plurality of connectors and at least one module disposed in said second plurality of connectors.
摘要:
A method of fairly and efficiently scheduling transmission of a packet from a plurality of sessions onto a network is presented. The method includes providing an input having a plurality of sessions, grouping the sessions into a plurality of classes, scheduling the classes with first level schedulers associated with one of the classes, scheduling the outputs of some of the first level schedulers with a second level scheduler, and prioritizing among the output of the remaining first level scheduler(s) and the output of the second level scheduler to provide an hierarchical scheduler output. The scheduler accepts traffic types at its input, and provides an output suitable for scheduling cell based traffic such as Asynchronous Transfer Mode (ATM) network traffic.