-
公开(公告)号：US12110609B2
公开(公告)日：2024-10-08
申请号：US17152993
申请日：2021-01-20
摘要： Methods for forming a single crystal silicon ingot with reduced crucible erosion are disclosed. Solid-phase quartz is added to the melt to reduce erosion at the crucible-melt surface interface. The quartz may be synthetic quartz such as synthetic quartz rods. The quartz may be disposed near the crucible-melt surface interface. Quartz dissolves and suppresses the amount of quartz that dissolves from the crucible at the crucible-melt surface interface.
-
公开(公告)号：US12091769B2
公开(公告)日：2024-09-17
申请号：US18154418
申请日：2023-01-13
CPC分类号： C30B15/002 , C30B15/12 , C30B15/20 , C30B29/06
摘要： Methods for producing single crystal silicon ingots by Continuous Czochralski (CCz) are disclosed. A batch of buffer members (e.g., quartz cullets) is added to an outer melt zone of the crucible assembly before the main body of the ingot is grown. In some embodiments, the ratio of the mass M of the batch of buffer members added to the melt to the time between adding the batch of buffer members to the melt and when the ingot main body begins to grow is controlled such that the ratio of M/T is greater than a threshold M/T.
-
公开(公告)号：US12071705B2
公开(公告)日：2024-08-27
申请号：US17711666
申请日：2022-04-01
IPC分类号： C30B15/00 , B22C9/00 , B28B1/00 , B28B1/26 , B28B7/00 , B28B7/16 , C04B35/00 , C04B38/00 , C30B15/10 , C30B15/12 , C30B29/06 , C30B35/00
CPC分类号： C30B15/10 , B22C9/00 , B28B1/261 , B28B7/16 , C04B38/00 , C30B15/002 , C30B15/12 , C30B29/06 , C30B35/002 , C04B2235/3418 , C04B2235/6027 , C04B2235/606 , C04B2235/656
摘要： Methods for forming a unitized crucible assembly for holding a melt of silicon for forming a silicon ingot are disclosed. In some embodiments, the methods involve a porous crucible mold having a channel network with a bottom channel, an outer sidewall channel that extends from the bottom channel, and a central weir channel that extends from the bottom channel. A slip slurry may be added to the channel network and the liquid carrier of the slip slurry may be drawn into the mold. The resulting green body may be sintered to form the crucible assembly.
-
公开(公告)号：US20240247402A1
公开(公告)日：2024-07-25
申请号：US18626962
申请日：2024-04-04
发明人： Gaurab Samanta , Parthiv Daggolu , Sumeet Bhagavat , Soubir Basak , Nan Zhang
摘要： A method for producing a silicon ingot includes withdrawing a seed crystal from a melt that includes melted silicon in a crucible that is enclosed in a vacuum chamber containing a cusped magnetic field. At least one process parameter is regulated in at least two stages, including a first stage corresponding to formation of the silicon ingot up to an intermediate ingot length, and a second stage corresponding to formation of the silicon ingot from the intermediate ingot length to the total ingot length. During the second stage process parameter regulation may include reducing a crystal rotation rate, reducing a crucible rotation rate, and/or increasing a magnetic field strength relative to the first stage.
-
5.发明公开公开(公告)号：US20240247398A1
公开(公告)日：2024-07-25
申请号：US18410347
申请日：2024-01-11
摘要： Ingot puller apparatus and methods for growing a single crystal silicon ingots with reduced lower chamber deposits are disclosed.
-
公开(公告)号：US12046474B2
公开(公告)日：2024-07-23
申请号：US17670510
申请日：2022-02-14
发明人： Chenghan Tsao , Han-Zong Wu
IPC分类号： H01L21/266 , H01L21/265 , H01L29/36
CPC分类号： H01L21/266 , H01L21/2652 , H01L29/36
摘要： A wafer includes a semiconductor substrate. The semiconductor substrate includes a plurality of first doped regions and a plurality of second doped regions. The first doped regions and the second doped regions are located on a first surface of the semiconductor substrate. The second doped regions contact the first doped regions. The first doped regions and the second doped regions are alternately arranged. Both of the first doped regions and the second doped regions include a plurality of N-type dopants. The doping concentration of the N-type dopants in each of the first doped regions is not greater than the doping concentration of the N-type dopants in each of the second doped regions.
-
公开(公告)号：US12037697B2
公开(公告)日：2024-07-16
申请号：US18325142
申请日：2023-05-30
发明人： Kazuo Nakajima , Masami Nakanishi , Yu Sheng Su , Wen-Ching Hsu
CPC分类号： C30B15/002 , C30B15/10 , C30B15/36 , C30B29/06 , C30B35/002 , C30B35/007 , Y10T117/1008
摘要： A method for producing Si ingot single crystal by NOC growth method including a Si ingot single crystal growing step and a continuous growing step is provided. The growing step includes providing a low temperature region in the Si melt where the Si ingot single crystal is grown along the surface of the Si melt or toward the inside of the Si melt, and the Si ingot single crystal has distribution of a vacancy concentration and an interstitial concentration in which respectively a vacancy concentration and an interstitial concentration vary with a distance from the growth interface; and adjusting a temperature gradient and a growth rate in the Si melt, so that along with the increasing of the distance from the growth interface, the vacancy concentration and the interstitial concentration in the Si ingot single crystal respectively decrease come near to each other.
-
公开(公告)号：US12031229B2
公开(公告)日：2024-07-09
申请号：US17991406
申请日：2022-11-21
发明人： Jiaying Ke , Sumeet S. Bhagavat , Jaewoo Ryu , Benjamin Meyer , William Luter , Carissima Marie Hudson
CPC分类号： C30B15/10 , C30B15/08 , C30B29/06 , C30B35/002 , Y10T117/1032 , Y10T117/1068
摘要： Ingot puller apparatus for preparing a single crystal silicon ingot by the Czochralski method are disclosed. The ingot puller apparatus includes a heat shield. The heat shield has a leg segment that includes a void (i.e., an open space without insulation) disposed in the leg segment. The heat shield may also include insulation partially within the heat shield.
-
公开(公告)号：US12024789B2
公开(公告)日：2024-07-02
申请号：US17071714
申请日：2020-10-15
发明人： Richard J. Phillips , Parthiv Daggolu , Eric Gitlin , Robert Standley , HyungMin Lee , Nan Zhang , Jae-Woo Ryu , Soubir Basak
摘要： Methods for forming single crystal silicon ingots with improved resistivity control and, in particular, methods that involve gallium or indium doping are disclosed. In some embodiments, the ingots are characterized by a relatively high resistivity.
-
公开(公告)号：US11971365B2
公开(公告)日：2024-04-30
申请号：US17569510
申请日：2022-01-06
发明人： Shang-Chi Wang , Cheng-Jui Yang , Miao-Pei Chen , Han-Zong Wu
CPC分类号： G01N21/9501 , H01L29/1608
摘要： A wafer processing system and a rework method thereof are provided. An image capture device captures an image of a wafer to generate a captured image. A control device detects a defect pattern in the captured image, calculates a target removal thickness according to distribution of contrast values of the defect pattern, and controls a processing device to perform processing on the wafer according to the target removal thickness.
-
-
-
-
-
-
-
-
-
搜索结果
481 条记录 (耗时 0.026 秒)
