Semiconductor integrated circuit
    2.
    发明申请
    Semiconductor integrated circuit 失效
    半导体集成电路

    公开(公告)号:US20020024062A1

    公开(公告)日:2002-02-28

    申请号:US09886026

    申请日:2001-06-22

    IPC分类号: H01L031/0328

    摘要: A semiconductor integrated circuit having therein a plurality of memories, realizing an improved yield by efficiently repairing a defective bit in a memory. This semiconductor integrated circuit has: a plurality of circuit blocks (RAM macro cells) each having an identification code coincidence detecting circuit for determining whether an input identification code coincides with a self identification code or not and a reception data latch and performing an operation according to latched data; a setting circuit capable of setting the identification code and information corresponding to the identification code and serially outputting the set information; and a control circuit capable of sequentially reading the setting information from the setting circuit, converting the setting information to parallel data, and transferring the parallel data to the plurality of circuit blocks. Each of the plurality of circuit blocks captures and holds the setting information transferred when the identification code coincidence detecting circuit determines that the input identification code and the self identification code coincide with each other.

    摘要翻译: 一种其中具有多个存储器的半导体集成电路,通过有效地修复存储器中的有缺陷的位来实现提高的产量。 该半导体集成电路具有:多个电路块(RAM宏单元),每个电路块具有识别码重合检测电路,用于确定输入的识别码是否与自身识别码一致;以及接收数据锁存器,并执行根据 锁定数据; 设置电路,其能够设置与识别码相对应的识别码和信息,并且串行地输出设定信息; 以及控制电路,其能够从设置电路顺序读取设置信息,将设置信息转换为并行数据,并将并行数据传送到多个电路块。 当识别码重合检测电路确定输入的识别码和自识别码彼此一致时,多个电路块中的每一个捕获并保持传送的设置信息。