公开(公告)号：US07301242B2

公开(公告)日：2007-11-27

申请号：US11081842

申请日：2005-03-15

申请人： Steven Teig

发明人： Steven Teig

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L23/055 ,  H01L23/36 ,  H01L24/48 ,  H01L24/73 ,  H01L25/18 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Some embodiments of the invention provide a programmable system in package (“PSiP”). The PSiP includes a single IC housing, a substrate and several IC's that are arranged within the single IC housing. At least one of the IC's is a configurable IC. In some embodiments, the configurable IC is a reconfigurable IC that can reconfigure more than once during run time. In some of these embodiments, the reconfigurable IC can be reconfigured at a first clock rate that is faster (i.e., larger) than the clock rates of one or more of the other IC's in the PSiP. The first clock rate is faster than the clock rate of all of the other IC's in the PSiP in some embodiments.

摘要翻译： 本发明的一些实施例提供了一种包装中的可编程系统（“PSiP”）。 PSiP包括单个IC外壳，基板和几个集成电路，其布置在单个IC外壳内。 IC中至少有一个是可配置的IC。 在一些实施例中，可配置IC是可重新配置的IC，其可以在运行时间期间重新配置不止一次。 在这些实施例中的一些实施例中，可以以比PSiP中的一个或多个其它IC的时钟速率更快（即更大）的第一时钟速率来重新配置可重配置IC。 在一些实施例中，第一时钟速率比PSiP中的所有其它IC的时钟速率快。

公开(公告)号：US07298370B1

公开(公告)日：2007-11-20

申请号：US11107328

申请日：2005-04-16

申请人： Mitchell Scott Middler ,  Ron Brinkmann ,  Peter Warner

发明人： Mitchell Scott Middler ,  Ron Brinkmann ,  Peter Warner

IPC分类号： G06T15/40 ,  G06T11/20

CPC分类号： G06T11/206

摘要： A method for determining a depth ordering between two planes in a 3D workspace of an application is provided. The method includes projecting vectors from a reference position through points of interest on the planes, determining corresponding points on the other plane, determining a number of points of interest on a first plane having a depth lower than its corresponding point and a number of points of interest on a second plane having a depth lower than its corresponding point, and setting the depth ordering based on these numbers. A method for displaying interconnects between nodes of a tree displayed in an application is provided. A node represents a multimedia item or a function and an interconnect represents data passed between two nodes. The method includes displaying an interconnect in the tree having an appearance indicating at least one characteristic of the data being passed between two nodes.

摘要翻译： 提供了一种用于在应用程序的3D工作空间中确定两个平面之间的深度排序的方法。 该方法包括从参考位置通过平面上的感兴趣点投影矢量，确定另一平面上的对应点，确定具有低于其对应点的深度的第一平面上的感兴趣点数，以及 在深度低于其对应点的第二平面上的兴趣，并且基于这些数字设置深度排序。 提供了一种在应用程序中显示的树的节点之间显示互连的方法。 节点表示多媒体项目或功能，互连表示在两个节点之间传递的数据。 该方法包括在树中显示具有指示在两个节点之间传递的数据的至少一个特性的外观的互连。

公开(公告)号：US07295612B2

公开(公告)日：2007-11-13

申请号：US10658938

申请日：2003-09-09

申请人： Barin Geoffrey Haskell ,  Adriana Dumitras ,  Atul Puri

发明人： Barin Geoffrey Haskell ,  Adriana Dumitras ,  Atul Puri

IPC分类号： H04N7/12 ,  G06K9/36

CPC分类号： H04N19/87 ,  H04N19/114 ,  H04N19/142 ,  H04N19/147 ,  H04N19/177

摘要： Methods for processing a set of successive video frames in two passes to determine the number of bidirectional (B) and unidirectional (P) motion compensated frames to be encoded in a video coding system. During the first pass, motion vectors and motion costs are computed for each frame and a derived cost value is computed based on the motion cost of at least one frame. The derived cost value is used to determine the number (NB) of B-frames to be encoded in the set of successive frames. In the second pass, the set of successive frames are encoded where NB frames are encoded as B-frames and some or all motion vectors computed in the first pass are re-used in the second pass. A scene cut detection method is also provided where an impulse-like increase in a ratio of motion costs is monitored.

摘要翻译： 用于在两遍中处理一组连续视频帧的方法，以确定要在视频编码系统中编码的双向（B）和单向（P）运动补偿帧的数量。 在第一次通过期间，针对每个帧计算运动矢量和运动成本，并且基于至少一帧的运动成本来计算导出成本值。 导出成本值用于确定要在该组连续帧中编码的B帧的数目（N SUB B B）。 在第二遍中，编码连续帧的集合，其中N B个帧被编码为B帧，并且在第二遍中重新使用在第一遍中计算的一些或全部运动矢量。 还提供了一种场景切断检测方法，其中监测运动成本比例的脉冲状增加。

公开(公告)号：US07295037B2

公开(公告)日：2007-11-13

申请号：US11082193

申请日：2005-03-15

申请人： Herman Schmit ,  Steven Teig ,  Brad Hutchings ,  Randy Renfu Huang

发明人： Herman Schmit ,  Steven Teig ,  Brad Hutchings ,  Randy Renfu Huang

IPC分类号： H03K19/177

CPC分类号： H03K19/17736 ,  H03K19/17796

摘要： Some embodiments provide a configurable integrated circuit (“IC”) that includes several configurable tiles arranged in a tile arrangement. Each configurable tile has a set of configurable logic circuits and a set of configurable routing circuits for routing signals between configurable logic circuits. At least a first routing circuit of a first tile has at least one direct connection with a second circuit of a second tile that does not neighbor the first tile and that is not aligned horizontally or vertically with the first tile in the tile arrangement.

摘要翻译： 一些实施例提供了一种可配置集成电路（“IC”），其包括以瓦片排列方式布置的多个可配置瓦片。 每个可配置的瓦片具有一组可配置逻辑电路和一组用于在可配置逻辑电路之间路由信号的可配置路由电路。 第一瓦片的至少第一路由电路具有与第二瓦片的第二电路的至少一个直接连接，第二瓦片不邻近第一瓦片，并且不与水平或垂直对准在瓦片布置中的第一瓦片。

公开(公告)号：US07272803B1

公开(公告)日：2007-09-18

申请号：US10452189

申请日：2003-06-01

申请人： Hengfu Hsu

发明人： Hengfu Hsu

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/78

摘要： A method for defining and producing a power grid structure (having stripe, rail, and via components) of an IC. The method reduces the number of vias in the power grid structure and the diagonal wiring blockage caused by the vias while still meeting design specifications. Other embodiments provide a method for locating vias in the power grid structure in such a way as to be especially beneficial to 45° or 135° diagonal wiring paths. The method includes processes of a power grid planner, power grid router, power grid verifier, and global signal router that are used iteratively to define and produce a power grid structure. Other embodiments of the invention provide for arrangements of vias in via arrays where diagonal wiring paths are facilitated near the edges of the via arrays. A bounding box enclosing these via arrays have an aspect ratio that is approximately equal to 1.

摘要翻译： 一种用于定义和产生IC的电网结构（具有条带，轨道和通孔部件）的方法。 该方法减少了电网结构中的通孔数量和通孔导致的对角线路堵塞，同时仍符合设计规范。 其他实施例提供了一种用于在电力电网结构中定位过孔的方法，以便特别有利于45°或135°对角线的布线路径。 该方法包括迭代地用于定义和产生电网结构的电网规划器，电网路由器，电网验证器和全局信号路由器的过程。 本发明的其它实施例提供了通孔阵列中的布置布置，其中在通孔阵列的边缘附近有对角线布线路径。 封闭这些通孔阵列的边框具有近似等于1的纵横比。

公开(公告)号：US07272537B2

公开(公告)日：2007-09-18

申请号：US10845395

申请日：2004-05-13

申请人： Masoud Mike Mogadam

发明人： Masoud Mike Mogadam

IPC分类号： G06F19/00

CPC分类号： B67D1/1206 ,  B67D1/00 ,  B67D1/0881 ,  B67D1/0888 ,  B67D1/1209 ,  B67D1/1211 ,  B67D3/0006 ,  B67D3/0041 ,  B67D3/0051 ,  B67D3/0054 ,  B67D2210/00089 ,  B67D2210/00091 ,  B67D2210/00094 ,  G01F1/00 ,  G01F9/008 ,  G01F13/006 ,  G06Q30/0205

摘要： Some embodiments of the invention provide a system for monitoring liquid consumption at one or more establishments. At each establishment, the system includes one or more spouts and a local computer. Each spout is mounted on a liquid container. Also, each spout generates data regarding the amount of liquid poured from the spout's container. The local computer at each establishment collects data generated by the spouts at the establishment. In some embodiments, a wireless network links the local computer and the spouts at each establishment. The system also includes an external computer that gathers the data collected by the local computers of the establishments monitored by the system. In some embodiments, the external computer is located outside of all the establishments, while in other embodiments this computer is located within one of the establishments. Some embodiments of the invention provide a free-pour spout. This spout mounts on an open orifice of a liquid container and measures the amount of liquid poured from the liquid container. This spout has a housing and a passageway defined within the housing. It also has a detection circuit that detects fluid flow through the passageway. In addition, this spout has a measuring circuit that generates data relating to fluid flow when the detection circuit detects fluid flow through the passageway.

摘要翻译： 本发明的一些实施例提供了一种用于监测一个或多个机构的液体消耗的系统。 在每个机构，系统包括一个或多个喷口和本地计算机。 每个喷口安装在液体容器上。 此外，每个喷口产生关于从喷口容器倾倒的液体量的数据。 每个机构的本地计算机收集在设立时由喷口生成的数据。 在一些实施例中，无线网络在每个企业处连接本地计算机和喷口。 该系统还包括外部计算机，其收集由系统监视的机构的本地计算机收集的数据。 在一些实施例中，外部计算机位于所有机构之外，而在其他实施例中，该计算机位于一个机构内。 本发明的一些实施例提供自由倾倒喷嘴。 该喷口安装在液体容器的开口上，并测量从液体容器中倒出的液体量。 该喷口具有在壳体内限定的壳体和通道。 它还具有检测流经通道的流体的检测电路。 此外，该喷口具有测量电路，当检测电路检测到通过通道的流体流动时，产生与流体流动有关的数据。

公开(公告)号：US07262633B1

公开(公告)日：2007-08-28

申请号：US11271080

申请日：2005-11-11

申请人： Herman Schmit ,  Steven Teig

发明人： Herman Schmit ,  Steven Teig

IPC分类号： H03K19/177

CPC分类号： H03K19/17736 ,  H03K19/17796

摘要： Some embodiments provide a via programmable gate array (“VPGA”) with several configurable circuits arranged in a configurable circuit arrangement. At least some of the configurable circuits are via programmable (“VP”) configured circuits. In some embodiments, the configurable circuit arrangement is a configurable circuit arrangement that includes numerous (e.g., 50, 100, etc.) configurable circuits that are arranged in several rows and columns. This circuit arrangement also includes several bit lines, where at least one the bit line provides a configuration value to at least one configurable circuit. In some embodiments, at least some bit lines transverse along more than one column or row in the circuit arrangement.

摘要翻译： 一些实施例提供具有以可配置电路布置布置的多个可配置电路的通孔可编程门阵列（“VPGA”）。 至少一些可配置电路通过可编程（“VP”）配置电路。 在一些实施例中，可配置电路装置是可配置的电路装置，其包括布置成多行和多列的许多（例如，50,100等）可配置电路。 该电路布置还包括几个位线，其中至少一个位线向至少一个可配置电路提供配置值。 在一些实施例中，至少一些位线沿着电路装置中的多于一列或多行而横越。

公开(公告)号：US07260504B2

公开(公告)日：2007-08-21

申请号：US11329366

申请日：2006-01-09

申请人： Masoud Mike Mogadam

发明人： Masoud Mike Mogadam

IPC分类号： G06F19/00

CPC分类号： B67D1/1206 ,  B67D1/00 ,  B67D1/0881 ,  B67D1/0888 ,  B67D1/1209 ,  B67D1/1211 ,  B67D3/0006 ,  B67D3/0041 ,  B67D3/0051 ,  B67D3/0054 ,  B67D2210/00089 ,  B67D2210/00091 ,  B67D2210/00094 ,  G01F1/00 ,  G01F9/008 ,  G01F13/006 ,  G06Q30/0205

摘要： Some embodiments of the invention provide a system for monitoring liquid consumption at one or more establishments. At each establishment, the system includes one or more spouts and a local computer. Each spout is mounted on a liquid container. Also, each spout generates data regarding the amount of liquid poured from the spout's container. The local computer at each establishment collects data generated by the spouts at the establishment. In some embodiments, a wireless network links the local computer and the spouts at each establishment. The system also includes an external computer that gathers the data collected by the local computers of the establishments monitored by the system. In some embodiments, the external computer is located outside of all the establishments, while in other embodiments this computer is located within one of the establishments. Some embodiments of the invention provide a free-pour spout. This spout mounts on an open orifice of a liquid container and measures the amount of liquid poured from the liquid container. This spout has a housing and a passageway defined within the housing. It also has a detection circuit that detects fluid flow through the passageway. In addition, this spout has a measuring circuit that generates data relating to fluid flow when the detection circuit detects fluid flow through the passageway.

摘要翻译： 本发明的一些实施例提供了一种用于监测一个或多个机构的液体消耗的系统。 在每个机构，系统包括一个或多个喷口和本地计算机。 每个喷口安装在液体容器上。 此外，每个喷口产生关于从喷口容器倾倒的液体量的数据。 每个机构的本地计算机收集在设立时由喷口生成的数据。 在一些实施例中，无线网络在每个企业处连接本地计算机和喷口。 该系统还包括外部计算机，其收集由系统监视的机构的本地计算机收集的数据。 在一些实施例中，外部计算机位于所有机构之外，而在其他实施例中，该计算机位于一个机构内。 本发明的一些实施例提供自由倾倒喷嘴。 该喷口安装在液体容器的开口上，并测量从液体容器中倒出的液体量。 该喷口具有在壳体内限定的壳体和通道。 它还具有检测流经通道的流体的检测电路。 此外，该喷口具有测量电路，当检测电路检测到通过通道的流体流动时，产生与流体流动有关的数据。

公开(公告)号：US07243328B2

公开(公告)日：2007-07-10

申请号：US10443595

申请日：2003-05-21

申请人： Etienne Jacques ,  Tom Kronmiller

发明人： Etienne Jacques ,  Tom Kronmiller

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： Some embodiments of the invention provide novel methods for representing items in a design layout. For instance, they use a method that identifies several half-planes, that when intersected, define the shape of the item. Some embodiments use a method that (1) identifies a first set of location data for the item with respect to a first coordinate system, (2) identifies a second set of location data for the item with respect to a second coordinate system, and (3) specifies the item in terms of the first and second set of location data. In some embodiments, both the first and second coordinate systems have first and second coordinate axes. Some embodiments use a method that receives a first set of data that defines the item with respect to a first coordinate system of the design layout.

摘要翻译： 本发明的一些实施例提供了用于在设计布局中表示项目的新颖方法。 例如，他们使用标识几个半平面的方法，即在相交时定义项目的形状。 一些实施例使用以下方法：（1）识别关于第一坐标系的物品的第一组位置数据，（2）识别关于第二坐标系的物品的第二组位置数据，以及（ 3）根据第一和第二组位置数据指定项目。 在一些实施例中，第一和第二坐标系都具有第一和第二坐标轴。 一些实施例使用接收相对于设计布局的第一坐标系定义项目的第一组数据的方法。

公开(公告)号：US07242216B1

公开(公告)日：2007-07-10

申请号：US11081809

申请日：2005-03-15

申请人： Herman Schmit ,  Jason Redgrave

发明人： Herman Schmit ,  Jason Redgrave

IPC分类号： H03K19/177

CPC分类号： G11C5/025 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H03K19/17736 ,  H03K19/1776 ,  H01L2924/00014 ,  H01L2924/00

摘要： Some embodiments of the invention provide a configurable IC that includes several configurable computational tiles and several memory tiles. These tiles are arranged in a particular tile arrangement. Each computational tile has a set of configurable logic circuits for configurably performing a plurality of computations and a set of configurable routing circuits. The routing circuits of the tiles configurably route signals between configurable logic circuits. The configurable IC also has several memory arrays for storing data on which the logic circuit perform computation. The memory arrays are embedded in the tile arrangement between two sets of memory tiles, where each set of memory tiles includes a set of routing circuits. In this IC, at least a first memory tile has the same set of configurable routing circuits as at least a second computational tile.

摘要翻译： 本发明的一些实施例提供了一种可配置的IC，其包括若干可配置的计算瓦片和几个存储器瓦片。 这些瓦片被布置成特定的瓦片布置。 每个计算瓦片具有用于可配置地执行多个计算的一组可配置逻辑电路和一组可配置路由电路。 瓦片的路由电路可配置地在可配置逻辑电路之间路由信号。 可配置IC还具有多个用于存储逻辑电路执行计算的数据的存储器阵列。 存储器阵列嵌入在两组存储器片之间的瓦片布置中，其中每组存储器瓦片包括一组路由电路。 在该IC中，至少第一存储器块具有与至少第二计算块相同的一组可配置路由电路。