Formal equivalence checking between two models of a circuit design using checkpoints
    1.
    发明授权
    Formal equivalence checking between two models of a circuit design using checkpoints 有权
    使用检查点的电路设计的两个模型之间的正式等价检查

    公开(公告)号:US08201119B2

    公开(公告)日:2012-06-12

    申请号:US12775063

    申请日:2010-05-06

    申请人: Alfred Koelbl

    发明人: Alfred Koelbl

    IPC分类号: G06F17/50

    CPC分类号: G06F17/504

    摘要: Some embodiments of the present invention provide techniques and systems for determining whether a high-level model (HLM) for a circuit design is equivalent to a register-transfer-level (RTL) model for the circuit design. During operation, a system can identify a set of checkpoints. Each checkpoint can be associated with a characteristic function defined over the states of a finite-state-machine (FSM) representation of the HLM, a characteristic function defined over the states of an FSM representation of the RTL model, and an invariant defined over a set of variables in the HLM and a set of registers in the RTL model. Next, the system can generate a set of invariant proof problems, wherein each invariant proof problem corresponds to a transition between two checkpoints in the set of checkpoints. The system can then determine whether the HLM is equivalent to the RTL model by solving the set of invariant proof problems.

    摘要翻译: 本发明的一些实施例提供用于确定用于电路设计的高级模型(HLM)是否等于电路设计的寄存器传送级(RTL)模型的技术和系统。 在操作期间,系统可以识别一组检查点。 每个检查点可以与通过HLM的有限状态机(FSM)表示的状态定义的特征函数相关联,这是在RTL模型的FSM表示的状态上定义的特征函数,以及在 HLM中的一组变量和RTL模型中的一组寄存器。 接下来,系统可以生成一组不变性证明问题,其中每个不变校验问题对应于检查点集合中两个检查点之间的转换。 然后,系统可以通过求解一组不变量证明问题来确定HLM是否等同于RTL模型。

    System and method for connectionless client-server communications
    2.
    发明授权
    System and method for connectionless client-server communications 有权
    无连接客户机 - 服务器通信的系统和方法

    公开(公告)号:US08001590B1

    公开(公告)日:2011-08-16

    申请号:US12574671

    申请日:2009-10-06

    IPC分类号: G06F9/00 G06F17/00 G06F15/16

    CPC分类号: H04L67/14 H04L67/145

    摘要: A system and method are provided for conducting a client-server application (e.g., instant messaging, VoIP telephony) using non-persistent communications. Clients issue periodic heartbeat messages to a connectionless server using a non-persistent (e.g., UDP) communication protocol. The heartbeat messages identify the clients by unique client identifiers. When an application server has an unsolicited communication for a client (e.g., a new instant message, a VoIP call), the application server retrieves the client's address from the connectionless server if it does not already have the address. The application server forwards the unsolicited communication to the client via a non-persistent communication, and may spoof the connectionless server if necessary to reach the client through a firewall, proxy, NAT or similar entity. Clients that cannot use non-persistent protocols establish persistent connections with a client manager. The client manager issues heartbeat messages to the connectionless server and receives and forwards unsolicited communications for these clients.

    摘要翻译: 提供了一种用于使用非持久通信来进行客户端 - 服务器应用(例如即时消息收发,VoIP电话)的系统和方法。 客户端使用非持久(例如UDP)通信协议向无连接服务器发出周期性的心跳消息。 心跳消息通过唯一的客户端标识符来标识客户端。 当应用服务器具有用于客户端的主动通信(例如,新的即时消息,VoIP呼叫)时,如果应用服务器还没有该地址,则该应用服务器从无连接服务器检索客户端的地址。 应用服务器通过非持久通信将未经请求的通信转发给客户端,如果需要,可以通过防火墙,代理,NAT或类似实体到达客户端,欺骗无连接服务器。 不能使用非持久性协议的客户端与客户端管理器建立持久连接。 客户端管理员向无连接服务器发出心跳消息,并接收并转发这些客户端的未经请求的通信。

    Using a portion of differential signal line to provide an embedded common mode filter
    4.
    发明授权
    Using a portion of differential signal line to provide an embedded common mode filter 有权
    使用差分信号线的一部分来提供嵌入式共模滤波器

    公开(公告)号:US07944477B1

    公开(公告)日:2011-05-17

    申请号:US11453760

    申请日:2006-06-14

    申请人: Inge Lars Birkeli

    发明人: Inge Lars Birkeli

    IPC分类号: H04N5/232

    CPC分类号: H01P3/026

    摘要: In order to provide filtering of clock noise from an integrated circuit at least one differential signal line connected to the integrated circuit is provided with an embedded common mode filter. The common mode filter can be provided in the form of a hollowed out portion of an impedance reference plane.

    摘要翻译: 为了提供来自集成电路的时钟噪声的滤波,连接到集成电路的至少一个差分信号线提供有嵌入式共模滤波器。 共模滤波器可以以阻抗参考平面的中空部分的形式提供。

    Method and apparatus for securing a database configuration

    公开(公告)号:US10540508B2

    公开(公告)日:2020-01-21

    申请号:US12561461

    申请日:2009-09-17

    IPC分类号: G06F21/62

    摘要: One embodiment of the present invention provides a system that secures a database configuration from undesired modifications. This system allows a security officer to issue a configuration-locking command, which activates a lock for the configuration of a database object. When a configuration lock is activated for a database object, the system prevents a user (e.g., a database administrator) from modifying the configuration of the database object, without restricting the user from accessing the database object itself. The security officer is a trusted user that is responsible for maintaining the stability of the database configuration, such that a configuration lock activated by the security officer preserves the database configuration by overriding the privileges assigned to a database administrator.

    Invariant sharing to speed up formal verification

    公开(公告)号:US10325054B2

    公开(公告)日:2019-06-18

    申请号:US14167716

    申请日:2014-01-29

    申请人: Synopsys, Inc.

    IPC分类号: G06F17/50

    摘要: Methods and apparatuses are described for sharing inductive invariants while performing formal verification of a circuit design. Specifically, some embodiments assume at least an inductive invariant for a property to be true while proving another property. According to one definition, an inductive invariant of a property is an inductive assertion such that all states that satisfy the inductive assertion also satisfy the property. According to one definition, an inductive assertion describes a set of states that includes all legal initial states of the circuit design and that is closed under a transition relation that models the circuit design.

    Technique for fabricating microsprings on non-planar surfaces
    7.
    发明授权
    Technique for fabricating microsprings on non-planar surfaces 有权
    在非平面表面上制造微球的技术

    公开(公告)号:US08531042B2

    公开(公告)日:2013-09-10

    申请号:US12495057

    申请日:2009-06-30

    IPC分类号: H01L29/41

    摘要: A processing technique facilitating the fabrication of the integrated circuit with microsprings at different vertical positions relative to a surface of a substrate is described. During the fabrication technique, microsprings are lithographically defined on surfaces of a first substrate and a second substrate. Then, a hole is created through a first substrate. Moreover, the integrated circuit may be created by rigidly mechanically coupling the two substrates to each other such that the microsprings on the surface of the second substrate are within a region defined at least in part by an edge around the hole. Subsequently, photoresist that constrains the microsprings on the surfaces of the two substrates may be removed. In this way, microsprings at the different vertical positions can be fabricated.

    摘要翻译: 描述了一种有助于在相对于衬底的表面在不同垂直位置处形成具有微球的集成电路的处理技术。 在制造技术期间,在第一基板和第二基板的表面上光刻地限定微弹簧。 然后,通过第一基板产生孔。 此外,集成电路可以通过将两个基板彼此刚性地机械耦合而形成,使得第二基板的表面上的微弹簧在至少部分地由孔周围的边缘限定的区域内。 随后,可以除去限制两个基板表面上的微球的光致抗蚀剂。 以这种方式,可以制造在不同垂直位置的微球。

    Integrated circuit chip with smart pixels that supports through-chip electromagnetic communication
    8.
    发明授权
    Integrated circuit chip with smart pixels that supports through-chip electromagnetic communication 有权
    具有智能像素的集成电路芯片,支持片上电磁通信

    公开(公告)号:US08148202B2

    公开(公告)日:2012-04-03

    申请号:US13026479

    申请日:2011-02-14

    IPC分类号: H01L21/50

    摘要: One embodiment of the present invention provides an integrated circuit chip, including an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. The integrated circuit chip additionally comprises an electromagnetic via that facilitates communication between signal pads on the integrated circuit chip and signal pads on a second integrated circuit chip. The electromagnetic via couples a signal pad on the active face of the integrated circuit chip to the back face of the integrated circuit chip so that the integrated circuit chip can communicate with the second integrated circuit chip while the back face of the integrated circuit chip is adjacent to the active face of the second integrated circuit chip. Moreover, the electromagnetic via operates by facilitating non-conductive signaling through the integrated circuit chip.

    摘要翻译: 本发明的一个实施例提供一种集成电路芯片,其包括有源电路和信号焊盘所在的有源面以及与有源面相对的背面。 集成电路芯片还包括电磁通孔,其有助于集成电路芯片上的信号焊盘与第二集成电路芯片上的信号焊盘之间的通信。 电磁通孔将集成电路芯片的有源面上的信号焊盘连接到集成电路芯片的背面,使得集成电路芯片可以与集成电路芯片的背面相邻的第二集成电路芯片连通 到第二集成电路芯片的主动面。 此外,电磁通孔通过促进通过集成电路芯片的非导电信号来操作。

    Method and apparatus for determining mask layouts for a multiple patterning process
    9.
    发明授权
    Method and apparatus for determining mask layouts for a multiple patterning process 有权
    用于确定多个图案化工艺的掩模布局的方法和装置

    公开(公告)号:US08028253B2

    公开(公告)日:2011-09-27

    申请号:US11732268

    申请日:2007-04-02

    IPC分类号: G06F17/50

    CPC分类号: G03F1/70

    摘要: One embodiment provides a method for determining mask layouts. During operation, the system can receive a design intent. Next, the system can determine a set of critical edges in the design layout, and select a first edge and a second edge. The system can then determine a first trench and a second trench using the first edge and the second edge, respectively. Note that an edge of the first trench may substantially overlap with the first edge, and an edge of the second trench may substantially overlap with the second edge. Next, the system may assign the first trench and the second trench to the first mask layout and the second mask layout, respectively. The system can then increase the first trench and the second trench, thereby improving pattern fidelity. The resulting mask layouts may be used in a double patterning process.

    摘要翻译: 一个实施例提供了一种用于确定掩模布局的方法。 在操作期间,系统可以接收设计意图。 接下来,系统可以确定设计布局中的一组关键边缘,并且选择第一边缘和第二边缘。 然后,系统可以分别使用第一边缘和第二边缘来确定第一沟槽和第二沟槽。 注意,第一沟槽的边缘可以基本上与第一边缘重叠,并且第二沟槽的边缘可以基本上与第二边缘重叠。 接下来,系统可以分别将第一沟槽和第二沟槽分配给第一掩模布局和第二掩模布局。 然后,系统可以增加第一沟槽和第二沟槽,从而提高图案保真度。 所得到的掩模布局可以用于双重图案化工艺中。

    System and method for emulating input/output performance of an application
    10.
    发明授权
    System and method for emulating input/output performance of an application 有权
    用于模拟应用程序的输入/输出性能的系统和方法

    公开(公告)号:US07945657B1

    公开(公告)日:2011-05-17

    申请号:US11093998

    申请日:2005-03-30

    CPC分类号: G06F11/3457 G06F11/3428

    摘要: A system and method for emulating the input/output performance of an application. A workload description language is used to produce a small but accurate model of the application, which is flexible enough to emulate the application's performance with varying underlying system configurations or operating parameters. The model describes I/O operations performed by the application, and reflects any dependencies that exist between different application threads or processes. The model is then executed or interpreted with a particular system configuration, and various parameters of the I/O operations may be set at the model's run-time. During execution, the input/output operations described in the model are generated according to the specified parameters, and are performed. The system configuration and/or I/O operation parameters may be altered and the model may be re-run.

    摘要翻译: 用于模拟应用程序的输入/输出性能的系统和方法。 使用工作负载描述语言来生成应用程序的小而精确的模型,该模型足够灵活,可以通过不同的底层系统配置或操作参数来模拟应用程序的性能。 该模型描述了应用程序执行的I / O操作,并反映了不同应用程序线程或进程之间存在的任何依赖关系。 然后,使用特定的系统配置执行或解释该模型,并且可以在模型的运行时设置I / O操作的各种参数。 在执行期间,模型中描述的输入/输出操作根据指定的参数生成,并被执行。 可以改变系统配置和/或I / O操作参数,并且可以重新运行模型。