COMBINATION 408
    1.
    发明申请
    COMBINATION 408 审中-公开
    组合408

    公开(公告)号:US20100144606A1

    公开(公告)日:2010-06-10

    申请号:US12488027

    申请日:2009-06-19

    摘要: The invention provides a pharmaceutical product, kit or composition comprising a first active ingredient which is N-Cyclohexyl-N3-[2-(3-fluorophenyl)ethyl]-N-(2-{[2-(4-hydroxy-2-oxo-2,3-dihydro-1,3-benzothiazol-7-yl)ethyl]amino}ethyl)-β-alaninamide or a salt thereof, and a second active ingredient selected from: a non-steroidal Glucocorticoid Receptor (GR Receptor) Agonist; an antioxidant; a CCR1 antagonist; a chemokine antagonist (not CCR1); a corticosteroid; a CRTh2 antagonist; a DP1 antagonist; an Histone Deacetylase Inducer; an IKK2 inhibitor; a COX inhibitor; a lipoxygenase inhibitor; a leukotriene receptor antagonist; an MPO inhibitor; a muscarinic antagonist; a p38 inhibitor; a PDE inhibitor; a PPARγ agonist; a protease inhibitor; a Statin; a thromboxane antagonist; a vasodilator; or, an ENAC blocker (Epithelial Sodium-channel blocker); and its use in the treatment of respiratory disease (for example chronic obstructive pulmonary disease (COPD) or asthma); to certain salts of N-Cyclohexyl-N3-[2-(3-fluorophenyl)ethyl]-N-(2-{[2-(4-hydroxy-2-oxo-2,3-dihydro-1,3-benzothiazol-7-yl)ethyl]amino}ethyl)-β-alaninamide and to an intermediate useful in the manufacture of this pharmaceutically active substance and salts thereof.

    摘要翻译: 本发明提供了包含N-环己基-N3- [2-(3-氟苯基)乙基] -N-(2 - {[2-(4-羟基-2- -2-氧代-2,3-二氢-1,3-苯并噻唑-7-基)乙基]氨基}乙基) - 丙氨酰胺或其盐,和第二活性成分,选自:非甾体糖皮质激素受体(GR 受体)激动剂; 抗氧化剂 CCR1拮抗剂; 趋化因子拮抗剂(不是CCR1); 皮质类固醇 CRTh2拮抗剂; DP1拮抗剂; 组蛋白脱乙酰酶诱导剂; IKK2抑制剂; COX抑制剂; 脂氧合酶抑制剂; 白细胞三烯受体拮抗剂; MPO抑制剂; 毒蕈碱拮抗剂 一种p38抑制剂; PDE抑制剂; PPARγ激动剂; 蛋白酶抑制剂; 他汀类 血栓素拮抗剂; 血管扩张剂 或ENAC阻断剂(上皮钠通道阻断剂); 及其用于治疗呼吸系统疾病(如慢性阻塞性肺疾病(COPD)或哮喘)); 对于N-环己基-N3- [2-(3-氟苯基)乙基] -N-(2 - {[2-(4-羟基-2-氧代-2,3-二氢-1,3-苯并噻唑) -7-基)乙基]氨基}乙基) - 乙酰氨基脲和可用于制备该药物活性物质及其盐的中间体。

    Tessellation set
    3.
    发明授权
    Tessellation set 失效
    镶嵌套

    公开(公告)号:US06309716B1

    公开(公告)日:2001-10-30

    申请号:US09405470

    申请日:1999-09-24

    IPC分类号: F16B200

    摘要: Sets of tessellatable elements are disclosed, in which a relatively low number of different elements may be combined together to provide very attractive tessellating patterns. The elements may be in the form of tiles, for paving or for covering flooring or walls, for example, game pieces, including television and computer games, pieces for use in maze construction and for many other applications.

    摘要翻译: 公开了一组可分块的元件,其中相对较少数量的不同元件可以组合在一起以提供非常有吸引力的镶嵌图案。元件可以是瓦片的形式,用于铺路或用于覆盖地板或墙壁,例如游戏 件,包括电视和电脑游戏,用于迷宫建筑和许多其他应用的作品。

    HIGH INTEGRITY PROCESSOR MONITOR
    4.
    发明申请
    HIGH INTEGRITY PROCESSOR MONITOR 有权
    高度完整的处理器监视器

    公开(公告)号:US20100205414A1

    公开(公告)日:2010-08-12

    申请号:US12369101

    申请日:2009-02-11

    IPC分类号: G06F9/30

    CPC分类号: G06F11/28

    摘要: A method of ensuring high integrity of a processor is provided. The method includes executing sets of sequential instructions, each execution being based on a unique initial value, generating a computed final value responsive to each execution of a set of sequential instructions, and sending computed values to a monitoring portion of a high integrity processor monitor system responsive to the generating for each execution of the set of sequential instructions. The execution of the sets of sequential instructions tests pertinent addressing modes, operand sizes, and instruction side-effects for each instruction tested in a monitored central processing unit.

    摘要翻译: 提供了确保处理器的高完整性的方法。 该方法包括执行顺序指令集,每个执行基于唯一的初始值,响应于一组顺序指令的每次执行产生计算的最终值,并将计算值发送到高完整性处理器监视器系统的监视部分 响应于对所述一组顺序指令的每次执行的生成。 执行这些连续指令测试在受监视的中央处理单元中测试的每个指令的相关寻址模式,操作数大小和指令副作用。

    Tessellatable elements and plane tessellations for covering or decoration
    5.
    发明授权
    Tessellatable elements and plane tessellations for covering or decoration 失效
    可镶嵌元素和平面镶嵌用于覆盖或装饰

    公开(公告)号:US5945181A

    公开(公告)日:1999-08-31

    申请号:US730545

    申请日:1996-10-11

    申请人: Adrian Fisher

    发明人: Adrian Fisher

    摘要: Sets of tessellatable polygonal elements are provided from which a variety of tessellations may be formed for a variety of applications, e.g., to provide coverings and decorations for surfaces such as pedestrian walks, driveways, floors and walls, and to provide patterns for games, puzzles and coloring books. Several different embodiments, applications and tessellations are described. In one embodiment, irregular heptagonal elements are tessellated with substantially regular pentagonal elements. In another embodiment, the elements are heptagonal and square. The tessellations may have straight edges by providing one or more elements of the set of tessellatable elements with a line of symmetry and providing a further tessellatable element or elements which is that part of the element on either side of the line of symmetry. The elements may be colored to provide many variations and decorations. The tessellatable elements described herein may also tessellate with standard size elements of the same or compatible type element.

    摘要翻译: 提供了可镶嵌多边形元素的集合,可以为各种应用形成各种镶嵌,例如为诸如行人走道,车道,地板和墙壁等表面提供覆盖物和装饰物,并提供用于游戏,拼图的图案 和着色书。 描述了几个不同的实施例,应用和镶嵌。 在一个实施例中,不规则的七边形元件被镶嵌有基本上规则的五边形元件。 在另一个实施例中,元件是七边形和正方形。 通过提供具有对称线的该组可镶嵌元件的一个或多个元件,并提供作为该对称线的任一侧上元件的该部分的另外的可镶嵌元件,该镶嵌可以具有直边。 元件可以被着色以提供许多变化和装饰。 本文所述的可细化元件也可以与相同或兼容型元件的标准尺寸元件镶嵌。

    High integrity processor monitor
    6.
    发明授权
    High integrity processor monitor 有权
    高完整性处理器监视器

    公开(公告)号:US08352795B2

    公开(公告)日:2013-01-08

    申请号:US12369101

    申请日:2009-02-11

    IPC分类号: G06F11/00

    CPC分类号: G06F11/28

    摘要: A method of ensuring high integrity of a processor is provided. The method includes executing sets of sequential instructions, each execution being based on a unique initial value, generating a computed final value responsive to each execution of a set of sequential instructions, and sending computed values to a monitoring portion of a high integrity processor monitor system responsive to the generating for each execution of the set of sequential instructions. The execution of the sets of sequential instructions tests pertinent addressing modes, operand sizes, and instruction side-effects for each instruction tested in a monitored central processing unit.

    摘要翻译: 提供了确保处理器的高完整性的方法。 该方法包括执行顺序指令集,每个执行基于唯一的初始值,响应于一组顺序指令的每次执行产生计算的最终值,并将计算值发送到高完整性处理器监视器系统的监视部分 响应于对所述一组顺序指令的每次执行的生成。 执行这些连续指令测试在受监视的中央处理单元中测试的每个指令的相关寻址模式,操作数大小和指令副作用。