Interoperable management of application servers
    2.
    发明授权
    Interoperable management of application servers 有权
    应用服务器的互操作管理

    公开(公告)号:US07908294B2

    公开(公告)日:2011-03-15

    申请号:US11340754

    申请日:2006-01-26

    Inventor: Akbar Ali Ansari

    CPC classification number: H04L67/16 H04L41/5083 H04L41/5096 H04L67/02

    Abstract: In accordance with embodiments, there are provided mechanisms and methods for providing interoperable management of application servers. These mechanisms and methods can enable a software developer to create client applications using one or more programming systems, i.e., .NET, C++, VISUAL C++, etc. that can discover and interact with management resources, such as objects, functions and so forth, deployed on an application server, such as an application server implemented using a disparate programming system, i.e., a J2EE Application server, for example. Embodiments employing interfaces that conform to an implemented standard, i.e., Web Service Description Language (WSDL), for example and conform to an implemented protocol, such as Simple Object Access Protocol (SOAP), Hyper-Text Transfer Protocol (HTTP) for example, can enable third parties, for example, to create software to monitor managed applications and/or servers.

    Abstract translation: 根据实施例,提供了用于提供应用服务器的可互操作管理的机制和方法。 这些机制和方法可以使软件开发人员能够使用一个或多个编程系统(即.NET,C ++,VISUAL C ++等)来创建客户端应用程序,这些程序系统可以发现并与管理资源(如对象,功能等)进行交互, 部署在诸如使用不同的编程系统(即例如J2EE应用服务器)实现的应用服务器上。 采用符合所实施的标准(例如,Web服务描述语言(WSDL))并且符合实现的协议(例如简单对象访问协议(SOAP)),超文本传输​​协议(HTTP))的接口的实施例, 例如,可以使第三方创建软件来监视被管理的应用程序和/或服务器。

    High agility frequency synthesizer phase-locked loop
    3.
    发明授权
    High agility frequency synthesizer phase-locked loop 有权
    高灵敏度频率合成器锁相环

    公开(公告)号:US07747237B2

    公开(公告)日:2010-06-29

    申请号:US10821531

    申请日:2004-04-09

    CPC classification number: H03L7/22

    Abstract: A highly agile low phase noise frequency synthesizer is provided for rapid generation of frequency specific signals. The frequency synthesizer is capable of rapidly generating signals at different output frequencies while maintaining low cross-coupling. Two or more signal generators utilize a reference frequency to generate two or more signals. These signals are limit processed to reduce cross-coupling prior to being presented to a switch. Responsive to a control signal, the switch outputs one of the signals to a frequency modification device, such as a frequency divider or multiplier. Responsive to a control signal, the frequency modification device scales the frequency of the switch output to convert the frequency of the switch output signal to a desired output frequency. By maintaining sufficient frequency separation between the switch input signals cross-coupling and phase noise is minimized and implementation on an integrated circuit may be achieved.

    Abstract translation: 提供了一种高灵敏度的低相位噪声频率合成器,用于快速产生频率特定信号。 频率合成器能够在保持低交叉耦合的同时快速产生不同输出频率的信号。 两个或更多个信号发生器利用参考频率来产生两个或更多个信号。 这些信号被限制处理,以便在呈现给开关之前减少交叉耦合。 响应于控制信号,开关将一个信号输出到频率修改装置,例如分频器或乘法器。 响应于控制信号,频率修改装置缩放开关输出的频率,以将开关输出信号的频率转换为期望的输出频率。 通过在开关输入信号之间保持足够的频率间隔,交叉耦合和相位噪声被最小化,并且可以实现集成电路上的实现。

    SYSTEM AND METHOD FOR STARTING SERVER SERVICES
    4.
    发明申请
    SYSTEM AND METHOD FOR STARTING SERVER SERVICES 有权
    启动服务器服务的系统和方法

    公开(公告)号:US20090132692A1

    公开(公告)日:2009-05-21

    申请号:US12270024

    申请日:2008-11-13

    CPC classification number: G06F21/121

    Abstract: In one embodiment, services are not loaded if they are not needed by the user and if no services needed by the user are dependent upon them. In one embodiment, server services are represented as nodes in a graph data structure. Connections between the nodes indicate dependencies between the server services. The graph is sorted to create an ordered list of services which can be used to startup the services. In another embodiment a server services manager reads license files and user inputs and marks the ordered list of services to indicate which services are to startup.

    Abstract translation: 在一个实施例中,如果用户不需要服务,并且用户所需的服务不依赖于它们,则不加载服务。 在一个实施例中,服务器服务被表示为图形数据结构中的节点。 节点之间的连接指示服务器服务之间的依赖关系。 图表被排序以创建可用于启动服务的服务的有序列表。 在另一个实施例中,服务器服务管理器读取许可证文件和用户输入并标记服务的有序列表以指示哪些服务要启动。

    Frequency synthesizer with loop filter calibration for bandwidth control
    5.
    发明授权
    Frequency synthesizer with loop filter calibration for bandwidth control 有权
    带循环滤波器校准的频率合成器,用于带宽控制

    公开(公告)号:US07259633B2

    公开(公告)日:2007-08-21

    申请号:US11137210

    申请日:2005-05-24

    Abstract: According to one exemplary embodiment, a frequency synthesizer module includes a loop filter, where the loop filter includes a capacitor having a first terminal and a second terminal. The frequency synthesizer module further includes a loop filter calibration module coupled to the capacitor in the loop filter. The loop filter calibration module causes an initial capacitance between the first terminal and the second terminal of the capacitor to increase to a target capacitance when the loop filter is in a calibration mode. The target capacitance can causes in increase in control of a bandwidth of the loop filter and a reduction in percent error of a unity gain bandwidth of the loop filter. The loop filter further includes a switched capacitor array configured to cause the initial capacitance to increase to the target capacitance in response to a digital feedback signal provided by the loop filter calibration module.

    Abstract translation: 根据一个示例性实施例,频率合成器模块包括环路滤波器,其中环路滤波器包括具有第一端子和第二端子的电容器。 频率合成器模块还包括耦合到环路滤波器中的电容器的环路滤波器校准模块。 当环路滤波器处于校准模式时,环路滤波器校准模块使得电容器的第一端子和第二端子之间的初始电容增加到目标电容。 目标电容可以导致环路滤波器的带宽的控制的增加和环路滤波器的单位增益带宽的百分比误差的减小。 环路滤波器还包括开关电容器阵列,其被配置为响应于由环路滤波器校准模块提供的数字反馈信号而使初始电容增加到目标电容。

    Frequency synthesizer with loop filter calibration for bandwidth control
    6.
    发明申请
    Frequency synthesizer with loop filter calibration for bandwidth control 有权
    带循环滤波器校准的频率合成器,用于带宽控制

    公开(公告)号:US20060267697A1

    公开(公告)日:2006-11-30

    申请号:US11137210

    申请日:2005-05-24

    Abstract: According to one exemplary embodiment, a frequency synthesizer module includes a loop filter, where the loop filter includes a capacitor having a first terminal and a second terminal. The frequency synthesizer module further includes a loop filter calibration module coupled to the capacitor in the loop filter. The loop filter calibration module causes an initial capacitance between the first terminal and the second terminal of the capacitor to increase to a target capacitance when the loop filter is in a calibration mode. The target capacitance can causes in increase in control of a bandwidth of the loop filter and a reduction in percent error of a unity gain bandwidth of the loop filter. The loop filter further includes a switched capacitor array configured to cause the initial capacitance to increase to the target capacitance in response to a digital feedback signal provided by the loop filter calibration module.

    Abstract translation: 根据一个示例性实施例,频率合成器模块包括环路滤波器,其中环路滤波器包括具有第一端子和第二端子的电容器。 频率合成器模块还包括耦合到环路滤波器中的电容器的环路滤波器校准模块。 当环路滤波器处于校准模式时,环路滤波器校准模块使得电容器的第一端子和第二端子之间的初始电容增加到目标电容。 目标电容可以导致环路滤波器的带宽的控制的增加和环路滤波器的单位增益带宽的百分比误差的减小。 环路滤波器还包括开关电容器阵列,其被配置为响应于由环路滤波器校准模块提供的数字反馈信号而使初始电容增加到目标电容。

    Programmable relaxation oscillator
    7.
    发明授权
    Programmable relaxation oscillator 有权
    可编程松弛振荡器

    公开(公告)号:US06377129B1

    公开(公告)日:2002-04-23

    申请号:US09302754

    申请日:1999-04-30

    CPC classification number: H03K3/354

    Abstract: An oscillator has a slope-fixing circuit that generates a control signal and fixes the slope of the control signal, a swing-fixing circuit that fixes the swing of the control signal, and a switching block that generates an output signal having a frequency derived from the swing and the slope of the control signal. The slope-fixing circuit comprises a fixed timing capacitor C1 in parallel with a plurality of switchable timing capacitors C2 . . . CN to provide an effective capacitance C. The slope of the control signal is determined by the ratio of a control current I to the effective capacitance C. The swing-fixing circuit comprises a replica cell that accepts a programmable reference voltage VREF and provides a fixed voltage swing VSW=VDD−VREF across a pair of load transistors. The switching block comprises a pair of switching transistors that alternate between “on” and “off” states depending on the value of the control signal to produce an oscillating output signal. The frequency of the output signal is given by I 4 ⁢ CV SW .

    Abstract translation: 振荡器具有产生控制信号并固定控制信号的斜率的斜坡固定电路,固定控制信号的摆动的摆动固定电路以及产生具有从...得到的频率的输出信号的开关块 控制信号的摆幅和斜率。 斜坡固定电路包括与多个可切换定时电容器C2并联的固定定时电容器C1。 。 。 CN以提供有效电容C.控制信号的斜率由控制电流I与有效电容C的比确定。摆幅固定电路包括接受可编程参考电压VREF的复制单元并提供固定的 一对负载晶体管的摆幅VSW = VDD-VREF。 切换块包括一对开关晶体管,其根据控制信号的值在“导通”和“断开”状态之间交替以产生振荡输出信号。 输出信号的频率由下式给出

    SYSTEM AND METHOD FOR USING QUALITY OF SERVICE WITH WORKLOAD MANAGEMENT IN AN APPLICATION SERVER ENVIRONMENT
    9.
    发明申请
    SYSTEM AND METHOD FOR USING QUALITY OF SERVICE WITH WORKLOAD MANAGEMENT IN AN APPLICATION SERVER ENVIRONMENT 有权
    在应用服务器环境中使用服务质量与工作负载管理的系统和方法

    公开(公告)号:US20120311138A1

    公开(公告)日:2012-12-06

    申请号:US13298211

    申请日:2011-11-16

    Abstract: Described herein are systems and methods for collecting and surfacing metrics with respect to their classification; and the use of the metrics by a workload manager and other application monitoring tools to provide quality-of-service and workload management. Each request is classified, either by the application server or another process. A request classification identifier (RCID) is associated with each request, and thereafter flows with that request as it is being processed. The RCID value is used by data collectors at various points in the system to aggregate the metrics, and a workload manager collects the metrics. The collected metrics are then processed by a rules engine at the workload manager, which analyzes the metrics and generates adjustment recommendations to provide quality-of-service and workload management.

    Abstract translation: 本文描述了用于收集和表达关于其分类的度量的系统和方法; 以及工作负载管理器和其他应用程序监视工具使用指标来提供服务质量和工作负载管理。 每个请求被应用程序服务器或其他进程分类。 请求分类标识符(RCID)与每个请求相关联,然后在处理该请求时与该请求一起流动。 系统中的各个数据收集器使用RCID值来聚合指标,工作负载管理器收集指标。 然后,收集的指标由工作负载管理器上的规则引擎进行处理,工作负载管理器分析指标并生成调整建议以提供服务质量和工作负载管理。

    High agility frequency synthesizer phase-locked loop
    10.
    发明申请
    High agility frequency synthesizer phase-locked loop 有权
    高灵敏度频率合成器锁相环

    公开(公告)号:US20110037501A1

    公开(公告)日:2011-02-17

    申请号:US12803550

    申请日:2010-06-28

    CPC classification number: H03L7/22

    Abstract: A highly agile low phase noise frequency synthesizer is provided for rapid generation of frequency specific signals. The frequency synthesizer is capable of rapidly generating signals at different output frequencies while maintaining low cross-coupling. Two or more signal generators utilize a reference frequency to generate two or more signals. These signals are limit processed to reduce cross-coupling prior to being presented to a switch. Responsive to a control signal, the switch outputs one of the signals to a frequency modification device, such as a frequency divider or multiplier. Responsive to a control signal, the frequency modification device scales the frequency of the switch output to convert the frequency of the switch output signal to a desired output frequency. By maintaining sufficient frequency separation between the switch input signals cross-coupling and phase noise is minimized and implementation on an integrated circuit may be achieved.

    Abstract translation: 提供了一种高灵敏度的低相位噪声频率合成器,用于快速产生频率特定信号。 频率合成器能够在保持低交叉耦合的同时快速产生不同输出频率的信号。 两个或更多个信号发生器利用参考频率来产生两个或更多个信号。 这些信号被限制处理,以便在呈现给开关之前减少交叉耦合。 响应于控制信号,开关将一个信号输出到频率修改装置,例如分频器或乘法器。 响应于控制信号,频率修改装置缩放开关输出的频率,以将开关输出信号的频率转换为期望的输出频率。 通过在开关输入信号之间保持足够的频率间隔,交叉耦合和相位噪声被最小化,并且可以实现集成电路上的实现。

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