PWM power supply with constant RMS output voltage control
    1.
    发明授权
    PWM power supply with constant RMS output voltage control 失效
    PWM电源具有恒定RMS输出电压控制

    公开(公告)号:US06411072B1

    公开(公告)日:2002-06-25

    申请号:US09836708

    申请日:2001-04-17

    申请人: Alan S. Feldman

    发明人: Alan S. Feldman

    IPC分类号: G05F500

    CPC分类号: G05F5/00

    摘要: A control system and method for supplying a constant RMS voltage to a load includes a outer control loop for monitoring a characteristic variable of the system and an inner control loop for maintaining the power delivered to the load as a function of the received input power. A pulse width modulator (PWM) coupled to both control loops delivers pulses representative of an unregulated input voltage duty cycle. The inner control loop compares the duty cycle representation of the input voltage with a duty cycle representation of the pulse and generates a control signal to the PWM accordingly.

    摘要翻译: 用于向负载提供恒定RMS电压的控制系统和方法包括用于监测系统的特性变量的外部控制回路和用于保持作为所接收的输入功率的函数传递到负载的功率的内部控制回路。 耦合到两个控制回路的脉宽调制器(PWM)传送表示未调节的输入电压占空比的脉冲。 内部控制环路将输入电压的占空比表示与脉冲的占空比表示进行比较,并相应地向PWM生成控制信号。

    Method and apparatus for programmable power curve and wave generator
    2.
    发明授权
    Method and apparatus for programmable power curve and wave generator 失效
    可编程功率曲线和波发生器的方法和装置

    公开(公告)号:US06329802B1

    公开(公告)日:2001-12-11

    申请号:US09575960

    申请日:2000-05-23

    申请人: Alan S. Feldman

    发明人: Alan S. Feldman

    IPC分类号: G05F146

    CPC分类号: H05B39/02 Y10S323/901

    摘要: A programmable control circuit is disclosed for generating a programmable power curve and ramp. The circuit includes an amplifier having both positive and negative feedback. The positive feedback including a time lag component and the negative feedback including a gain component. The circuit output is easily programmable by varying the component values and/or the input signal. In one embodiment, the rate of change of the control circuit's output waveform may be modified. In another embodiment, the circuit controls the start-up power supplied to a load. In yet another embodiment, the circuit is a waveform generator.

    摘要翻译: 公开了一种用于产生可编程功率曲线和斜坡的可编程控制电路。 该电路包括具有正和负反馈的放大器。 正反馈包括时滞分量和包括增益分量的负反馈。 通过改变分量值和/或输入信号,可以很容易地编程电路输出。 在一个实施例中,可以修改控制电路的输出波形的变化率。 在另一个实施例中,电路控制提供给负载的启动功率。 在另一个实施例中,电路是波形发生器。

    Delayed monostable multivibrator
    3.
    发明授权
    Delayed monostable multivibrator 失效
    延迟单稳态多谐振荡器

    公开(公告)号:US4581544A

    公开(公告)日:1986-04-08

    申请号:US465932

    申请日:1983-02-14

    申请人: Alan S. Feldman

    发明人: Alan S. Feldman

    CPC分类号: H03K5/04 H03K5/08

    摘要: A buffer comparator receives input pulses and produces buffer output signals that drive first and second output comparators arranged to operate as an amplitude-sensitive logic circuit that produces a high level output signal when and only when the internal driving signals have an amplitude between first and second threshold levels. In one embodiment, the output of the buffer comparator is applied directly to the non-inverting input terminal of the first logic circuit comparator and through a low resistance resistor to an R-C network and the inverting terminal of the second logic circuit comparator. The remaining input terminals on the logic comparators are connected to a multiple voltage divider that provides lower and upper threshold voltages to the respective comparators. An input pulse applied to the buffer comparator initiates an internal driving signal that charges the capacitor in the R-C network exponentially. While the voltage on the capacitor rises between the lower and upper threshold levels the logic comparators produce a high level output signal. When the input signal terminates, the low resistance resistor reverses the ordinary switching sequence of the logic comparators and prevents the formation of an output pulse at this time. A second embodiment of the invention dispenses with the means to reverse the ordinary switching sequence during discharge of the capacitor in the R-C network and thus provides a second positive-going output pulse at this time.

    摘要翻译: 缓冲比较器接收输入脉冲并产生缓冲器输出信号,该缓冲器输出信号驱动第一和第二输出比较器,其布置成作为振幅敏感逻辑电路工作,当且仅当内部驱动信号具有在第一和第二之间的幅度时产生高电平输出信号 阈值水平。 在一个实施例中,缓冲比较器的输出直接施加到第一逻辑电路比较器的非反相输入端,并通过低电阻电阻施加到R-C网络和第二逻辑电路比较器的反相端。 逻辑比较器上的其余输入端子连接到多个分压器,其向相应的比较器提供较低和较高的阈值电压。 施加到缓冲比较器的输入脉冲启动内部驱动信号,以R-C网络指数地对电容器充电。 当电容器上的电压在下限和上限阈值电平之间上升时,逻辑比较器产生高电平输出信号。 当输入信号终止时,低电阻电阻反转逻辑比较器的常规切换序列,并防止此时形成输出脉冲。 本发明的第二个实施例省略了在R-C网络中的电容器放电期间反转普通开关顺序的装置,因此此时提供了第二正向输出脉冲。

    Power linearization technique for controlling the luminance of light emitting display devices
    4.
    发明授权
    Power linearization technique for controlling the luminance of light emitting display devices 有权
    用于控制发光显示装置的亮度的功率线性化技术

    公开(公告)号:US06724158B1

    公开(公告)日:2004-04-20

    申请号:US10282892

    申请日:2002-10-28

    申请人: Alan S. Feldman

    发明人: Alan S. Feldman

    IPC分类号: H05B4136

    摘要: A circuit and method for providing a linear power to a load uses pulse modulation technique where the frequency and pulse width of the pulse width modulated waveform driving the load are varied simultaneously. In one aspect of the disclosure, a pulse width modulator circuit is responsive to a command drive signal for producing the pulse width waveform the width of the pulses varying accordingly. In addition, a frequency control circuit that is also responsive to the command drive signal provides a control current to the pulse width modulator circuit wherein the frequency of the waveform is varied as the pulse widths are varied.

    摘要翻译: 用于向负载提供线性功率的电路和方法使用脉冲调制技术,其中驱动负载的脉冲宽度调制波形的频率和脉冲宽度同时变化。 在本公开的一个方面,脉冲宽度调制器电路响应于命令驱动信号以产生脉冲宽度波形,脉冲宽度相应地变化。 此外,还响应于指令驱动信号的频率控制电路向脉冲宽度调制器电路提供控制电流,其中波形的频率随着脉冲宽度的变化而变化。

    Bi-directional driver system for electrical load
    5.
    发明授权
    Bi-directional driver system for electrical load 失效
    电负载双向驱动系统

    公开(公告)号:US4490655A

    公开(公告)日:1984-12-25

    申请号:US425012

    申请日:1982-09-27

    申请人: Alan S. Feldman

    发明人: Alan S. Feldman

    CPC分类号: H03K17/663 H02P7/04

    摘要: A bi-directional driver system for an electrical load operable in response to two independent logic command signals provides a means for selecting the direction of current flow in the load when driven by the external command. A bridge circuit employs inputs to dual transistor switches operating in the saturated mode in series with the electrical load, cooperating with common emitter transistor linear amplifiers and diodes, and biased by the input logic signal so as to drive the load current in a predetermined direction. The circuit provides protection from undesired power supply current surges when logic command signals are applied to both inputs, and from transients due to failure of a saturated transistor switch at one input to cease conducting before the application of a command signal to the second input. Embodiments for inductive loads and annunciator lamps are described.

    摘要翻译: 用于响应于两个独立逻辑命令信号可操作的电负载的双向驱动器系统提供了用于在由外部命令驱动时选择负载中的电流流动的方向的装置。 桥接电路采用与饱和模式工作的双晶体管开关的输入,与电负载串联,与公共发射极晶体管线性放大器和二极管配合,并由输入逻辑信号偏置,以便沿预定方向驱动负载电流。 当逻辑指令信号施加到两个输入时,电路提供保护以防止不期望的电源电流浪涌,以及由于在一个输入处的饱和晶体管开关故障而在向第二输入施加命令信号之前停止导通的瞬变。 描述感性负载和报警灯的实施例。

    Load sensor driver apparatus
    6.
    发明授权
    Load sensor driver apparatus 失效
    负载传感器驱动装置

    公开(公告)号:US5391934A

    公开(公告)日:1995-02-21

    申请号:US73920

    申请日:1993-06-08

    申请人: Alan S. Feldman

    发明人: Alan S. Feldman

    IPC分类号: G01G19/07 H03F3/21 H03K3/01

    CPC分类号: H03F3/211 G01G19/07

    摘要: A driver apparatus for driving one or more electrical loads includes an oscillator for providing an input signal. An amplifier amplifies the input signal. A power transformer has a primary winding for receiving the amplified input signal and at least one secondary winding for providing a drive signal to drive one or more electrical loads. The driver apparatus may include a center tap for the secondary windings or a precision resistive network for providing a pair of diametrically symmetrical drive signals at each secondary winding. A drive signal from one of the secondary windings is compared to a reference signal in an automatic gain control loop for application to the oscillator. An average drive signal could also be derived from one output from each secondary winding to be compared to the reference signal for forming the gain automatic control loop.

    摘要翻译: 用于驱动一个或多个电负载的驱动器装置包括用于提供输入信号的振荡器。 放大器放大输入信号。 电力变压器具有用于接收放大的输入信号的初级绕组和用于提供驱动信号以驱动一个或多个电负载的至少一个次级绕组。 驱动器装置可以包括用于次级绕组的中心抽头或用于在每个次级绕组处提供一对沿直径对称的驱动信号的精密电阻网络。 将来自次级绕组中的一个的驱动信号与自动增益控制回路中的参考信号进行比较,以应用于振荡器。 平均驱动信号也可以从每个次级绕组的一个输出导出,以与用于形成增益自动控制回路的参考信号进行比较。

    LED backlight luminance sensing for LCDs
    7.
    发明授权
    LED backlight luminance sensing for LCDs 有权
    LED背光亮度感应LCD

    公开(公告)号:US07855708B2

    公开(公告)日:2010-12-21

    申请号:US09947094

    申请日:2001-09-05

    IPC分类号: G09G3/36 G09G3/32

    摘要: A liquid crystal display (LCD) system having LED backlight luminance sensing is disclosed. An array of LEDs in a backlighting position includes a plurality of LED strings. At least one LED from at least one string is identified as a sampling LED. The light emitted from the sampling LED is detected via an optical path using a light sensor. The reading from the sensor is contrast with a command, which results in a power compensation to the array accordingly. In one embodiment, the system includes a sampling enclosure encasing the sampling LED and light sensor. The sampling LED's direction of emission is altered from the string and reflected from the inside of the enclosure. In another embodiment, the system includes a direct sensing optical path between the light sensor and the sampling LED.

    摘要翻译: 公开了一种具有LED背光亮度感测的液晶显示(LCD)系统。 背光位置中的LED阵列包括多个LED串。 来自至少一个串的至少一个LED被识别为采样LED。 从采样LED发出的光通过使用光传感器的光路检测。 传感器的读数与命令形成对照,从而相应地对阵列进行功率补偿。 在一个实施例中,系统包括封装采样LED和光传感器的采样盒。 采样LED的发射方向从灯串改变并从外壳的内部反射。 在另一实施例中,系统包括光传感器和采样LED之间的直接感测光路。

    Apparatus for conversion of scaled binary data
    8.
    发明授权
    Apparatus for conversion of scaled binary data 失效
    用于转换缩放二进制数据的装置

    公开(公告)号:US5606318A

    公开(公告)日:1997-02-25

    申请号:US316317

    申请日:1994-09-30

    申请人: Alan S. Feldman

    发明人: Alan S. Feldman

    CPC分类号: G06J1/00 H03M7/04

    摘要: An apparatus converts m-bit digital data having a scale factor of K.sub.1 to n-bit digital data having a scale factor of K.sub.2. The apparatus comprises a digital to analog converter which receives the m-bit digital data, for outputting a first analog signal representative of a value associated with the m-bit digital data. An amplifier receives the first analog signal multiplies it by a factor, and outputs a second analog signal. The factor of the amplifier is K.sub.2 /K.sub.1, such that the second analog signal has a value with the scale factor of K.sub.2 associated therewith. An analog to digital converter receives the second analog signal, and converts the second analog signal to the n-bit digital data. The n-bit digital data has the scale factor of K.sub.2 associated therewith, the value representative of the n-bit digital data being essentially equal in the example of the present application to the value representative of the m-bit digital data, however, this is not always a requirement.

    摘要翻译: 一种装置将具有比例因子K1的m位数字数据转换成具有比例因子K2的n位数字数据。 该装置包括数模转换器,其接收m位数字数据,用于输出表示与m位数字数据相关联的值的第一模拟信号。 放大器接收第一模拟信号乘以因子,并输出第二模拟信号。 放大器的因素是K2 / K1,使得第二模拟信号具有与其相关联的比例因子为K2的值。 模数转换器接收第二模拟信号,并将第二模拟信号转换成n位数字数据。 n位数字数据具有与之相关联的K2的比例因子,表示本应用的示例中的n位数字数据的值基本上相等于表示m位数字数据的值的值,然而,这 并不总是要求。