公开(公告)号：US20080263488A1

公开(公告)日：2008-10-23

申请号：US11737289

申请日：2007-04-19

Applicant: Revanta Banerji ,  David J. Hathaway ,  Alex Rubin ,  Alexander J. Suess

Inventor： Revanta Banerji ,  David J. Hathaway ,  Alex Rubin ,  Alexander J. Suess

IPC: G06F17/50 ,  H03H11/26

CPC classification number: G06F17/505 ,  G06F2217/62

Abstract: A method for generating a skew schedule for a clock distribution network generates a schedule that accounts for both the timing requirements of the memory elements at the endpoints of the clock distribution network and the timing requirements of the gating signals that feed clock gates and other clock control elements within the clock distribution network. The method provides a total solution to the skew scheduling problem by way of a two-phase iterative process. The two phases of the process alternately keep track of the schedule generated by first taking the gating elements of the clock distribution network into account, followed by balancing any remaining skew that may exist on the memory elements of the same clock distribution network. Finally, the method describes a procedure to post-process the skew schedule to ensure that it can be implemented using a clock tree generation tool.

Abstract translation: 用于产生时钟分配网络的偏斜调度的方法产生考虑时钟分配网络的端点处的存储器元件的定时要求以及提供时钟门和其它时钟控制的门控信号的定时要求的调度 时钟分配网络中的元素。 该方法通过两阶段迭代过程为偏斜调度问题提供了一个完整的解决方案。 该过程的两个阶段交替地跟踪通过首先考虑时钟分配网络的门控元件产生的调度，然后平衡可能存在于相同时钟分配网络的存储器元件上的任何剩余的偏移。 最后，该方法描述了用于后处理偏斜调度以确保可以使用时钟树生成工具来实现的过程。

公开(公告)号：US08795457B2

公开(公告)日：2014-08-05

申请号：US12868896

申请日：2010-08-26

Applicant: Alex Rubin ,  James Fox ,  Randall Wilkerson

Inventor： Alex Rubin ,  James Fox ,  Randall Wilkerson

IPC: B31F1/00 ,  B29C65/00 ,  B31B1/60 ,  B32B37/00 ,  B65H35/00 ,  B65B17/00 ,  A61F13/15 ,  B32B3/04 ,  E04C3/00

CPC classification number: B29D99/0007 ,  B29C70/525 ,  B29C70/545 ,  B29K2101/12 ,  Y02T50/43 ,  Y10T156/10 ,  Y10T156/1002 ,  Y10T156/1007 ,  Y10T156/1008 ,  Y10T156/101 ,  Y10T156/1011 ,  Y10T156/1028 ,  Y10T156/1034 ,  Y10T156/1043 ,  Y10T156/1044 ,  Y10T156/1046 ,  Y10T156/1049 ,  Y10T156/1051 ,  Y10T156/1075 ,  Y10T156/1077 ,  Y10T156/1079

Abstract: A fabrication method of forming a thermoplastic composite laminate material with tailored and varying thickness in a continuous process. This process utilizes automated equipment or hand lay-up to collate parts or components into a multi-layer stack. Each stack contains all plies, including ply build-up areas, tacked in the proper location to maintain orientation and location. The consolidation tooling contains all necessary part features and is coordinated to the customized multiple ply stacks to form a single integrated thermoplastic composite laminate potentially having areas of differing thickness from these multiple ply stacks.

Abstract translation: 一种在连续工艺中形成具有定制且变化的厚度的热塑性复合层压材料的制造方法。 该过程利用自动化设备或手工铺层将零件或组件整理成多层堆叠。 每个堆叠包含所有层，包括堆积层，在适当的位置固定以保持定位和位置。 固结工具包含所有必要的部件特征，并且与定制的多层叠层协调以形成单个集成的热塑复合层压材料，潜在地具有与这些多层堆叠不同厚度的区域。

公开(公告)号：US08776004B2

公开(公告)日：2014-07-08

申请号：US13006450

申请日：2011-01-14

Applicant: Frank Borkam ,  Hemlata Gupta ,  David J. Hathaway ,  Kerim Kalafala ,  Vasant Rao ,  Alex Rubin

Inventor： Frank Borkam ,  Hemlata Gupta ,  David J. Hathaway ,  Kerim Kalafala ,  Vasant Rao ,  Alex Rubin

IPC: G06F9/455 ,  G06F17/50

CPC classification number: G06F17/5031 ,  G06F2217/84

Abstract: Determining static timing analysis margin on non-controlling inputs of clock shaping and other digital circuits using reverse merge timing includes: selecting one or more circuits within the logic design having a plurality of inputs and using reverse merge; identifying a controlling input of the selected circuit from among this plurality of inputs; and determining for at least one non-controlling input of the circuit, a timing value that may be used to drive design optimization based on the difference between arrival times of the controlling and non-controlling inputs.

Abstract translation: 使用反向合并定时确定时钟整形和其他数字电路的非控制输入端的静态时序分析余量包括：在逻辑设计中选择一个或多个具有多个输入并使用反向合并的电路; 从所述多个输入中识别所选择的电路的控制输入; 以及为所述电路的至少一个非控制输入确定可基于所述控制和非控制输入的到达时间之间的差异来驱动设计优化的定时值。

公开(公告)号：US20120185810A1

公开(公告)日：2012-07-19

申请号：US13006450

申请日：2011-01-14

Applicant: Frank Borkam ,  Hemlata Gupta ,  David J. Hathaway ,  Kerim Kalafala ,  Vasant Rao ,  Alex Rubin

Inventor： Frank Borkam ,  Hemlata Gupta ,  David J. Hathaway ,  Kerim Kalafala ,  Vasant Rao ,  Alex Rubin

IPC: G06F17/50

CPC classification number: G06F17/5031 ,  G06F2217/84

Abstract: Determining static timing analysis margin on non-controlling inputs of clock shaping and other digital circuits using reverse merge timing includes: selecting one or more circuits within the logic design having a plurality of inputs and using reverse merge; identifying a controlling input of the selected circuit from among this plurality of inputs; and determining for at least one non-controlling input of the circuit, a timing value that may be used to drive design optimization based on the difference between arrival times of the controlling and non-controlling inputs.

Abstract translation: 使用反向合并定时确定时钟整形和其他数字电路的非控制输入端的静态时序分析余量包括：在逻辑设计中选择一个或多个具有多个输入并使用反向合并的电路; 从所述多个输入中识别所选择的电路的控制输入; 以及为所述电路的至少一个非控制输入确定可基于所述控制和非控制输入的到达时间之间的差异来驱动设计优化的定时值。

公开(公告)号：US07937604B2

公开(公告)日：2011-05-03

申请号：US11737289

申请日：2007-04-19

Applicant: Revanta Banerji ,  David J. Hathaway ,  Alex Rubin ,  Alexander J. Suess

Inventor： Revanta Banerji ,  David J. Hathaway ,  Alex Rubin ,  Alexander J. Suess

IPC: G06F1/12 ,  G06F13/42 ,  H04L5/00 ,  H04L7/00

CPC classification number: G06F17/505 ,  G06F2217/62

Abstract: A method for generating a skew schedule for a clock distribution network generates a schedule that accounts for both the timing requirements of the memory elements at the endpoints of the clock distribution network and the timing requirements of the gating signals that feed clock gates and other clock control elements within the clock distribution network. The method provides a total solution to the skew scheduling problem by way of a two-phase iterative process. The two phases of the process alternately keep track of the schedule generated by first taking the gating elements of the clock distribution network into account, followed by balancing any remaining skew that may exist on the memory elements of the same clock distribution network. Finally, the method describes a procedure to post-process the skew schedule to ensure that it can be implemented using a clock tree generation tool.

Abstract translation: 用于产生时钟分配网络的偏斜调度的方法产生考虑时钟分配网络的端点处的存储器元件的定时要求以及提供时钟门和其它时钟控制的门控信号的定时要求的调度 时钟分配网络中的元素。 该方法通过两阶段迭代过程为偏斜调度问题提供了一个完整的解决方案。 该过程的两个阶段交替地跟踪通过首先考虑时钟分配网络的门控元件产生的调度，然后平衡可能存在于相同时钟分配网络的存储器元件上的任何剩余的偏移。 最后，该方法描述了用于后处理偏斜调度以确保可以使用时钟树生成工具来实现的过程。

公开(公告)号：US06876950B2

公开(公告)日：2005-04-05

申请号：US10133869

申请日：2002-04-26

Applicant: Thomas C. Beney ,  Christopher L. Morris ,  Terry D. Richardson ,  Alex Rubin

Inventor： Thomas C. Beney ,  Christopher L. Morris ,  Terry D. Richardson ,  Alex Rubin

IPC: G07C3/00 ,  G06F3/06

CPC classification number: G07C3/00

Abstract: A system for utilizing a computer to analyze damage to a structure. The system includes a damage disposition program for determining an appropriate repair procedure for repairing the damage to the structure. Additionally, the system includes a processor for executing the damage disposition program. A predefined set of damage class determination rules are utilized by the damage disposition program to determine a damage class.

Abstract translation: 一种利用计算机分析结构损坏的系统。 该系统包括用于确定用于修复对结构的损坏的适当修理程序的损坏处理程序。 另外，该系统包括用于执行损坏处理程序的处理器。 损伤处理程序利用预定义的一组损伤等级确定规则来确定损伤等级。