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公开(公告)号：US08760946B2
公开(公告)日：2014-06-24
申请号：US13477642
申请日：2012-05-22
申请人： Glenn A Dearth , Warren R Anderson , Anwar P Kashem , Richard W Reeves , Edoardo Prete , Gerald R Talbot
发明人： Glenn A Dearth , Warren R Anderson , Anwar P Kashem , Richard W Reeves , Edoardo Prete , Gerald R Talbot
IPC分类号： G11C8/18 , G11C7/22 , G11C7/10 , G11C11/4076
CPC分类号： G11C7/22 , G06F13/1689 , G06F13/4243 , G11C7/1066 , G11C7/222 , G11C11/4076
摘要： Various method and apparatus embodiments for training a delay for enabling a data strobe signal in a memory subsystem are disclosed. In one embodiment, a system includes a memory controller configured to receive a data strobe signal. The memory controller includes a training circuit. The training circuit includes a first storage circuit coupled to receive the data strobe signal on a data input and an enable signal on a clock input, and a training unit configured to, based on an output signal received from the first flip-flop, adjust a phase of the enable signal until an assertion of the enable signal coincides with a preamble indication in the data strobe signal.
摘要翻译： 公开了用于训练用于在存储器子系统中启用数据选通信号的延迟的各种方法和装置实施例。 在一个实施例中，系统包括被配置为接收数据选通信号的存储器控制器。 存储器控制器包括训练电路。 训练电路包括：第一存储电路，被耦合以在数据输入端接收数据选通信号;以及训练单元，被配置为基于从第一触发器接收到的输出信号调整一个 使能信号的相位直到使能信号的断言与数据选通信号中的前导码指示一致。
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公开(公告)号：US20130315014A1
公开(公告)日：2013-11-28
申请号：US13477642
申请日：2012-05-22
申请人： Glenn A Dearth , Warren R. Anderson , Anwar P. Kashem , Richard W. Reeves , Edoardo Prete , Gerald E. Talbot
发明人： Glenn A Dearth , Warren R. Anderson , Anwar P. Kashem , Richard W. Reeves , Edoardo Prete , Gerald E. Talbot
IPC分类号： G11C8/18
CPC分类号： G11C7/22 , G06F13/1689 , G06F13/4243 , G11C7/1066 , G11C7/222 , G11C11/4076
摘要： Various method and apparatus embodiments for training a delay for enabling a data strobe signal in a memory subsystem are disclosed. In one embodiment, a system includes a memory controller configured to receive a data strobe signal. The memory controller includes a training circuit. The training circuit includes a first storage circuit coupled to receive the data strobe signal on a data input and an enable signal on a clock input, and a training unit configured to, based on an output signal received from the first flip-flop, adjust a phase of the enable signal until an assertion of the enable signal coincides with a preamble indication in the data strobe signal.
摘要翻译： 公开了用于训练用于在存储器子系统中启用数据选通信号的延迟的各种方法和装置实施例。 在一个实施例中，系统包括被配置为接收数据选通信号的存储器控制器。 存储器控制器包括训练电路。 训练电路包括：第一存储电路，被耦合以在数据输入端接收数据选通信号;以及训练单元，被配置为基于从第一触发器接收的输出信号调整 使能信号的相位直到使能信号的断言与数据选通信号中的前导码指示一致。
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公开(公告)号：US08575972B2
公开(公告)日：2013-11-05
申请号：US12409228
申请日：2009-03-23
CPC分类号： G06F1/3203 , G06F1/08 , G06F1/324 , Y02D10/126
摘要： A first plurality of clock signals including a first clock signal and a second clock signal is received, the first and second clock signal out of phase with each other. A second plurality of clock signals comprising a third clock signal and a fourth clock signal is received, the third and fourth clock signals out of phase with each other. A plurality of enable signals are received. A fifth clock signal is determined based on the first plurality of clock signals and the plurality of enable signals. A sixth clock signal is determined based on the second plurality of clock signals and the plurality of enable signals. A seventh clock signal is determined based on the fifth clock signal and the sixth clock signal.
摘要翻译： 接收包括第一时钟信号和第二时钟信号的第一多个时钟信号，第一和第二时钟信号彼此异相。 接收包括第三时钟信号和第四时钟信号的第二多个时钟信号，第三和第四时钟信号彼此不同相。 接收多个使能信号。 基于第一多个时钟信号和多个使能信号来确定第五时钟信号。 基于第二多个时钟信号和多个使能信号来确定第六时钟信号。 基于第五时钟信号和第六时钟信号确定第七时钟信号。
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公开(公告)号：US20100237924A1
公开(公告)日：2010-09-23
申请号：US12409228
申请日：2009-03-23
IPC分类号： G06F1/04
CPC分类号： G06F1/3203 , G06F1/08 , G06F1/324 , Y02D10/126
摘要： A first plurality of clock signals including a first clock signal and a second clock signal is received, the first and second clock signal out of phase with each other. A second plurality of clock signals comprising a third clock signal and a fourth clock signal is received, the third and fourth clock signals out of phase with each other. A plurality of enable signals are received. A fifth clock signal is determined based on the first plurality of clock signals and the plurality of enable signals. A sixth clock signal is determined based on the second plurality of clock signals and the plurality of enable signals. A seventh clock signal is determined based on the fifth clock signal and the sixth clock signal.
摘要翻译： 接收包括第一时钟信号和第二时钟信号的第一多个时钟信号，第一和第二时钟信号彼此异相。 接收包括第三时钟信号和第四时钟信号的第二多个时钟信号，第三和第四时钟信号彼此不同相。 接收多个使能信号。 基于第一多个时钟信号和多个使能信号来确定第五时钟信号。 基于第二多个时钟信号和多个使能信号来确定第六时钟信号。 基于第五时钟信号和第六时钟信号确定第七时钟信号。
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