Four-gate transistor analog multiplier circuit
    4.
    发明申请
    Four-gate transistor analog multiplier circuit 有权
    四门晶体管模拟乘法电路

    公开(公告)号:US20080001658A1

    公开(公告)日:2008-01-03

    申请号:US11804893

    申请日:2007-05-21

    IPC分类号: H99Z99/00

    CPC分类号: G06G7/16

    摘要: A differential output analog multiplier circuit utilizing four G4-FETs, each source connected to a current source. The four G4-FETs may be grouped into two pairs of two G4-FETs each, where one pair has its drains connected to a load, and the other par has its drains connected to another load. The differential output voltage is taken at the two loads. In one embodiment, for each G4-FET, the first and second junction gates are each connected together, where a first input voltage is applied to the front gates of each pair, and a second input voltage is applied to the first junction gates of each pair. Other embodiments are described and claimed.

    摘要翻译: 一个差分输出模拟乘法器电路,利用四个四极管,每个源极连接到电流源。 四个G 4 SFET可以被分组成两对两个两个G 4 -FET,其中一对具有连接到负载的漏极,另一对具有 其下水道连接到另一个负载。 差分输出电压在两个负载下进行。 在一个实施例中,对于每个G 4 -FET,第一和第二结门各自连接在一起,其中第一输入电压施加到每对的前栅极,第二输入电压为 应用于每对的第一个结门。 描述和要求保护其他实施例。

    Four-gate transistor analog multiplier circuit
    6.
    发明授权
    Four-gate transistor analog multiplier circuit 有权
    四门晶体管模拟乘法电路

    公开(公告)号:US08010591B2

    公开(公告)日:2011-08-30

    申请号:US11804893

    申请日:2007-05-21

    IPC分类号: G06E3/00

    CPC分类号: G06G7/16

    摘要: A differential output analog multiplier circuit utilizing four G4-FETs, each source connected to a current source. The four G4-FETs may be grouped into two pairs of two G4-FETs each, where one pair has its drains connected to a load, and the other par has its drains connected to another load. The differential output voltage is taken at the two loads. In one embodiment, for each G4-FET, the first and second junction gates are each connected together, where a first input voltage is applied to the front gates of each pair, and a second input voltage is applied to the first junction gates of each pair. Other embodiments are described and claimed.

    摘要翻译: 使用四个G4-FET的差分输出模拟乘法器电路,每个源极连接到电流源。 四个G4-FET可以分成两对,每对两个G4-FET,其中一对具有连接到负载的漏极,另一对的漏极连接到另一个负载。 差分输出电压在两个负载下进行。 在一个实施例中,对于每个G4-FET,第一和第二结门各自连接在一起,其中第一输入电压施加到每对的前门,并且第二输入电压施加到每个的第一结门 对。 描述和要求保护其他实施例。