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    Steering and braking system for a motor vehicle
    2.
    发明授权
    Steering and braking system for a motor vehicle 有权
    机动车转向制动系统

    公开(公告)号：US06684146B1

    公开(公告)日：2004-01-27

    申请号：US09959542

    申请日：2002-02-06

    申请人： Bernd Hedenetz

    发明人： Bernd Hedenetz

    IPC分类号： B60T700

    CPC分类号： B60T8/1755 ,  B60T17/18 ,  B60T2270/413 ,  B60T2270/82

    摘要： A vehicle steering and braking system includes a distributed control loop in which a state-determining device for generating signals that describe current vehicle operation, an arithmetic unit for generating set point signals and a regulator unit for generating actuator signals are connected to one another by a data bus. The signals of the devices and units, which are transmitted via the data bus, are combined in cycles, one complete set of information being capable of being transmitted via the data bus in each cycle. Within a single cycle the signals of the respective units and devices are generated and transmitted via the data bus in the sequence: arithmetic unit—state-determining device—regulator unit. Each of the components comprising the arithmetic unit—state-determining device and regulator unit, however, can form the starting point of the sequence without changing the sequence itself.

    摘要翻译： 车辆转向和制动系统包括分布式控制回路，其中用于产生描述当前车辆操作的信号的状态确定装置，用于产生设定点信号的运算单元和用于产生致动器信号的调节器单元彼此连接 数据总线。 通过数据总线发送的设备和单元的信号以周期组合，一组完整的信息能够在每个周期中经由数据总线传输。 在单个周期内，通过数据总线产生和发送各个单元和设备的信号，顺序为：运算单元状态确定装置调节器单元。 然而，包括算术单元状态确定装置和调节器单元的每个组件可以在不改变序列本身的情况下形成序列的起始点。

    Bus monitor unit
    4.
    发明授权
    Bus monitor unit 有权
    总线监控单元

    公开(公告)号：US07103805B2

    公开(公告)日：2006-09-05

    申请号：US10255087

    申请日：2002-09-26

    申请人： Ralf Belschner ,  Bernd Hedenetz

    发明人： Ralf Belschner ,  Bernd Hedenetz

    IPC分类号： G06F11/00

    CPC分类号： H04L12/40026 ,  H04L12/40013 ,  H04L12/43 ,  H04L12/44 ,  H04L41/0677 ,  H04L43/00 ,  H04L2012/40241 ,  H04L2012/40267

    摘要： A central node for a data bus system includes a bus monitor unit with receiver means for registering signals on the data bus, and evaluation means which detect incorrect communication on the data bus and at least temporarily block communication by the user that causes the incorrect communication or compensate the incorrect communication of a user which is triggered by the interference influences. The bus monitor unit includes timing means which are triggered according to time patterns for the transmission of each user of the data bus, in order to detect an incorrect communication of a user if the latter transmits outside the time provided for it. The bus monitor unit is integrated into the central bus node and a plurality of bus branches of different users are combined at the central node so that the bus monitor unit can check a plurality of users for incorrect communication. In order to increase reliability, in addition to the bus monitor unit, a diagnostic unit is integrated into the central node. The latter monitors the bus monitor unit in terms of regular retriggering in response to the time patterns, so that the bus monitor unit can be deactivated in the absence of retriggering.

    摘要翻译： 用于数据总线系统的中央节点包括具有用于在数据总线上登记信号的接收机装置的总线监视单元，以及检测数据总线上的不正确通信并且至少临时阻止用户进行不正确通信的通信的评估装置， 补偿由干扰影响触发的用户的不正确通信。 总线监视器单元包括根据用于数据总线的每个用户的传输的时间模式触发的定时装置，以便如果用户在提供给它的时间之外发送时检测用户的不正确通信。 总线监视器单元集成到中央总线节点中，并且在中央节点处组合不同用户的多个总线分支，使得总线监视器单元可以检查多个用户以进行不正确的通信。 为了提高可靠性，除了总线监视器单元之外，还将诊断单元集成到中央节点中。 后者根据时间模式对总线监视器单元进行常规重新触发，从而在没有重新触发的情况下可以停用总线监视器单元。

    Bus monitor unit
    8.
    再颁专利
    Bus monitor unit 有权
    总线监控单元

    公开(公告)号：USRE42080E1

    公开(公告)日：2011-01-25

    申请号：US12231866

    申请日：2008-09-05

    申请人： Ralf Beischner ,  Bernd Hedenetz

    发明人： Ralf Beischner ,  Bernd Hedenetz

    IPC分类号： G06F11/00

    CPC分类号： H04L12/40026 ,  H04L12/40013 ,  H04L12/43 ,  H04L12/44 ,  H04L41/0677 ,  H04L43/00 ,  H04L2012/40241 ,  H04L2012/40267

    摘要： A central node for a data bus system includes a bus monitor unit with receiver means for registering signals on the data bus, and evaluation means which detect incorrect communication on the data bus and at least temporarily block communication by the user that causes the incorrect communication or compensate the incorrect communication of a user which is triggered by the interference influences. The bus monitor unit includes timing means which are triggered according to time patterns for the transmission of each user of the data bus, in order to detect an incorrect communication of a user if the latter transmits outside the time provided for it. The bus monitor unit is integrated into the central bus node and a plurality of bus branches of different users are combined at the central node so that the bus monitor unit can check a plurality of users for incorrect communication. In order to increase reliability, in addition to the bus monitor unit, a diagnostic unit is integrated into the central node. The latter monitors the bus monitor unit in terms of regular retriggering in response to the time patterns, so that the bus monitor unit can be deactivated in the absence of retriggering.

    摘要翻译： 用于数据总线系统的中央节点包括具有用于在数据总线上登记信号的接收机装置的总线监视单元，以及检测数据总线上的不正确通信并且至少临时阻止用户进行不正确通信的通信的评估装置， 补偿由干扰影响触发的用户的不正确通信。 总线监视器单元包括根据用于数据总线的每个用户的传输的时间模式触发的定时装置，以便如果用户在提供给它的时间之外发送时检测用户的不正确通信。 总线监视器单元集成到中央总线节点中，并且在中央节点处组合不同用户的多个总线分支，使得总线监视器单元可以检查多个用户以进行不正确的通信。 为了提高可靠性，除了总线监视器单元之外，还将诊断单元集成到中央节点中。 后者根据时间模式对总线监视器单元进行常规重新触发，从而在没有重新触发的情况下可以停用总线监视器单元。

    Clock synchronization in a distributed system
    9.
    发明授权
    Clock synchronization in a distributed system 有权
    分布式系统中的时钟同步

    公开(公告)号：US07349512B2

    公开(公告)日：2008-03-25

    申请号：US10484683

    申请日：2002-07-24

    申请人： Mathias Rausch ,  Bernd Müller ,  Bernd Hedenetz ,  Anton Schedl

    发明人： Mathias Rausch ,  Bernd Müller ,  Bernd Hedenetz ,  Anton Schedl

    IPC分类号： H04L7/00

    CPC分类号： G06F1/14 ,  G04G7/00 ,  H04J3/0652 ,  H04J3/0676

    摘要： The present invention provides an improved clock synchronization algorithm for a distributed system intended for real time applications by performing at the same time an off-set correction and a clock read correction at each node of the distributed system. Expensive oscillators can be avoided and synchronization can be established faster and with higher precision.

    摘要翻译： 本发明通过同时执行在分布式系统的每个节点处的偏移校正和时钟读取校正来提供用于实时应用的分布式系统的改进的时钟同步算法。 可以避免昂贵的振荡器，同时可以更快，更精确地建立同步。