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公开(公告)号：US20240258337A1
公开(公告)日：2024-08-01
申请号：US18016471
申请日：2022-03-31
Inventor： Jinchao BAI , Bo LIU , Xiangqian DING , Hui GUO , Yihe JIA , Yanxin JI , Yue LIU
IPC: H01L27/12 , G02F1/1362
CPC classification number: H01L27/1244 , G02F1/136295 , H01L27/1259
Abstract: An array substrate includes a base substrate, a driving circuit layer with a first pillow body on a peripheral region of the array substrate, an organic thin film layer and a conductive layer sequentially stacked; the first pillow body includes a first pillow metal block located on at least one of a source drain metal layer and a gate layer and a first pillow insulating layer covering the first pillow metal block; the organic thin film layer is defined with a barrier groove on the peripheral region, the first pillow body is provided with a part covered by the organic thin film layer and the other part exposed by the barrier groove; the conductive layer is provided with a signal wire passing across an edge of the barrier groove, and an edge of the signal wire at least partially overlaps with the first pillow body.
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2.发明申请公开(公告)号：US20200035317A1
公开(公告)日：2020-01-30
申请号：US16398706
申请日：2019-04-30
Inventor： Xuehuan Feng , Yongqian Li , Meng Li
Abstract: A gate drive circuit, a method of driving a gate drive circuit, a display device, and a method of manufacturing an array substrate are provided. The gate drive circuit includes a repair signal line, a plurality of output signal lines, and a plurality of shift register units that are cascaded. The repair signal line is configured to transmit the repair signal to the first output signal line. The plurality of shift register units include a first shift register unit and a plurality of second shift register units, and the plurality of second shift register units are correspondingly connected to the second output signal lines. The first output signal line corresponds to but is in a state of being disconnected to the first shift register unit, and the first output signal line and the plurality of second output signal lines are configured to output a set of shift pulse signals.
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3.发明申请ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE PIXEL UNIT CIRCUIT, DISPLAY PANEL AND ELECTRONIC PRODUCT 有权有源矩阵有机发光二极管像素单元电路，显示面板和电子产品公开(公告)号：US20150002414A1
公开(公告)日：2015-01-01
申请号：US14234773
申请日：2013-09-24
Inventor： Wen Tan , Xiaojing Qi , Bo Wu
IPC: G06F3/041
CPC classification number: G06F3/0412 , G06F3/044
Abstract: Disclosed are an AMOLED pixel unit circuit, a display panel and an electronic product, to integrate a TSP in Cell circuit into the AMOLED pixel unit circuit, and to manufacture the AMOLED display panel having a touch screen function and the electronic product having the display panel. The AMOLED pixel unit circuit comprises a driving module configured to amplify an induction signal generated by the touch sensing module, output the induction signal through an induction signal outputting module, and drive a light emitting module; a light emission controlling module configured to control the light emitting module to emit light; a threshold compensating module configured to compensate a threshold voltage for the driving module; a touch sensing module configured to generate the induction signal and output the induction signal to the driving module; and the induction signal outputting module configured to output the induction signal amplified by the driving module.
Abstract translation: 公开了一种AMOLED像素单元电路，显示面板和电子产品，用于将单元电路中的TSP集成到AMOLED像素单元电路中，并制造具有触摸屏功能的AMOLED显示面板，并且具有显示面板的电子产品 。 AMOLED像素单元电路包括：驱动模块，被配置为放大由触摸感测模块产生的感应信号，通过感应信号输出模块输出感应信号，并驱动发光模块; 配置为控制所述发光模块发光的发光控制模块; 阈值补偿模块，被配置为补偿所述驱动模块的阈值电压; 触摸感测模块，被配置为产生所述感应信号并将所述感应信号输出到所述驱动模块; 所述感应信号输出模块被配置为输出由所述驱动模块放大的感应信号。
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公开(公告)号：US20160032155A1
公开(公告)日：2016-02-04
申请号：US14429186
申请日：2014-06-12
Inventor： Ang XIAO
IPC: C09J133/14 , C08K5/544 , C08K3/36
CPC classification number: C09J133/14 , C08G59/34 , C08G59/4085 , C08K3/36 , C08K5/544 , C09J4/00 , C08F222/1006
Abstract: Disclosed are a sealant composition and a method of preparing the same wherein the sealant composition comprises: 70-80 wt % of a low-viscosity epoxy acrylate conforming to the structure of Formula I, 0.5-1 wt % of a photoinitiator, 5-15 wt % of silica microspheres, 5-15 wt % of resinous elastic microspheres, and 1-2 wt % of silane coupling agent, based on the total weight of the sealant composition wherein R1 and R2 are as defined herein. The sealant has improved coating linearity.
Abstract translation: 公开了一种密封剂组合物及其制备方法，其中密封剂组合物包含：70-80重量％的符合式I结构的低粘度环氧丙烯酸酯，0.5-1重量％的光引发剂，5-15重量％ 基于密封剂组合物的总重量，其中R 1和R 2如本文所定义，二氧化硅微球的重量％，5-15重量％的树脂弹性微球和1-2重量％的硅烷偶联剂。 密封剂具有改善的涂层线性度。
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公开(公告)号：US20250169311A1
公开(公告)日：2025-05-22
申请号：US19029316
申请日：2025-01-17
Inventor： Tinghua SHANG , Yi ZHANG , Haigang QING , Pengfei YU , Yang ZHOU
IPC: H10K59/131 , H10K59/126 , H10K59/35 , H10K59/80
Abstract: Embodiments of this disclosure provide a display substrate and a display device. The display substrate includes: sub-pixels located on a base substrate; a first conductive layer located on one side of the base substrate, and including signal lines sequentially disposed in a first direction and extending towards a second direction, and signal line bulges and anode adaptor parts located on the same side of the signal line and disposed alternately; and anodes located between the first conductive layer and a pixel defining layer. Each anode includes an effective part exposed by a corresponding sub-pixel opening, the effective parts of at least part of the sub-pixels have overlapping regions with the signal line bulges and the anode adaptor parts in the second direction, and the second direction is perpendicular to the first direction.
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Patent Agency Ranking
公开(公告)号：US20250169185A1
公开(公告)日：2025-05-22
申请号：US19029419
申请日：2025-01-17
Inventor： Wei XUE , Fengjing TANG , Hongmin LI
Abstract: A display panel includes a driving circuit and a signal line. The signal line includes at least two main signal sub-lines each including a first end and a second end, the first ends of the at least two main signal sub-lines are electrically coupled to each other, and the second ends thereof are electrically coupled to each other. N main signal sub-lines in the at least two main signal sub-lines are directly electrically coupled to the driving circuit. Each of the N main signal sub-lines is a direct-coupled main signal sub-line, and a main signal sub-line in the at least two main signal sub-lines other than the direct-coupled main signal sub-lines is an indirect-coupled main signal sub-line, where N is a positive integer.
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公开(公告)号：US20250169183A1
公开(公告)日：2025-05-22
申请号：US19028449
申请日：2025-01-17
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Wei YANG , Xinhong LU
Abstract: An OLED display device including a display area is provided. A first and second thin film transistors (TFTs) are arranged in the display area, the first TFT includes a first active layer, the second TFT includes a second active layer, a material of the first active layer is different from that of the second active layer. The OLED display device includes a substrate, the second active layer, a second gate of the second TFT, the first active layer, a first gate of the first TFT, a first source and drain of the first TFT, a second source and drain of the second TFT, a first data line in a same layer as the second source and drain, a first planarization layer on the first data line, and a second data line on the first planarization layer and electrically insulated from the first data line.
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公开(公告)号：US20250166583A1
公开(公告)日：2025-05-22
申请号：US19028485
申请日：2025-01-17
IPC: G09G3/36 , G02F1/1333 , G02F1/1343 , G02F1/1362 , H02M7/537 , H03F3/45
Abstract: An array substrate has a display area and a bonding region. The display area includes a distal region, a proximal region, and a middle region therebetween. The array substrate includes a base, a common electrode located in the display area, a connecting lead disposed outside the distal region, a conductive frame at least partially surrounding the display area, and at least one first common signal line, at least one second common signal line and at least one third common signal line. The first common signal line, the second common signal line and the third common signal line are respectively coupled to portions of the common electrode located in the distal region, the proximal region and the middle region. The first common signal line is coupled to the connecting lead. The connecting lead and the portion of the common electrode located in the distal region are coupled to the conductive frame.
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公开(公告)号：US20250166573A1
公开(公告)日：2025-05-22
申请号：US18290493
申请日：2023-02-28
Applicant: BOE Technology Group Co., Ltd.
Inventor： Chengyuan LUO , Pan XU , Ying HAN , Donghui ZHAO , Xing ZHANG , Guangshuang LV , Cheng XU , Xing YAO , Dandan ZHOU , Miao LIU
IPC: G09G3/3266 , G09G3/3233 , G11C19/28
Abstract: A shift register is provided to include: a voltage regulating circuit to adjust voltages at first and second nodes; a light-emitting cascade output circuit to write a second operating voltage from a second power terminal to a light-emitting cascade signal output terminal in response to control of the voltage at the first node, and write a first operating voltage from a first power terminal to the light-emitting cascade signal output terminal in response to control of the voltage at the second node; a light-emitting driving output circuit to write a third operating voltage from a third power terminal to a light-emitting control driving signal output terminal in response to control of the voltage at the first node, and write a fifth operating voltage from a fifth power terminal to the light-emitting control driving signal output terminal in response to control of the voltage at the second node; and a first anti-leakage circuit to write a fourth operating voltage from a fourth power terminal to a first anti-leakage node in response to control of the voltage at the second node.
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公开(公告)号：US20250166572A1
公开(公告)日：2025-05-22
申请号：US19030782
申请日：2025-01-17
Inventor： Xuehuan FENG , Dacheng ZHANG , Yongqian LI , Mingming XIE
IPC: G09G3/3258 , G09G3/3291 , G11C19/28 , H10D86/40 , H10D86/60
Abstract: A shift register is provided to include a voltage control circuit coupled to an output control node; at least one driving output circuit, each including an output transistor and a capacitor structure sequentially arranged along a first direction; a first conductive line therebetween and extending along a second direction and coupled to a signal output line configured for the driving output circuit; the output transistor includes a gate electrode coupled to the output control node and a first voltage writing electrode of the capacitor structure, a first electrode coupled to a clock signal line configured for the driving output circuit and a second electrode coupled to the first conductive line; a second conductive line is disposed between the first conductive line and the capacitor structure, and the first conductive line is coupled to a second voltage writing electrode of the capacitor structure through the second conductive line.
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