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    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20170025545A1

    公开(公告)日：2017-01-26

    申请号：US15176611

    申请日：2016-06-08

    申请人： Phil Ouk NAM ,  Yong-Hoon SON ,  Kyunghyun KIM ,  Byeongju KIM ,  Kwangchul PARK ,  Yeon-Sil SOHN ,  Jin-I LEE ,  JongHeun LIM ,  Wonbong JUNG

    发明人： Phil Ouk NAM ,  Yong-Hoon SON ,  Kyunghyun KIM ,  Byeongju KIM ,  Kwangchul PARK ,  Yeon-Sil SOHN ,  Jin-I LEE ,  JongHeun LIM ,  Wonbong JUNG

    IPC分类号： H01L29/786 ,  H01L27/12

    CPC分类号： H01L29/78672 ,  H01L27/0688 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11582 ,  H01L27/1207 ,  H01L29/78642

    摘要： A semiconductor device includes a polycrystalline semiconductor layer on a substrate, first and second stacks on the polycrystalline semiconductor layer, the first and second stacks extending in a first direction, a separation trench between the first and second stacks and extending in the first direction, the separation trench separating the first and second stacks in a second direction crossing the first direction, and vertical channel structures vertically passing through each of the first and second stacks, wherein the polycrystalline semiconductor layer includes a first grain region and a second grain region in contact with each other, the first and second grain region being adjacent to each other along the second direction, and wherein each of the first and second grain regions includes a plurality of crystal grains, each crystal grain having a longitudinal axis parallel to the second direction.

    摘要翻译： 半导体器件包括在衬底上的多晶半导体层，多晶半导体层上的第一和第二堆叠，第一和第二堆叠沿第一方向延伸，第一和第二堆叠之间的分离沟槽，并沿第一方向延伸， 分离沟槽，在与第一方向交叉的第二方向上分离第一和第二堆叠，以及垂直通过第一和第二堆叠中的每一个的垂直沟道结构，其中多晶半导体层包括第一晶粒区域和与第 第一和第二晶粒区域沿着第二方向彼此相邻，并且其中第一和第二晶粒区域中的每一个包括多个晶粒，每个晶粒具有平行于第二方向的纵向轴线。

    ASSEMBLING NANOSTRUCTURES ON A SUBSTRATE
    2.
    发明申请
    ASSEMBLING NANOSTRUCTURES ON A SUBSTRATE 审中-公开
    在基板上组装纳米结构

    公开(公告)号：US20100047444A1

    公开(公告)日：2010-02-25

    申请号：US12197724

    申请日：2008-08-25

    申请人： Seunghun Hong ,  Byeongju Kim

    发明人： Seunghun Hong ,  Byeongju Kim

    IPC分类号： B05D1/12 ,  B01J19/08

    CPC分类号： B82B3/00 ,  B82Y30/00 ,  B82Y40/00

    摘要： Techniques for assembling nanostructures on a substrate are provided. Methods for assembling nanostructures on a substrate may involve, but are not limited to, detaching nanostructures from a wafer, passing the nanostructures through a filter, and assembling the nanostructures onto a patterned substrate.

    摘要翻译： 提供了在衬底上组装纳米结构的技术。 在衬底上组装纳米结构的方法可以包括但不限于从晶片分离纳米结构，使纳米结构通过过滤器，并将纳米结构组装到图案化衬底上。

    SEMICONDUCTOR MEMORY DEVICE
    3.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 审中-公开
    半导体存储器件

    公开(公告)号：US20170062471A1

    公开(公告)日：2017-03-02

    申请号：US15249389

    申请日：2016-08-27

    申请人： Yong-Hoon SON ,  JIN-I LEE ,  Kyunghyun KIM ,  Byeongju KIM ,  Phil Ouk NAM ,  Kwangchul PARK ,  Yeon-Sil SOHN ,  JongHeun LIM ,  Wonbong Jung

    发明人： Yong-Hoon SON ,  JIN-I LEE ,  Kyunghyun KIM ,  Byeongju KIM ,  Phil Ouk NAM ,  Kwangchul PARK ,  Yeon-Sil SOHN ,  JongHeun LIM ,  Wonbong Jung

    IPC分类号： H01L27/115 ,  H01L29/423 ,  H01L29/40 ,  H01L29/792 ,  H01L29/66

    CPC分类号： H01L27/11582 ,  H01L27/1157 ,  H01L29/408 ,  H01L29/4234 ,  H01L29/66833 ,  H01L29/7926

    摘要： A semiconductor memory device is disclosed. The device may include a stack including gate electrodes stacked on a substrate in a vertical direction and insulating patterns interposed between the gate electrodes, vertical channels passing through the stack and connected to the substrate, a tunnel insulating layer enclosing each of the vertical channels, charge storing patterns provided between the tunnel insulating layer and the gate electrodes and spaced apart from each other in the vertical direction, blocking insulating patterns provided between the charge storing patterns and the gate electrodes and spaced apart from each other in the vertical direction, and a bit line crossing the stack and connected to the vertical channels. The blocking insulating patterns may have a vertical thickness that is greater than that of the gate electrodes.

    摘要翻译： 公开了一种半导体存储器件。 该装置可以包括堆叠，其包括沿垂直方向堆叠在基板上的栅电极和插入在栅电极之间的绝缘图案，穿过堆叠并连接到基板的垂直沟道，围绕每个垂直沟道的隧道绝缘层，电荷 存储设置在隧道绝缘层和栅电极之间并在垂直方向上彼此间隔开的图案，阻止在电荷存储图案和栅电极之间设置并且在垂直方向上彼此间隔开的绝缘图案，以及位 线穿过堆叠并连接到垂直通道。 阻挡绝缘图案可以具有大于栅极电极的垂直厚度。

    Semiconductor Memory Devices
    5.
    发明申请
    Semiconductor Memory Devices 审中-公开

    公开(公告)号：US20170098656A1

    公开(公告)日：2017-04-06

    申请号：US15247602

    申请日：2016-08-25

    申请人： Yong-Hoon Son ,  Kyunghyun KIM ,  Byeongju KIM ,  Phil Ouk NAM ,  Kwangchul PARK ,  Yeon-Sil SOHN ,  Jin-I LEE ,  Wonbong Jung

    发明人： Yong-Hoon Son ,  Kyunghyun KIM ,  Byeongju KIM ,  Phil Ouk NAM ,  Kwangchul PARK ,  Yeon-Sil SOHN ,  Jin-I LEE ,  Wonbong Jung

    IPC分类号： H01L27/115 ,  G11C16/04

    摘要： A semiconductor memory device includes insulating patterns and gate patterns alternately stacked on a substrate, a channel structure that intersects the insulating patterns and the gate patterns and connected to the substrate, a charge storage structure between the channel structure and the gate patterns, and a contact structure on the substrate at a side of the insulating patterns and the gate patterns. One of the gate patterns includes a first barrier pattern between a first insulating pattern of the insulating patterns and a second insulating pattern of the insulating patterns adjacent the first insulating pattern in a first direction perpendicular to a main surface of the substrate, the first barrier pattern defining a concave region between a first portion of the first barrier pattern extending along the first insulating pattern and a second portion extending along the second insulating pattern, and a metal pattern in the concave region.