Method of manufacturing semiconductor device
    1.
    发明授权
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US08748254B2

    公开(公告)日:2014-06-10

    申请号:US13494328

    申请日:2012-06-12

    IPC分类号: H01L21/00

    摘要: A method of manufacturing a semiconductor device includes forming a bit line on a substrate comprising an active region; forming an interlayer insulating layer covering the bit line on the substrate; forming a first hole at a location of the active region through the interlayer insulating layer; forming a dummy contact layer by filling the first hole; forming a mold layer on the interlayer insulating layer and the dummy contact layer; forming a second hole at a location of the dummy contact layer through the mold layer; removing the dummy contact layer in the first hole through the second hole; forming an epitaxial layer on a portion of the active region, which is exposed at a lower surface of the first hole; and forming a lower electrode on internal surfaces of the first hole and the second hole.

    摘要翻译: 制造半导体器件的方法包括在包括有源区的衬底上形成位线; 形成覆盖所述基板上的所述位线的层间绝缘层; 在有源区的位置通过层间绝缘层形成第一孔; 通过填充第一孔形成虚拟接触层; 在层间绝缘层和虚拟接触层上形成模层; 在所述模拟接触层的位置处通过所述模制层形成第二孔; 通过第二孔去除第一孔中的虚拟接触层; 在所述有源区的在所述第一孔的下表面处露出的部分上形成外延层; 以及在所述第一孔和所述第二孔的内表面上形成下电极。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    3.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号:US20130052787A1

    公开(公告)日:2013-02-28

    申请号:US13494328

    申请日:2012-06-12

    IPC分类号: H01L21/02 H01L21/20

    摘要: A method of manufacturing a semiconductor device includes forming a bit line on a substrate comprising an active region; forming an interlayer insulating layer covering the bit line on the substrate; forming a first hole at a location of the active region through the interlayer insulating layer; forming a dummy contact layer by filling the first hole; forming a mold layer on the interlayer insulating layer and the dummy contact layer; forming a second hole at a location of the dummy contact layer through the mold layer; removing the dummy contact layer in the first hole through the second hole; forming an epitaxial layer on a portion of the active region, which is exposed at a lower surface of the first hole; and forming a lower electrode on internal surfaces of the first hole and the second hole.

    摘要翻译: 制造半导体器件的方法包括在包括有源区的衬底上形成位线; 形成覆盖所述基板上的所述位线的层间绝缘层; 在有源区的位置通过层间绝缘层形成第一孔; 通过填充第一孔形成虚拟接触层; 在层间绝缘层和虚拟接触层上形成模层; 在所述模拟接触层的位置处通过所述模制层形成第二孔; 通过第二孔去除第一孔中的虚拟接触层; 在所述有源区的在所述第一孔的下表面处露出的部分上形成外延层; 以及在所述第一孔和所述第二孔的内表面上形成下电极。