Abstract:
A thin keymat module with a reflection structure includes a circuit board with a plurality of elastic conductive elements, a mirror reflection sheet, a transparent elastic layer, a keymat layer and a light-emitting unit. The mirror reflection sheet is disposed on the circuit board, evenly corresponding to the elastic conductive elements. The mirror reflection sheet has a reflection microstructure corresponding to the elastic conductive elements. The transparent elastic layer is disposed on the mirror reflection sheet and has elastic portions corresponding to the elastic conductive elements. The keymat layer is disposed on the transparent elastic layer and has transparent portions corresponding to the elastic portions. The light-emitting unit is located on one side of the transparent elastic layer. When the light-emitting unit projects light onto the mirror reflection sheet and the reflection microstructure, each elastic portion and each transparent portion have a light displaying effect.
Abstract:
A static content addressable memory (CAM) cell. The CAM cell includes a latch having complementary data nodes capacitively coupled to ground, first and second access transistors, each coupled between a data node of the latch and a respective data line. The gates of each access transistor is coupled to a word line such that when activated, the respective data node and data line are coupled. The CAM cell further includes a match circuit coupled to one of the complementary data nodes of the latch. The match circuit discharges a match line in response to a data value stored at the data node to which the match circuit is coupled and compare data present on the respective data line mismatching. Two of the CAM cells can be used to implement a full ternary CAM cell.
Abstract:
A static content addressable memory (CAM) cell. The CAM cell includes a latch having complementary data nodes capacitively coupled to ground, first and second access transistors, each coupled between a data node of the latch and a respective data line. The gates of each access transistor is coupled to a word line such that when activated, the respective data node and data line are coupled. The CAM cell further includes a match circuit coupled to one of the complementary data nodes of the latch. The match circuit discharges a match line in response to a data value stored at the data node to which the match circuit is coupled and compare data present on the respective data line mismatching. Two of the CAM cells can be used to implement a full ternary CAM cell.
Abstract:
A static content addressable memory (CAM) cell. The CAM cell includes a latch having complementary data nodes capacitively coupled to ground, first and second access transistors, each coupled between a data node of the latch and a respective data line. The gates of each access transistor is coupled to a word line such that when activated, the respective data node and data line are coupled. The CAM cell further includes a match circuit coupled to one of the complementary data nodes of the latch. The match circuit discharges a match line in response to a data value stored at the data node to which the match circuit is coupled and compare data present on the respective data line mismatching. Two of the CAM cells can be used to implement a full ternary CAM cell.
Abstract:
A motion compensation improvement for a compression encoder minimizes redundant edge information in a current image from a video input signal being input to the compression encoder. The current image is compared with a reference image from the video signal, which images may be the entire picture or a sub-region of the picture, to provide a spatial shift difference between the images, the spatial shift difference having an integer part and a high precision fractional part. From the high precision fractional part and specified constants for the compression encoder a shift value is calculated such that, when shifted, the current image is aligned with a quantizer motion vector grid in the compression encoder. The shift value is then used to resample the current image to make the desired shift prior to input to the compression encoder, thereby minimizing redundant edge information.
Abstract:
An adaptive multi-modal motion estimation algorithm for video compression builds a luminance pyramid for each image of a moving image sequence. From the top level image of the luminance pyramid a global motion vector is determined between images at times t and t+n. The global motion vector is used as a pivot point and to define a search area. For each block of a current top level image a search for a match is carried out around the pivot point within the search area. The resulting block motion vectors serve as initial conditions for the next higher resolution level. A refinement process results in a displaced frame difference value (DFD) for each block as an error measure. If the error measure is small, the motion vector is chosen as the motion vector for the current block. If the error measure is large, then a search within the search area around a zero motion pivot point is conducted. The motion vector that results in the smallest error measure is chosen as the motion vector for the current block. The refinement and zero pivot searches are repeated for each level down to the full resolution base of the pyramid, resulting in the desired estimated motion vectors for the image.
Abstract:
Systems and methods for implementing array cameras configured to perform super-resolution processing to generate higher resolution super-resolved images using a plurality of captured images and lens stack arrays that can be utilized in array cameras are disclosed. An imaging device in accordance with one embodiment of the invention includes at least one imager array, and each imager in the array comprises a plurality of light sensing elements and a lens stack including at least one lens surface, where the lens stack is configured to form an image on the light sensing elements, control circuitry configured to capture images formed on the light sensing elements of each of the imagers, and a super-resolution processing module configured to generate at least one higher resolution super-resolved image using a plurality of the captured images.
Abstract:
A color filter to increase the low light sensitivity of an image sensor. The color filter has two narrow band color filters and one wide band filter. Also disclosed is a unique way of processing a tri-stimulus signal to dynamically adjust color contrast depending on the illumination conditions.
Abstract:
A method and apparatus of identifying the source of materials in a video sequence is disclosed. A series of pseudo frames is formed, for example by interleaving, from fields in adjacent frames. A correlation value is calculated for each of the pseudo frames. The correlation value may be a sum of absolute difference (SAD) of luminance values of every neighboring scan line accumulated over the entire pseudo frame. Scene changes may be determined, for example, based on the correlation values. Frames and repeated fields are identified based on the correlation values and the scene changes. Finally, the source of each frame in the series is identified based on the identification of frames and repeated fields.
Abstract:
A static content addressable memory (CAM) cell. The CAM cell includes a latch having complementary data nodes capacitively coupled to ground, first and second access transistors, each coupled between a data node of the latch and a respective data line. The gates of each access transistor is coupled to a word line such that when activated, the respective data node and data line are coupled. The CAM cell further includes a match circuit coupled to one of the complementary data nodes of the latch. The match circuit discharges a match line in response to a data value stored at the data node to which the match circuit is coupled and compare data present on the respective data line mismatching. Two of the CAM cells can be used to implement a full ternary CAM cell.