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92 条记录 (耗时 0.035 秒)

    Melting curve analysis with exponential background subtraction
    2.
    发明授权
    Melting curve analysis with exponential background subtraction 有权
    指数背景减法的熔解曲线分析

    公开(公告)号：US08296074B2

    公开(公告)日：2012-10-23

    申请号：US13271764

    申请日：2011-10-12

    申请人： Robert Andrew Palais ,  Carl Thomas Witter

    发明人： Robert Andrew Palais ,  Carl Thomas Witter

    IPC分类号： G06F19/00 ,  G06F15/00 ,  C12Q1/68

    CPC分类号： G06F19/20 ,  C12Q1/6816 ,  G06F19/24 ,  C12Q2527/107 ,  C12Q2537/113 ,  C12Q2537/165

    摘要： A method for clustering melting profiles of a plurality of nucleic acid samples, comprising measuring the fluorescence of each nucleic acid sample as a function of temperature to produce a respective raw melting curve for each respective nucleic acid sample, and clustering genotypes of the plurality of nucleic acid samples to form a plurality of clusters of melting curves. A system for analyzing a plurality of nucleic acid samples comprising an instrument for sequentially heating fluorescently detectable complexes while monitoring their fluorescence, a central processing unit (CPU) for performing computer executable instructions, and a memory storage device for storing computer executable instructions that when executed by the CPU cause the CPU to cluster genotypes of a plurality of nucleic acid samples.

    摘要翻译： 用于聚集多个核酸样品的融合谱的方法，包括测量每个核酸样品的荧光作为温度的函数，以产生每个相应核酸样品的相应的原始解链曲线，以及聚集多个核酸的基因型 酸样品以形成多个熔解曲线簇。 一种用于分析多个核酸样品的系统，包括用于在监测其荧光的同时依次加热荧光检测复合物的仪器，用于执行计算机可执行指令的中央处理单元（CPU），以及用于存储执行时的计算机可执行指令的存储器存储装置 由CPU使CPU对多个核酸样品的基因型进行聚类。

    Signal amplitude distortion within an integrated circuit
    3.
    发明授权
    Signal amplitude distortion within an integrated circuit 有权
    集成电路内的信号幅度失真

    公开(公告)号：US08194721B2

    公开(公告)日：2012-06-05

    申请号：US12153793

    申请日：2008-05-23

    申请人： Carl Thomas Gray ,  Jason Thurston

    发明人： Carl Thomas Gray ,  Jason Thurston

    IPC分类号： H04B17/00

    CPC分类号： H04L1/243

    摘要： An integrated circuit 2 includes a serial data transmitter 12 and a serial data receiver 14. A signal amplitude distorting circuit 30 is provided to introduce distortion in the amplitude of a serial data signal generated by the serial data transmitter 12 and looped back to the serial data receiver 14 so as to stress test the serial data receiver 14.

    摘要翻译： 集成电路2包括串行数据发送器12和串行数据接收器14.提供信号幅度失真电路30以引入由串行数据发送器12产生的串行数据信号的幅度的失真并循环回到串行数据 接收器14，以便对串行数据接收器14进行压力测试。

    Programmable duty cycle distortion generation circuit
    4.
    发明授权
    Programmable duty cycle distortion generation circuit 有权
    可编程占空比失真发生电路

    公开(公告)号：US08179952B2

    公开(公告)日：2012-05-15

    申请号：US12153796

    申请日：2008-05-23

    申请人： Jason Thurston ,  Carl Thomas Gray

    发明人： Jason Thurston ,  Carl Thomas Gray

    IPC分类号： H04B3/46

    CPC分类号： H04B3/462 ,  G01R31/31708 ,  G01R31/31715

    摘要： An integrated circuit is provided comprising: a serial transmitter, a serial receiver and a serial connection providing communication between the serial transmitter and the serial receiver. The integrated circuit further comprises a duty cycle distortion circuit so that the integrated circuit can be stress tested by distorting the duty cycle of a signal within the integrated circuit.

    摘要翻译： 提供一种集成电路，包括：串行发送器，串行接收器和串行连接，提供串行发送器和串行接收器之间的通信。 集成电路还包括占空比失真电路，使得可以通过使集成电路内的信号的占空比失真来对集成电路进行压力测试。

    Integrated circuit communication self-testing
    5.
    发明申请
    Integrated circuit communication self-testing 有权
    集成电路通信自检

    公开(公告)号：US20090292961A1

    公开(公告)日：2009-11-26

    申请号：US12153795

    申请日：2008-05-23

    申请人： Jason Thurston ,  Carl Thomas Gray

    发明人： Jason Thurston ,  Carl Thomas Gray

    IPC分类号： G01R31/3183 ,  G06F11/263

    CPC分类号： G01R31/31715

    摘要： An integrated circuit 2 includes a plurality of serial data transmitters 18 and a plurality of serial data receivers 20. On-chip test signal paths 22 with associated on-chip test circuits 24, 26, 28 are provided so as to permit on-chip serial data communication to be performed with test characteristics imposed by the on-chip test circuits 24, 26, 28 thereby providing on-chip stress testing of the data transmitter 18 and the serial data receiver 20.

    摘要翻译： 集成电路2包括多个串行数据发送器18和多个串行数据接收器20.提供具有相关片上测试电路24,26,28的片上测试信号路径22，以便允许片上串行 数据通信将由片上测试电路24,26,28施加的测试特性进行，由此提供数据发射机18和串行数据接收机20的片上压力测试。

    Signal amplitude distortion within an integrated circuit
    6.
    发明申请
    Signal amplitude distortion within an integrated circuit 有权
    集成电路内的信号幅度失真

    公开(公告)号：US20090290623A1

    公开(公告)日：2009-11-26

    申请号：US12153793

    申请日：2008-05-23

    申请人： Carl Thomas Gray ,  Jason Thurston

    发明人： Carl Thomas Gray ,  Jason Thurston

    IPC分类号： H04B17/00

    CPC分类号： H04L1/243

    摘要： An integrated circuit 2 includes a serial data transmitter 12 and a serial data receiver 14. A signal amplitude distorting circuit 30 is provided to introduce distortion in the amplitude of a serial data signal generated by the serial data transmitter 12 and looped back to the serial data receiver 14 so as to stress test the serial data receiver 14.

    摘要翻译： 集成电路2包括串行数据发送器12和串行数据接收器14.提供信号幅度失真电路30以引入由串行数据发送器12产生的串行数据信号的幅度的失真并循环回到串行数据 接收器14，以便对串行数据接收器14进行压力测试。

    Melting Curve Analysis with Exponential Background Subtraction
    8.
    发明申请
    Melting Curve Analysis with Exponential Background Subtraction 失效
    指数背景减法的熔解曲线分析

    公开(公告)号：US20090222503A1

    公开(公告)日：2009-09-03

    申请号：US12067642

    申请日：2006-09-20

    申请人： Robert Andrew Palais ,  Carl Thomas Wittwer

    发明人： Robert Andrew Palais ,  Carl Thomas Wittwer

    IPC分类号： G06F1/02 ,  C12Q1/68

    CPC分类号： G06F19/20 ,  C12Q1/6816 ,  G06F19/24 ,  C12Q2527/107 ,  C12Q2537/113 ,  C12Q2537/165

    摘要： A system and methods are provided for melting curve genotyping analysis of nucleic acids. Melting curves are generated by plotting fluorescence of a sample as a function of temperature. In one illustrative example, an exponential algorithm is employed to remove the background from generated melting curves and thereby perform comparative analysis to other melting curves. Additional illustrative examples provide for measuring the differences between two or more melting curves and clustering the genotypes of the provided sample nucleic acids.

    摘要翻译： 提供了用于融合核酸曲线基因分型分析的系统和方法。 通过绘制样品的荧光作为温度的函数产生熔解曲线。 在一个说明性示例中，使用指数算法从生成的熔解曲线中除去背景，从而对其它熔解曲线进行比较分析。 另外的说明性实例提供了测量两个或多个熔解曲线之间的差异并聚集所提供的样品核酸的基因型。

    Human and rat PGC-3, PPAR-gamma coactivations and splice variants thereof
    9.
    发明申请
    Human and rat PGC-3, PPAR-gamma coactivations and splice variants thereof 审中-公开
    人和大鼠PGC-3，PPAR-γ共活化及其剪接变体

    公开(公告)号：US20090142351A1

    公开(公告)日：2009-06-04

    申请号：US11978832

    申请日：2007-10-29

    申请人： Kevin Anthony Hart ,  Carl Thomas Montague ,  Antonio Vidal-Puig

    发明人： Kevin Anthony Hart ,  Carl Thomas Montague ,  Antonio Vidal-Puig

    IPC分类号： A61K39/395 ,  C07K16/18 ,  A61P3/04

    CPC分类号： C07K14/5759 ,  A61K38/00

    摘要： A novel gene PGC-3, and its role in regulating the transcriptional activity of PPARγ in adipose tissue. PGC-3 is highly expressed in human white adipose tissue and has utility in the development of new therapeutic agents for use in the treatment of obesity and other related disorders such as non-insulin dependent diabetes mellitus, insulin resistance syndrome, dyslipidemia, and atherosclerosis.

    摘要翻译： 一种新型基因PGC-3及其在调节脂肪组织中PPARγ的转录活性中的作用。 PGC-3在人类白色脂肪组织中高度表达，并且可用于开发用于治疗肥胖症和其它相关疾病如非胰岛素依赖性糖尿病，胰岛素抵抗综合征，血脂异常和动脉粥样硬化的新治疗剂。

    Low power method of monitoring and of responsively initiating higher powered intelligent response to detected change of condition
    10.
    发明授权
    Low power method of monitoring and of responsively initiating higher powered intelligent response to detected change of condition 失效
    低功率监控方法和响应性地启动更高功率的智能响应以检测到状况变化

    公开(公告)号：US07543163B2

    公开(公告)日：2009-06-02

    申请号：US11326104

    申请日：2006-01-04

    申请人： Kent Kernahan ,  John Carl Thomas ,  Craig Norman Lambert

    发明人： Kent Kernahan ,  John Carl Thomas ,  Craig Norman Lambert

    IPC分类号： G06F1/00 ,  G06F1/26 ,  G06F1/32

    CPC分类号： G06F1/3203 ,  G06F1/3237 ,  G06F1/3287 ,  Y02D10/126 ,  Y02D10/128 ,  Y02D10/171

    摘要： A synchronous control system includes a logic controller (e.g., microprocessor) which can be put into low power standby or sleep mode by shutting off its clock. A quick-start oscillator (QSO) remains shut off to conserve power when not needed, but awakens rapidly and supplies clock signals to the logic controller for quickly awakening the controller so the latter can to respond to exigent circumstances. One such circumstance can be the drop of a vital supply voltage below a predefined threshold. A low power comparator (LPTC) detects the drop and starts up the QSO which in turn awakens the controller. The controller determines what the reason for the awakening is, quickly responds to the exigent circumstance and then turns the QSO off to thereby conserve power and put itself (QSO) back to sleep. Disclosures are provided for the QSO and a first calibration subsystem used to maintain QSO output frequency within a desired range. Disclosures are provided for the LPTC and a second calibration subsystem used to set its trigger threshold. Disclosure of a novel DAC within the LPTC is also provided.

    摘要翻译： 同步控制系统包括逻辑控制器（例如，微处理器），其可通过关闭其时钟而被置于低功率待机或休眠模式。 快速启动振荡器（QSO）保持关闭，以在不需要时节省功耗，但可以快速唤醒并将时钟信号提供给逻辑控制器，以便快速唤醒控制器，以便后者可以响应紧急情况。 一个这样的情况可能是重要的电源电压下降到低于预定阈值。 低功耗比较器（LPTC）检测掉，并启动QSO，这反过来唤醒了控制器。 控制器确定唤醒的原因是什么，快速响应紧急情况，然后关闭QSO，从而节省电力并使其自身（QSO）恢复睡眠。 提供了用于QSO和用于将QSO输出频率保持在期望范围内的第一校准子系统的公开。 为LPTC提供了披露，并且提供了用于设置其触发阈值的第二校准子系统。 还提供了LPTC内的新型DAC的公开。