摘要:
An inverse-modified discrete cosine transform and overlap-add method, and hardware structure for MPEG Layer3 audio signal decoding. In order to have the MPEG Layer3 audio signal decoder have more competitive power in the consumer market, the present invention provides a low cost fast algorithm of the inverse-modified discrete cosine transform and overlap-add, so that the quantity of the operation needed in the decoding process can be significantly reduced to enhance the system performance. Afterwards, according to the fast algorithm, the present invention provides a hardware structure that is suitable for the inverse-modified discrete cosine transform and overlap-add in the MPEG Layer3 decoder. Since the hardware structure of the present invention makes the MPEG Layer3 decoder able to be implemented by the application specific integrated circuit (ASIC), the entire system can fulfill the low cost and high performance requirements.
摘要:
An exercise bicycle is composed of a bicycle frame, a vibration device, a driving device, and a clutch device. The bicycle frame is provided with a pedal device. The vibration device and the pedal device are driven by the driving device such that the pedal device can be temporarily disabled by the clutch device. The vibration device is capable of actuating the bicycle frame to vibrate so as to massage the body of a user of the exercise bicycle while the user is engaged in the pedalling exercise. The exercise bicycle can be used as a body massaging machine by actuating the clutch device to disable the pedal device.
摘要:
The invention relates to methods and apparatus for offloading the workload from a computer system's CPU, memory and/or memory controller. Methods and apparatus for managing board memory on a FPGA board on behalf of applications executing in one or more FPGAs are disclosed.
摘要:
The present invention provides a method and system for operating a wireless communication system in which received signals from a plurality of antennas are weighted and combined with a beam forming operation to form an output signal. The beam forming operation determines weights adjusted to increase a desired signal power in the output signal while reducing the power in the output signal of out-of-band components. In an embodiment of the present invention, beam forming operations are performed with maximal ratio combining (MRC). Alternatively, a constant modulus algorithm (CMA) can be used for beam forming operations. In an alternate embodiment, improved interference suppression is performed with a novel algorithm referred to as an interference nulling algorithm (INA). The INA receives an error signal which is 180° out of phase with a combination of the channels for individual antennas, referred to as the SUM channel. The error signal is determined by complex conjugate multiplication of the individual signals and a reference complex signal. It is desirable to simultaneously achieve diversity and combining gain and suppress the adjacent channel by combining the weight generation for MRC and that for INA, as described above, to generate antenna weights similar to those of MMSE combining.
摘要:
The present invention relates to a vehicle mountable satellite antenna as defined in the claims which is operable while the vehicle is in motion. The satellite antenna of the present invention can be installed on top of (or embedded into) the roof of a vehicle. The antenna is capable of providing high gain and a narrow antenna beam for aiming at a satellite direction and enabling broadband communication to vehicle. The present invention provides a vehicle mounted satellite antenna which has low axial ratio, high efficiency and has low grating lobes gain. The vehicle mounted satellite antenna of the present invention provides two simultaneous polarization states. In one embodiment, a hybrid mechanic and electronic steering approach provides a more reasonable cost and performance trade-off. The antenna aiming in the elevation direction is achieved via control of an electronic beamforming network. The antenna is mounted on a rotatable platform under mechanical steering and motion control for aiming the antenna in the azimuth direction. Such approach significantly reduces the complexity and increases the reliability of the mechanical design. The antenna height is compatible to the two-dimensional electronic steering phased-array antenna. Additionally, the number of the electronic processing elements required is considerably reduced from that of the conventional two-dimensional electronic steering phased-array antenna, thereby allowing for low cost and large volume commercial production. The present invention provides electronically generated left, right, up, and down beams for focusing the antenna beam toward the satellite while the vehicle is moving. All of the beams are simultaneously available for use in the motion beam tracking. This provides much faster response and less signal degradation.
摘要:
An external memory based FIFO (xFIFO) apparatus coupled to an external memory and a register bus is disclosed. The xFIFO apparatus includes an xFIFO engine, a wDMA engine, an rDMA engine, a first virtual FIFO, and a second virtual FIFO. The xFIFO engine receives a FIFO command from the register bus and generates a writing DMA command and a reading DMA command. The wDMA engine receives the writing DMA command from the xFIFO engine and forwards an incoming data to the external memory. The rDMA engine receives the reading DMA command from the xFIFO engine and pre-fetches a FIFO data from the external memory. The wDMA engine and the rDMA engine synchronize with each other via the first virtual FIFO and the second virtual FIFO.
摘要:
A method of making a MEMS device including providing a first substrate with an insulator layer thereon. A holder is attached to the insulator layer, and the first substrate is thinned. Thereafter, cavities are formed in the first substrate and the first substrate is flipped over and bonded to an integrated circuit wafer with the cavities facing the integrated circuit wafer. The holder is removed to provide a first substrate with cavities formed therein facing the integrated circuit wafer and an insulator layer overlying the first substrate.
摘要:
An external memory based FIFO (xFIFO) apparatus coupled to an external memory and a register bus is disclosed. The xFIFO apparatus includes an xFIFO engine, a wDMA engine, an rDMA engine, a first virtual FIFO, and a second virtual FIFO. The xFIFO engine receives a FIFO command from the register bus and generates a writing DMA command and a reading DMA command. The wDMA engine receives the writing DMA command from the xFIFO engine and forwards an incoming data to the external memory. The rDMA engine receives the reading DMA command from the xFIFO engine and pre-fetches a FIFO data from the external memory. The wDMA engine and the rDMA engine synchronize with each other via the first virtual FIFO and the second virtual FIFO.
摘要:
An exercise bicycle is composed of a base, a motor, a seat plate, a plurality of resilient elements, a support unit, a seat, a handle, two pedals, and a drive device. The motor is mounted on the base and provided with an eccentric rod fastened with a shaft of the motor such that the eccentric rod is capable of disturbing the seat plate to vibrate horizontally at the time when the motor is in operation. The horizontal vibration of the seat plate is imparted via the support unit to the seat, the handle and the pedals for massaging the hips, the back, and the hands of a user of the exercise bicycle, who is engaged in a leg exercise.