公开(公告)号：US20100085719A1

公开(公告)日：2010-04-08

申请号：US12511288

申请日：2009-07-29

Applicant: Hsin-Chieh Lu ,  Chin-Feng Chou

Inventor： Hsin-Chieh Lu ,  Chin-Feng Chou

IPC: H05K9/00

CPC classification number: H05K5/0091 ,  H01L23/552 ,  H01L2224/16225 ,  H01L2924/19105 ,  H05K9/0026

Abstract: A chip package structure with a shielding cover includes a substrate, a chip, a pair of first passive components, a pair of second passive components, and a shielding cover. The chip, the pair of first passive components, the pair of second passive components, and the shielding cover are disposed on the substrate. The chip is electrically connected to the substrate. The shielding cover covers the chip and has leads connected to the substrate. The leads include a first lead and a second lead. The first lead connected to a portion of the substrate is located between the pair of first passive components and arranged along a first axis with the pair of first passive components. The second lead connected to a portion of the substrate is located between the pair of second passive components and arranged along a second axis with the pair of second passive components.

Abstract translation: 具有屏蔽罩的芯片封装结构包括基板，芯片，一对第一无源元件，一对第二无源元件和屏蔽盖。 芯片，一对第一无源部件，一对第二无源部件和屏蔽盖设置在基板上。 芯片电连接到基板。 屏蔽盖覆盖芯片并具有连接到基板的引线。 引线包括第一引线和第二引线。 连接到基板的一部分的第一引线位于一对第一无源部件之间并且沿着第一轴线与该对第一无源部件一起布置。 连接到基板的一部分的第二引线位于一对第二无源部件之间并且沿着第二轴线与该对第二无源部件一起布置。

公开(公告)号：US08102669B2

公开(公告)日：2012-01-24

申请号：US12511288

申请日：2009-07-29

Applicant: Hsin-Chieh Lu ,  Chin-Feng Chou

Inventor： Hsin-Chieh Lu ,  Chin-Feng Chou

IPC: H05K7/00 ,  H05K9/00

CPC classification number: H05K5/0091 ,  H01L23/552 ,  H01L2224/16225 ,  H01L2924/19105 ,  H05K9/0026

Abstract: A chip package structure with a shielding cover includes a substrate, a chip, a pair of first passive components, a pair of second passive components, and a shielding cover. The chip, the pair of first passive components, the pair of second passive components, and the shielding cover are disposed on the substrate. The chip is electrically connected to the substrate. The shielding cover covers the chip and has leads connected to the substrate. The leads include a first lead and a second lead. The first lead connected to a portion of the substrate is located between the pair of first passive components and arranged along a first axis with the pair of first passive components. The second lead connected to a portion of the substrate is located between the pair of second passive components and arranged along a second axis with the pair of second passive components.

Abstract translation: 具有屏蔽罩的芯片封装结构包括基板，芯片，一对第一无源元件，一对第二无源元件和屏蔽盖。 芯片，一对第一无源部件，一对第二无源部件和屏蔽盖设置在基板上。 芯片电连接到基板。 屏蔽盖覆盖芯片并具有连接到基板的引线。 引线包括第一引线和第二引线。 连接到基板的一部分的第一引线位于一对第一无源部件之间并且沿着第一轴线与该对第一无源部件一起布置。 连接到基板的一部分的第二引线位于一对第二无源部件之间并且沿着第二轴线与该对第二无源部件一起布置。

公开(公告)号：US20090237177A1

公开(公告)日：2009-09-24

申请号：US12077391

申请日：2008-03-19

Applicant: Tzyh-Ghuang Ma ,  Chin-Feng Chou

Inventor： Tzyh-Ghuang Ma ,  Chin-Feng Chou

IPC: H01P5/20

CPC classification number: H03D7/02

Abstract: A miniaturized microwave sampler has a first substrate and a second substrate mounted together on a mounting surface, a ground layer formed on the mounting surface, a slot-line formed on the ground layer. A first microstrip line is formed on a top surface of the first substrate and has a first end as a local pulse signal input port. A T-shaped second microstrip line is formed on a bottom surface of the second substrate and achieves an electromagnetic coupling with the first microstrip line through the slot-line. The second microstrip line has a longitudinal segment and a latitudinal segment both being perpendicularly connected together. The longitudinal segment has one end as a radio frequency signal input port. The latitudinal segment further extends to form two output ports.

Abstract translation: 小型化微波取样器具有安装在安装面上的第一基板和第二基板，形成在安装面上的接地层，形成在接地层上的槽线。 第一微带线形成在第一基板的顶表面上，并且具有作为本地脉冲信号输入端口的第一端。 T形第二微带线形成在第二基板的底面上，通过槽线实现与第一微带线的电磁耦合。 第二微带线具有垂直连接在一起的纵向段和横向段。 纵向段具有作为射频信号输入端口的一端。 纬度段进一步延伸以形成两个输出端口。