Local bus interface
    2.
    发明授权
    Local bus interface 有权
    本地总线接口

    公开(公告)号:US6061510A

    公开(公告)日:2000-05-09

    申请号:US149689

    申请日:1998-09-08

    IPC分类号: G06F13/38 G06F13/40 G06F13/42

    CPC分类号: G06F13/4018 G06F13/385

    摘要: A local bus interface for providing high-speed data transfer between the local bus of a personal computer and one or more data storage devices. The local bus interface bypasses the standard expansion bus (ISA, EISA, Micro Channel) on the personal computer, is directly connected to the local bus, and is transparent to the system software.

    摘要翻译: 本地总线接口,用于在个人计算机的本地总线与一个或多个数据存储设备之间提供高速数据传输。 本地总线接口绕过个人计算机上的标准扩展总线(ISA,EISA,Micro Channel),直接连接到本地总线,对系统软件透明。

    Planar z representation for z compression
    3.
    发明授权
    Planar z representation for z compression 有权
    z压缩的平面z表示

    公开(公告)号:US07382368B1

    公开(公告)日:2008-06-03

    申请号:US10878460

    申请日:2004-06-28

    IPC分类号: G06T15/40 G06T1/00

    CPC分类号: G06T15/405 G06T9/00

    摘要: A z buffer stores compressed z data represented in a planar format for one or more tiles. The compressed format includes a set of tile specific coefficients defining a plane equation for each z tested primitive intersecting the tile. The z buffer stores a maximum number of sets of tile specific coefficients for each tile, and when the maximum number of sets is exceeded for a particular tile, an uncompressed format is used to store the z data for the particular tile.

    摘要翻译: z缓冲器存储以一个或多个瓦片的平面格式表示的压缩z数据。 压缩格式包括一组瓦片特定系数,其定义了与瓦片相交的每个z测试的原始物体的平面方程。 z缓冲器存储每个瓦片的瓦片特定系数的最大数量集合,并且当针对特定瓦片超过最大数量的集合时,使用未压缩格式来存储特定瓦片的z数据。

    Dynamically selectable texture filter for a software graphics engine
    4.
    发明授权
    Dynamically selectable texture filter for a software graphics engine 失效
    用于软件图形引擎的动态选择纹理过滤器

    公开(公告)号:US06366290B1

    公开(公告)日:2002-04-02

    申请号:US09050644

    申请日:1998-03-30

    IPC分类号: G06T1140

    CPC分类号: G06T15/04

    摘要: A software graphics engine includes a selectable mode filter for improved texture mapping. An x, y pixel coordinate is mapped into a u, v texture map. The mapped u, v coordinate includes integer and fractional portions. Depending on the location of the coordinate relative to the four nearest texels, which are represented as integers, one of several texture mapping schemes are used to either select or calculate the texel value to be used to render the pixel at the x, y screen location. The three texture mapping schemes include point sampling in which the nearest texel from the texture map is selected, two-texel averaging in which the closest two texels are combined in a weighted average, and four-texel averaging in which the closest four texels are combined in a weighted average. By providing a selectable filter than can perform point sampling or two or four-texel averaging, the speed benefit of point sampling can be approached as well as the superior quality of two- and four-texel averaging.

    摘要翻译: 软件图形引擎包括用于改进纹理映射的可选模式滤波器。 x,y像素坐标映射到u,v纹理图。 映射的u,v坐标包括整数和小数部分。 根据相对于四个最接近的纹素的坐标的位置,其被表示为整数,使用若干纹理映射方案中的一个来选择或计算用于在x,y屏幕位置处渲染像素的纹素值 。 三个纹理映射方案包括点采样,其中从纹理映射中选出最近的纹理像素,其中最接近的两个纹素以加权平均组合的两个纹理平均值,以及最近的四个纹素组合的四个纹理平均值 加权平均数。 通过提供可选择的滤波器,可以执行点采样或两个或四个纹理平均,可以接近点采样的速度效益以及双和四纹理平均的优越质量。

    Auto level of detail-based MIP mapping in a graphics processor
    5.
    发明授权
    Auto level of detail-based MIP mapping in a graphics processor 失效
    图形处理器中基于细节的MIP映射的自动级别

    公开(公告)号:US5986663A

    公开(公告)日:1999-11-16

    申请号:US948626

    申请日:1997-10-10

    申请人: Daniel P. Wilde

    发明人: Daniel P. Wilde

    IPC分类号: G06T15/04 G06T15/00

    CPC分类号: G06T15/04

    摘要: A graphics system includes a graphics controller for rendering polygons with texture using an improved MIP mapping technique. The graphics controller includes a polygon engine for rendering the pixels in a polygon and a texture map engine for selecting texture elements ("texels") from an appropriate texture map to be applied to the pixels rendered by the polygon engine. The texture map engine generates texel coordinate values from pixel coordinate values provided by the polygon engine. The appropriate texture map is selected from a set of texture maps each varying from the others by the level of detail of the texture in each map. The graphics controller selects the appropriate level of detail texture map to use to increase speed, efficiency, and realism quality of the graphics system. The determination as to which level of detail texture map is appropriate is made by computing the area bounded by adjacent texel coordinates generated by the texture map engine. In the preferred embodiment, vectors are defined for each the adjacent texels and the area is determined from the magnitude of the cross product of the vectors.

    摘要翻译: 图形系统包括用于使用改进的MIP映射技术来渲染具有纹理的多边形的图形控制器。 图形控制器包括用于渲染多边形中的像素的多边形引擎和用于从适当的纹理图选择纹理元素(“纹理”)的纹理映射引擎,以将其应用于由多边形引擎呈现的像素。 纹理映射引擎从由多边形引擎提供的像素坐标值生成纹素坐标值。 从一组纹理贴图中选择适当的纹理贴图,每个纹理贴图通过每个贴图中纹理的细节级别而不同。 图形控制器选择适当的细节纹理图层来提高图形系统的速度,效率和现实质量。 通过计算由纹理映射引擎生成的相邻纹素坐标所限定的区域来确定哪个级别的细节纹理图是适当的。 在优选实施例中,针对每个相邻纹理像素定义矢量,并且根据矢量的十字积的大小来确定该区域。

    Tiled linear host texture storage
    6.
    发明授权
    Tiled linear host texture storage 失效
    平铺线性主机纹理存储

    公开(公告)号:US5844576A

    公开(公告)日:1998-12-01

    申请号:US773921

    申请日:1996-12-30

    CPC分类号: G06T15/04

    摘要: A process and implementing computer system for graphics applications in which polygon information, including transparency, color and other polygon characteristics, is organized, stored and transferred in terms of areas or tiled blocks of information in a matrix configuration. The polygon bytes of texel information are organized in an exemplary 8.times.8 matrix row and column format in the graphics subsystem for improved cache-hit efficiency and translated to and from the linear addressing scheme of a host storage device when the host storage is accessed to refill the graphics cache. The bytes comprising the memory tiles of polygon information are arranged such that a complete tile of information is transferred in one burst-mode host memory access to minimize normal multi-line access arbitration and other typical access delays.

    摘要翻译: 用于图形应用的处理和实现计算机系统,其中根据矩阵配置中的面积或平铺的信息块来组织,存储和传送多边形信息,包括透明度,颜色和其他多边形特征。 纹理信息的多边形字节以图形子系统中的示例性8×8矩阵行和列格式组织,用于改进的高速缓存命中效率,并且当主机存储器被访问以重新填充主机存储设备时被转换到主存储设备的线性寻址方案 图形缓存。 包括多边形信息的存储器片的字节被布置成使得在一个突发模式主机存储器访问中传送完整的信息块,以最小化正常的多线路访问仲裁和其他典型的访问延迟。

    Apparatus for dynamic XY tiled texture caching
    7.
    发明授权
    Apparatus for dynamic XY tiled texture caching 失效
    用于动态XY平铺纹理缓存的设备

    公开(公告)号:US5828382A

    公开(公告)日:1998-10-27

    申请号:US691762

    申请日:1996-08-02

    申请人: Daniel P. Wilde

    发明人: Daniel P. Wilde

    IPC分类号: G06T15/04 G06F15/00 G06T1/00

    CPC分类号: G06T15/04

    摘要: A graphics subsystem includes hardware for permitting tile texture data to be dynamically cached internally within the hardware. In addition, the system generates a SHIFT signal to permit automatic adjustment of tile texture parameters to facilitate retrieval of the cached texture maps. The system includes a 1 kbyte static random access memory internally disposed within a graphics processor to facilitate UV caching of the texture maps by the graphics processor. A cache controller also disposed within the graphics processor facilitates tile requests by other resources in the graphics subsystem to the internal static random access memory. The cache controller performs UV tile read hit comparisons and subsequent UV to linear address conversions to read texels from the internal static random access memory.

    摘要翻译: 图形子系统包括用于允许瓦片纹理数据在硬件内部动态缓存的硬件。 此外,系统生成SHIFT信号以允许自动调整瓦片纹理参数以便于检索缓存的纹理贴图。 该系统包括内部设置在图形处理器内的1kbyte静态随机存取存储器,以便于图形处理器对纹理贴图进行UV缓存。 还设置在图形处理器内的高速缓存控制器使图形子系统中的其他资源的瓦片请求促进到内部静态随机存取存储器。 高速缓存控制器执行UV瓦片读取命中比较和随后的UV到线性地址转换,以从内部静态随机存取存储器读取纹素。

    System and method for storing states used to configure a processing pipeline in a graphics processing unit
    8.
    发明授权
    System and method for storing states used to configure a processing pipeline in a graphics processing unit 有权
    用于存储用于在图形处理单元中配置处理流水线的状态的系统和方法

    公开(公告)号:US07725688B1

    公开(公告)日:2010-05-25

    申请号:US11470013

    申请日:2006-09-05

    IPC分类号: G06F9/00 G06T1/20

    摘要: States that are used in configuring a processing pipeline are passed down through a separate pipeline in parallel with the data transmitted down through the processing pipeline. With this separate pipeline, the states for configuring any one stage of the processing pipeline are continuously available in the corresponding stage of the state pipeline, and new states for configuring the processing pipeline can be transmitted down the state pipeline without flushing the processing pipeline. The processing pipeline and the separate pipeline for the states can be divided into multiple sections so that the width of the separate pipeline for the states can be reduced.

    摘要翻译: 用于配置处理流水线的状态与通过处理流水线向下传输的数据并行传送通过单独的流水线。 通过这个单独的流水线,用于配置处理流水线的任何一个阶段的状态在状态流水线的相应阶段中连续可用,并且用于配置处理流水线的新状态可以在状态管道下传送而不冲洗处理流水线。 处理管线和状态的单独管道可以分为多个部分,以便可以减少用于状态的单独管道的宽度。

    MIP map blending in a graphics processor
    9.
    发明授权
    MIP map blending in a graphics processor 失效
    在图形处理器中MIP映射混合

    公开(公告)号:US6157386A

    公开(公告)日:2000-12-05

    申请号:US949177

    申请日:1997-10-10

    申请人: Daniel P. Wilde

    发明人: Daniel P. Wilde

    IPC分类号: G06T15/20 G06T11/40

    CPC分类号: G06T15/20

    摘要: A graphics system includes a graphics controller for rendering polygons with texture using an improved MIP mapping technique in which texels from multiple MIP maps are blended together. The graphics controller includes a polygon engine for rendering the pixels in a polygon and at texture map engine for selecting texture elements ("texels") from an appropriate texture map to be applied to the pixels rendered by the polygon engine. The texture map engine generates texel coordinate values from pixel coordinate values provided by the polygon engine. Texel values are selected from a set of texture maps each map varying from the others by the level of detail of the texture in each map. The graphics controller computes a scale factor for each texel value according an are a bounded by adjacent texel coordinates generated by the texture map engine. The scale factor is then used to compute a weighted average of texels form more than one MIP maps. In the preferred embodiment, vectors are defined for each the adjacent texels and the area is determined from the magnitude of the cross product of the vectors.

    摘要翻译: 图形系统包括用于使用改进的MIP映射技术来渲染具有纹理的多边形的图形控制器,其中来自多个MIP映射的纹理混合在一起。 图形控制器包括用于渲染多边形中的像素的多边形引擎和纹理映射引擎,用于从适当的纹理图中选择要应用于由多边形引擎呈现的像素的纹理元素(“纹理”)。 纹理映射引擎从由多边形引擎提供的像素坐标值生成纹素坐标值。 Texel值是从一组纹理图中选出的,每个地图各不相同,每个地图中的纹理细节水平。 图形控制器根据由纹理映射引擎生成的相邻纹素像素坐标界定的每个纹素值计算比例因子。 然后使用比例因子来计算形式多于一个MIP映射的纹素的加权平均。 在优选实施例中,针对每个相邻纹理像素定义矢量,并且根据矢量的十字积的大小来确定该区域。

    Local bus interface
    10.
    发明授权
    Local bus interface 失效
    本地总线接口

    公开(公告)号:US5649162A

    公开(公告)日:1997-07-15

    申请号:US66400

    申请日:1993-05-24

    IPC分类号: G06F13/38 G06F13/40 G06F13/42

    CPC分类号: G06F13/4018 G06F13/385

    摘要: A local bus interface for providing high-speed data transfer between the local bus of a personal computer and one or more data storage devices. The local bus interface bypasses the standard expansion bus (ISA, EISA, Micro Channel) on the personal computer, is directly connected to the local bus, and is transparent to the system software.

    摘要翻译: 本地总线接口,用于在个人计算机的本地总线与一个或多个数据存储设备之间提供高速数据传输。 本地总线接口绕过个人计算机上的标准扩展总线(ISA,EISA,Micro Channel),直接连接到本地总线,对系统软件透明。