Abstract:
An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.
Abstract:
An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.
Abstract:
An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.
Abstract:
An apparatus and associated method are disclosed for the treatment of a surface through the projection of an abrading material against the surface. The abrading material is fed from a hopper to a centrifugal blast wheel which projects the abrading material toward the surface, the blast wheel rotated by a blast motor. A controllably positionable valve is disposed between the hopper and the blast wheel to regulate a rate at which the abrading material passes from the hopper to the blast wheel. During operation, a target current to be applied to the blast motor is determined by a control circuit, the target current indicative of a desired rate of abrasion of the surface. The control circuit then measures the current applied to the blast wheel and controls the position of the valve in relation to the target current and the measured current.
Abstract:
A unique method and apparatus modifies the load impedance at the output of a power amplifier by varying a voltage variable capacitor (VVC) (310) to maximize the efficiency of the power amplifier (304). A comparator (509) generates amplifier control signal (211) based upon a detected power output signal (216) and a reference signal. In addition to providing power control, the control signal is also coupled to a VVC circuit (506) to control the output impedance of the power amplifier. In an alternate embodiment, a separate VVC control signal (527) based upon a comparison of the power control signal and the battery voltage is coupled to a VVC. In another alternate embodiment, a second VVC can be coupled in parallel to the first VVC. The second VVC is preferably controlled by a signal (805) based upon the current in the power amplifier. Finally, an alternate embodiment incorporates a VVC circuit (506) at the input of the power amplifier to compensate for variations in input impedance to improve other power amplifier parameters such as IM, gain, output power and noise level.
Abstract:
A reptile cage liner is formed as a blank having selective cuts and creases to reduce section modulus to provide a stiff but foldable wall (flap) on each side of a rectangular floor. Flaps fold or bend preferentially along creases to form the liner. Residual stiffness of creases urges edges of the flaps to seal by contacting walls of a cage tray. Corner, funnel tabs tilt downward and extend laterally from each side flap across a corner gap to prevent escape of bedding, food, or other debris into corners or behind the liner. Liners may be easily replaceable and disposable.
Abstract:
The present invention describes methods for the preparation of protein arrays of full length proteins. The use of such arrays in screening methods is also described.
Abstract:
Various embodiments and techniques are described for discovery in a network, and for automatically discovering one or more nodes of the network. In an embodiment a discovery loop may be implemented to detect new nodes that may have been added to the network. The data transmission from the nodes may be paused, and undiscovered nodes may be requested to identify themselves. Each node that identifies itself may then be configured by, for example, having a time slot assigned for data transmission from the node. Separate time slots may be assigned to allow multiple nodes to transmit data over certain types of networks without colliding with each other. Data transmission from the nodes may then be resumed.
Abstract:
The invention provides one or more displays to assist a user in managing inventory for one or more migration components in a migration. In particular, forecast data for each migration component is generated based on migration data for one or more targets and a plurality of time frames. One or more displays are generated that include the forecast data, migration data, and/or inventory data for the migration components.