公开(公告)号：US06424226B1

公开(公告)日：2002-07-23

申请号：US09612071

申请日：2000-07-07

申请人： Robbert Carel Thuis

发明人： Robbert Carel Thuis

IPC分类号： H03F3191

CPC分类号： H04B1/0475 ,  H03F1/32 ,  H04B1/123

摘要： RF amplifiers used in communications systems exhibit backward intermodulation caused by non-linear amplification. Backward intermodulation of the transmit signal and an external signal, which reaches the output of the amplifier through the antenna, results in an unwanted third-order intermodulation product that potentially interferes with the proper reception of the receive signal. The receive sensitivity of the communications system is adversely affected by this unwanted third-order intermodulation product. By mixing a second-order intermodulation component, caused by the same backward intermodulation, with the transmit signal, a compensation signal is created allowing the cancellation of the unwanted third-order intermodulation component.

摘要翻译： 在通信系统中使用的RF放大器表现出由非线性放大引起的反向互调。 通过天线到达放大器的输出的发射信号和外部信号的向后互调导致不期望的三阶互调产物，其潜在地干扰接收信号的适当接收。 通信系统的接收灵敏度受到这种不必要的三阶互调产物的不利影响。 通过将由相同的后向互调产生的二阶互调分量与发送信号混合，产生补偿信号，允许消除不想要的三阶互调分量。

公开(公告)号：US06215359B1

公开(公告)日：2001-04-10

申请号：US09563721

申请日：2000-05-01

申请人： David Sutherland Peckham ,  Gregory Redmond Black

发明人： David Sutherland Peckham ,  Gregory Redmond Black

IPC分类号： H03F3191

CPC分类号： H03F1/56 ,  H04B1/00 ,  H04B1/005 ,  H04B1/04 ,  H04B1/0458 ,  H04B1/406

摘要： An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.

摘要翻译： 激励器匹配电路（125），级间匹配电路（134）和谐波滤波器匹配电路（140）将在两级功率放大器（130）的输入端的阻抗匹配在第一级（132）和第二级 （130）的功率放大器（130）的输出端以及用于多于一个感兴趣频带的功率放大器（130）的输出端。 在GSM / DCS双频带无线电话（101）中，当双频带发射机（110）以GSM模式工作时，匹配电路（124,134,140）在900MHz时提供低回波损耗。 谐波滤波器匹配电路（140）还滤除1800MHz，2700MHz和高次谐波的信号。 然而，当双频带发射机（110）处于DCS模式时，匹配电路（124,134,140）在1800MHz提供低回波损耗并且滤除2700MHz的信号和1800MHz的谐波。

公开(公告)号：US06798268B2

公开(公告)日：2004-09-28

申请号：US10714844

申请日：2003-11-18

申请人： Bonkee Kim ,  Iiku Nam ,  Kwyro Lee

发明人： Bonkee Kim ,  Iiku Nam ,  Kwyro Lee

IPC分类号： H03F3191

CPC分类号： H03D7/1441 ,  H03D7/1466 ,  H03D2200/0023 ,  H03D2200/0043 ,  H03D2200/0088 ,  H03F1/223 ,  H03F2200/372

摘要： The present invention relates to circuits having differential structure which uses complementary devices for processing single-ended signal. The single-ended differential circuit in accordance with the present invention, comprises first and second complementary devices having first, second, and third terminals, respectively, wherein current flowing from the second terminal to the third terminal has its quantity and direction being varying in dependant on the voltage driven to the first terminal, wherein the currents flowing through the first and second complementary devices vary in opposite relationship. The single-ended differential circuit further comprises an input terminal for driving the first terminals of the first and second complementary devices with a control signal; and biasing means connected to the second and third terminals of the first and second devices, for determining biasing points of the first and second complementary devices such that the first and second devices operates in a differential relationship with respect to a signal driven to the input terminal, wherein the biasing unit determining the biasing points such that one of the first and second devices is substantially active.

摘要翻译： 本发明涉及使用互补装置处理单端信号的差分结构的电路。 根据本发明的单端差分电路分别包括具有第一，第二和第三端子的第一和第二互补器件，其中从第二端子流到第三端子的电流的数量和方向在从属 在驱动到第一端子的电压上，其中流过第一和第二互补装置的电流以相反的关系变化。 单端差分电路还包括用于利用控制信号驱动第一和第二互补装置的第一端子的输入端子; 以及偏置装置，连接到第一和第二装置的第二和第三端子，用于确定第一和第二互补装置的偏置点，使得第一和第二装置相对于驱动到输入端的信号的差分关系工作 其中所述偏置单元确定所述偏置点，使得所述第一和第二装置中的一个基本上是活动的。

公开(公告)号：US06693493B2

公开(公告)日：2004-02-17

申请号：US10051290

申请日：2002-01-22

申请人： Bonkee Kim ,  Ilku Nam ,  Kwyro Lee

发明人： Bonkee Kim ,  Ilku Nam ,  Kwyro Lee

IPC分类号： H03F3191

CPC分类号： H03D7/1441 ,  H03D7/1466 ,  H03D2200/0023 ,  H03D2200/0043 ,  H03D2200/0088 ,  H03F1/223 ,  H03F2200/372

摘要： The present invention relates to circuits having differential structure which uses complementary devices for processing single-ended signal. The single-ended differential circuit in accordance with the present invention, comprises first and second complementary devices having first, second, and third terminals, respectively, wherein current flowing from the second terminal to the third terminal has its quantity and direction being varying in dependant on the voltage driven to the first terminal, wherein the currents flowing through the first and second complementary devices vary in opposite relationship. The single-ended differential circuit further comprises an input terminal for driving the first terminals of the first and second complementary devices with a control signal; and biasing means connected to the second and third terminals of the first and second devices, for determining biasing points of the first and second complementary devices such that the first and second devices operates in a differential relationship with respect to a signal driven to the input terminal, wherein the biasing means determining the biasing points such that one of the first and second devices is substantially active.

公开(公告)号：US06573797B2

公开(公告)日：2003-06-03

申请号：US10112471

申请日：2002-03-28

申请人： Yasuhiro Yokota

发明人： Yasuhiro Yokota

IPC分类号： H03F3191

CPC分类号： H03F1/565 ,  H03F3/19 ,  H03F3/191 ,  H03F3/193 ,  H03F3/601 ,  H03F2200/222 ,  H03F2200/387

摘要： A high-frequency power amplifier capable of considerably improving the power amplification efficiency (&eegr;). This high-frequency power amplifier 10 comprises an amplifying element 11, an input-side matching circuit 12, and an output-side matching circuit 13, and further has a current absorbing unit 20. This current absorbing unit 20 absorbs the current of a higher-harmonic frequency current contained in a signal of a fundamental wave at which the amplifying element 11 operates. Preferably, this current absorbing unit 20 is comprised of an LC-series resonance circuit 21 having a higher-harmonic frequency as a resonance frequency, and thereby bypasses the above current to the earth.

公开(公告)号：US06822506B2

公开(公告)日：2004-11-23

申请号：US10418446

申请日：2003-04-17

申请人： David M. Binkley

发明人： David M. Binkley

IPC分类号： H03F3191

CPC分类号： H03K5/1536 ,  H03K5/007

摘要： A continuous-time baseline restoration (BLR) circuit providing built-in pulse tail-cancellation, or BLR tail-cancel circuit, in constant fraction discriminator (CFD) arming and timing circuits. The BLR tail cancel circuit is applied at the output of constant fraction timing shaping filters and arming circuits to permit monolithic integrated circuit implementation of CFD circuits operating at high input signal count rates. The BLR tail-cancel circuit provides correction of dc offset and count-rate dependent baseline errors along with simultaneous tail-cancellation. Correction of dc offsets due to electronic device mismatches and count-rate dependent baseline errors is required for accurate time pickoff from the input signals. The reduction of pulse width, or pulse tail-cancellation is required to shorten the duration of high count rate signals to prevent the severe distortion caused by the occurrence a new signal superimposed on the tails of previous signals, a condition known as pulse pileup. Without pulse tail-cancellation, there are substantial errors in time pickoff due to the pulse pileup.

摘要翻译： 在恒定分数鉴别器（CFD）布防和定时电路中提供内置脉冲尾部消除或BLR尾部消除电路的连续时间基线恢复（BLR）电路。 BLR尾消除电路应用于恒定分数定时整形滤波器和布防电路的输出，以允许以高输入信号计数速率工作的CFD电路的单片集成电路实现。 BLR尾部消除电路提供直流偏移和计数率依赖基线误差的校正以及同时的尾部消除。 由于输入信号的精确时间检测，需要校正由于电子设备不匹配引起的直流偏移和计数速率相关的基线误差。 需要减小脉冲宽度或脉冲尾部消除以缩短高计数率信号的持续时间，以防止由于先前信号的尾部叠加的新信号引起的严重失真，称为脉冲堆积。 没有脉冲尾部消除，由于脉冲堆积，在时间检测方面存在实质性的错误。

公开(公告)号：US06768383B2

公开(公告)日：2004-07-27

申请号：US10220113

申请日：2002-12-04

申请人： Hiroshi Kushitani ,  Hisayoshi Kato ,  Michiaki Tsuneoka

发明人： Hiroshi Kushitani ,  Hisayoshi Kato ,  Michiaki Tsuneoka

IPC分类号： H03F3191

CPC分类号： H03F3/60 ,  H01P1/2007 ,  H03H7/0123 ,  H03H7/1758 ,  H03H7/1766 ,  H03H7/1791 ,  H03H7/46

摘要： A bias circuit is provided for attenuating harmonic distortions of a signal having a simple construction and which can be applied to a high-frequency amplifier used in a communication device, such as a mobile telephone. The circuit reduces a voltage drop therein and thus provides a high-frequency amplifier having reduced power consumption and an increased operating efficiency. The high-frequency amplifier includes an amplifier circuit, an output matching circuit, and the bias circuit. In the bias circuit, a parallel circuit including a first transmission line and a first capacitor has one end connected between the amplifier and the output matching circuit. The other end of the parallel circuit is connected to a power source and is grounded via a second capacitor. In the circuit, the bias circuit can be short-circuited in a desired frequency band while being an open circuit in a frequency band of a signal to be amplified, hence attenuating the harmonic distortions without using a low pass filter.

摘要翻译： 提供了一种偏置电路，用于衰减具有简单结构的信号的谐波失真，并且可以应用于诸如移动电话的通信设备中使用的高频放大器。 该电路减少其中的电压降，从而提供具有降低的功耗和提高的操作效率的高频放大器。 高频放大器包括放大器电路，输出匹配电路和偏置电路。 在偏置电路中，包括第一传输线和第一电容器的并联电路的一端连接在放大器和输出匹配电路之间。 并联电路的另一端连接到电源，并通过第二电容器接地。 在该电路中，偏置电路可以在期望的频带中短路，同时是要放大的信号的频带中的开路，因此在不使用低通滤波器的情况下衰减谐波失真。

公开(公告)号：US06469582B2

公开(公告)日：2002-10-22

申请号：US10000696

申请日：2001-11-14

申请人： Leonard Forbes

发明人： Leonard Forbes

IPC分类号： H03F3191

CPC分类号： H04B1/18 ,  H03H11/04 ,  H03H11/1213 ,  H04B1/48

摘要： A monolithic active frequency selection circuit includes an input presenting a frequency-dependent impedance and a first gain block configured to provide less than unity voltage gain, a high input impedance and a low output impedance. An output of the first amplifier is coupled to the frequency selection circuit input. The frequency selection circuit includes a first phase shifter that, in one aspect, is formed by a first capacitor coupled between the first port and a reference voltage. The frequency selection circuit also includes a second amplifier configured to provide greater than unity voltage gain. The second amplifier has an input coupled to the output of the first amplifier and an output coupled to the input of the first amplifier. The frequency selection circuit further includes a second phase shifter, which may be formed from a capacitor coupled between the output of the second amplifier and a reference voltage. The first and second amplifiers and the first and second phase shifters are coupled in a loop such that the frequency dependence of an impedance presented at the output of the first amplifier emulates the impedance of a parallel RLC tank circuit, providing a Q on the order of ten at a center frequency &ohgr;o, of several hundred megahertz. The output of the second amplifier may be used to provide a high Q, tuned transimpedance amplification function relative to the input.

摘要翻译： 单片有源频率选择电路包括呈现频率相关阻抗的输入和被配置为提供小于单位电压增益，高输入阻抗和低输出阻抗的第一增益块。 第一放大器的输出耦合到频率选择电路输入端。 频率选择电路包括第一移相器，其在一个方面由耦合在第一端口和参考电压之间的第一电容器形成。 频率选择电路还包括被配置为提供大于单位电压增益的第二放大器。 第二放大器具有耦合到第一放大器的输出和耦合到第一放大器的输入的输出的输入。 频率选择电路还包括第二移相器，其可以由耦合在第二放大器的输出端和参考电压之间的电容器形成。 第一和第二放大器以及第一和第二移相器耦合在一个环路中，使得在第一放大器的输出处呈现的阻抗的频率依赖性模拟并联RLC电路的阻抗，从而提供Q 十个中心频率ω，几百兆赫兹。 第二放大器的输出可以用于提供相对于输入的高Q调谐互阻放大功能。

公开(公告)号：US06281756B1

公开(公告)日：2001-08-28

申请号：US09477400

申请日：2000-01-04

申请人： Seiki Goto ,  Akira Inoue

发明人： Seiki Goto ,  Akira Inoue

IPC分类号： H03F3191

CPC分类号： H03F3/601 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6644 ,  H01L2224/48 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/1306 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H03F3/604 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： An internally impedance matched transistor circuit prevents low frequency oscillation during high frequency band operation. Field effect transistors and corresponding oscillation-preventing stabilization circuits are located in the same package with the stabilization circuits close to the corresponding field effect transistors. Each oscillation-preventing stabilization circuit includes a resistor and a capacitor connected in series.

摘要翻译： 内部阻抗匹配晶体管电路防止在高频带操作期间的低频振荡。 场效应晶体管和相应的防振稳定电路位于相同的封装中，稳定电路靠近相应的场效应晶体管。 每个防振动稳定电路包括串联连接的电阻器和电容器。

公开(公告)号：US06281755B1

公开(公告)日：2001-08-28

申请号：US09221049

申请日：1998-12-28

申请人： Peter Feld ,  Horst Kroeckel ,  Markus Vester

发明人： Peter Feld ,  Horst Kroeckel ,  Markus Vester

IPC分类号： H03F3191

CPC分类号： H03F1/565 ,  H03F3/191 ,  H03F2200/111

摘要： A high-frequency power amplifier for feeding an antenna of a nuclear magnetic resonance tomography apparatus has at least one amplifier stage that can emit a maximum output power within a first frequency band. Circuitry for frequency-dependently altering the maximum output power is connected to the amplifier stage, whereby the maximum output power within a second frequency band, that is higher than the first frequency band is higher than within the first frequency band.

摘要翻译： 用于馈送核磁共振断层摄影装置的天线的高频功率放大器具有至少一个可在第一频带内发射最大输出功率的放大器级。 用于频率依赖性地改变最大输出功率的电路连接到放大器级，由此在比第一频带高的第二频带内的最大输出功率高于第一频带内的最大输出功率。