公开(公告)号：US3946248A

公开(公告)日：1976-03-23

申请号：US486536

申请日：1974-07-12

申请人： Dennis Darcy Buss

发明人： Dennis Darcy Buss

IPC分类号： G11C27/04 ,  H01L27/105 ,  H03H11/26 ,  H03H15/02 ,  H01L27/10 ,  G11C11/40 ,  H01L29/78

CPC分类号： H03H15/02 ,  G11C27/04 ,  H01L27/1055

摘要： Circuitry for compensating for charge transfer inefficiency related dispersion in analog charge transfer devices (CTD's) is disclosed. In one aspect of the invention the tap weights of a filter are modified in a preselected manner to provide dispersion correction. In a different configuration, a dispersion compensating filter is connected to the input of a charge transfer delay line to provide an initial signal which is the inverse of the total dispersion of the CTD. In a further aspect of the invention regenerators are inserted into a CTD delay line to provide negative feedback to previous stages of the delay line in order to compensate for dispersion.

摘要翻译： 公开了用于补偿模拟电荷转移装置（CTD）中的电荷转移低效相关色散的电路。 在本发明的一个方面，滤波器的抽头重量以预先选择的方式被修改以提供色散校正。 在不同的配置中，色散补偿滤波器连接到电荷转移延迟线的输入，以提供与CTD的总色散相反的初始信号。 在本发明的另一方面，再生器被插入到CTD延迟线中，以向延迟线的先前阶段提供负反馈，以补偿分散。

公开(公告)号：US20100287517A1

公开(公告)日：2010-11-11

申请号：US12766643

申请日：2010-04-23

申请人： Dennis Darcy Buss ,  Alice Wang ,  Gordon Gammie ,  Jie Gu ,  Rahul Jagdish Rithe ,  Satyendra R.P. Raju Datla ,  Sharon Hsiao-Wei Chou

发明人： Dennis Darcy Buss ,  Alice Wang ,  Gordon Gammie ,  Jie Gu ,  Rahul Jagdish Rithe ,  Satyendra R.P. Raju Datla ,  Sharon Hsiao-Wei Chou

IPC分类号： G06F17/50

CPC分类号： H03G9/025 ,  G10L19/00 ,  H03G7/007 ,  H03G9/00 ,  H03G9/005

摘要： A method is described for simulating the f-sigma timing path delay of an integrated circuit design when local transistor variations determine the stochastic delay. This is achieved by determining an estimated delay time for a first timing path using non-linear operating point analysis of local variations (NLOPALV). An operating point is calculated for each cell that is included in a timing path in the integrated circuit design. The f-sigma operating point of a cell-arc is a point on the cell-arc delay function (CADF). An f-sigma delay value is determined for each cell using the selected operating point on the CADF of the cell. The determined delay values of the plurality of cells in the timing path may then be combined to predict the estimated delay for the entire timing path. The method may be extended to deal with slew rate, predict hold time statistics, prune paths, and deal with convergent paths.

摘要翻译： 描述了当本地晶体管变化确定随机延迟时模拟集成电路设计的f-sigma定时路径延迟的方法。 这通过使用局部变化（NLOPALV）的非线性工作点分析来确定第一定时路径的估计延迟时间来实现。 为集成电路设计中的定时路径中包含的每个单元计算工作点。 电池弧的f-σ工作点是电池电弧延迟功能（CADF）上的一个点。 使用小区的CADF上的所选择的操作点为每个小区确定f-sigma延迟值。 然后可以将定时路径中的多个小区的确定的延迟值组合以预测整个定时路径的估计延迟。 该方法可以扩展以处理压摆率，预测保持时间统计，修剪路径和处理收敛路径。

公开(公告)号：US07023018B2

公开(公告)日：2006-04-04

申请号：US10818731

申请日：2004-04-06

申请人： Dennis Darcy Buss

发明人： Dennis Darcy Buss

IPC分类号： H01L29/12

CPC分类号： H01L21/8238 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/1054 ,  H01L29/7842 ,  H01L29/7848

摘要： The present invention provides, in one embodiment, a P-type Metal Oxide Semiconductor (PMOS) device (100). The device (100) comprises a tensile-strained silicon layer (105) located on a silicon-germanium substrate (110) and silicon-germanium source/drain structures (135, 140) located on or in the tensile-strained silicon layer (105). The PMOS device (100) further includes a channel region (130) located between the silicon-germanium source/drain structures (135, 140) and within the tensile-strained silicon layer (105). The channel region (130) has a compressive stress (145) in a direction parallel to an intended current flow (125) through the channel region (130). Other embodiments of the present invention include a method of manufacturing the PMOS device (200) and a MOS device (300).

摘要翻译： 本发明在一个实施例中提供一种P型金属氧化物半导体（PMOS）器件（100）。 该器件（100）包括位于硅 - 锗衬底（110）上的拉伸应变硅层（105）和位于拉伸应变硅层（105）上或其中的硅 - 锗源极/漏极结构（135,140） ）。 PMOS器件（100）还包括位于硅 - 锗源/漏结构（135,140）之间并且在拉伸应变硅层（105）内的沟道区（130）。 通道区域130具有通过通道区域130平行于预期电流（125）的方向的压缩应力（145）。 本发明的其他实施例包括制造PMOS器件（200）和MOS器件（300）的方法。

公开(公告)号：US4016567A

公开(公告)日：1977-04-05

申请号：US629246

申请日：1975-11-06

申请人： Dennis Darcy Buss

发明人： Dennis Darcy Buss

IPC分类号： G01S13/64 ,  G06G7/19 ,  G11C19/28 ,  G01S9/42

CPC分类号： G06G7/1907 ,  G01S13/64 ,  G11C19/285

摘要： Signal processing wherein signals are processed using chirp-Z-transform (CZT) techniques and charge transfer device (CTD) transversal filters. The chirp weighting signal may be amplitude modulated to achieve signal apodization and may be generated by impulsing a CTD complex filter having an appropriate impulse response. Signal premultiplication using a one-bit quantized chirp signal is described.Application of these techniques to doppler range processing apparatus wherein radar returns are premultiplied to provide up-chirp multiplied time samples prior to being inputted into a CTD range buffer. Each bit of the CTD has an associated CTD chirp Z-transform complex filter the outputs from each of which are summed and squared. The range bins and the associated complex filters are provided on a common semiconductor chip together with peripheral circuitry.

摘要翻译： 使用啁啾Z变换（CZT）技术和电荷转移装置（CTD）横向滤波器处理信号的信号处理。 啁啾加权信号可以被调幅以实现信号变迹，并且可以通过脉冲具有适当脉冲响应的CTD复数滤波器来产生。 描述使用一位量化啁啾信号的信号预乘法。

公开(公告)号：US3935439A

公开(公告)日：1976-01-27

申请号：US487105

申请日：1974-07-12

申请人： Dennis Darcy Buss ,  Walter Howard Bailey

发明人： Dennis Darcy Buss ,  Walter Howard Bailey

IPC分类号： G06G7/19 ,  H03H15/02 ,  G11C11/40

CPC分类号： G06G7/1907 ,  H03H15/02 ,  H03H2015/026

摘要： A variable tap weight convolution filter comprised of charge transfer devices which may be charge coupled devices, bucket brigade devices or a combination of the two, for performing convolutions of an input signal with tap weights from a second input signal, said tap weights varying as a function of time.

摘要翻译： 一种可变抽头权重卷积滤波器，其包括可以是电荷耦合器件，桶式装置或两者的组合的电荷转移装置，用于执行输入信号与来自第二输入信号的抽头权重的卷积，所述抽头权重变化为 时间的功能

公开(公告)号：US3997973A

公开(公告)日：1976-12-21

申请号：US523591

申请日：1974-11-13

申请人： Dennis Darcy Buss

发明人： Dennis Darcy Buss

IPC分类号： H01L29/423 ,  H01L29/768 ,  H03H15/02 ,  H03H7/10 ,  H01L29/78 ,  H03H7/12 ,  H03H7/28

CPC分类号： H01L29/42396 ,  H01L29/76883 ,  H03H15/02 ,  H03H2015/026

摘要： A charge-transfer transversal filter and method of use is provided. In one aspect of the invention a handpass filter is provided where the center frequency of the bandpass is variable responsive to the clock rate applied to the charge-transfer devices. In a different aspect of the invention a matched filter for a chirp signal is provided. The filter requires a minimum number of Nyquist samples by including the provision of a clock rate which varies responsive to the frequency sweep of the input chirp signal. A method for detecting a chirp signal is provided which includes the step of selectively varying the clock rate applied to a charge-transfer shift register responsive to the frequency variations of a selected chirp signal.

摘要翻译： 提供电荷转移横向滤波器和使用方法。 在本发明的一个方面，提供了一种手持滤波器，其中带通的中心频率响应于施加到电荷转移装置的时钟速率而变化。 在本发明的另一方面，提供了一种用于线性调频信号的匹配滤波器。 滤波器通过包括提供响应于输入线性调频脉冲信号的频率扫描而变化的时钟速率，需要最小数量的奈奎斯特采样。 提供了一种用于检测线性调频信号的方法，该方法包括响应于所选啁啾信号的频率变化选择性地改变施加到电荷转移移位寄存器的时钟速率的步骤。

公开(公告)号：US08302047B2

公开(公告)日：2012-10-30

申请号：US12766643

申请日：2010-04-23

申请人： Dennis Darcy Buss ,  Alice Wang ,  Gordon Gammie ,  Jle Gu ,  Rahul Jagdish Rithe ,  Satyendra R. P. Raju Datla ,  Sharon Hsiao-Wei Chou

发明人： Dennis Darcy Buss ,  Alice Wang ,  Gordon Gammie ,  Jle Gu ,  Rahul Jagdish Rithe ,  Satyendra R. P. Raju Datla ,  Sharon Hsiao-Wei Chou

IPC分类号： G06F17/50 ,  G06F9/455

CPC分类号： H03G9/025 ,  G10L19/00 ,  H03G7/007 ,  H03G9/00 ,  H03G9/005

摘要： A method is described for simulating the f-sigma timing path delay of an integrated circuit design when local transistor variations determine the stochastic delay. This is achieved by determining an estimated delay time for a first timing path using non-linear operating point analysis of local variations (NLOPALV). An operating point is calculated for each cell that is included in a timing path in the integrated circuit design. The f-sigma operating point of a cell-arc is a point on the cell-arc delay function (CADF). An f-sigma delay value is determined for each cell using the selected operating point on the CADF of the cell. The determined delay values of the plurality of cells in the timing path may then be combined to predict the estimated delay for the entire timing path. The method may be extended to deal with slew rate, predict hold time statistics, prune paths, and deal with convergent paths.

摘要翻译： 描述了当本地晶体管变化确定随机延迟时模拟集成电路设计的f-sigma定时路径延迟的方法。 这通过使用局部变化（NLOPALV）的非线性工作点分析来确定第一定时路径的估计延迟时间来实现。 为集成电路设计中的定时路径中包含的每个单元计算工作点。 电池弧的f-σ工作点是电池电弧延迟功能（CADF）上的一个点。 使用小区的CADF上的所选择的操作点为每个小区确定f-sigma延迟值。 然后可以将定时路径中的多个小区的确定的延迟值组合以预测整个定时路径的估计延迟。 该方法可以扩展以处理压摆率，预测保持时间统计，修剪路径和处理收敛路径。

公开(公告)号：US3942035A

公开(公告)日：1976-03-02

申请号：US483337

申请日：1974-06-26

申请人： Dennis Darcy Buss

发明人： Dennis Darcy Buss

IPC分类号： G01S13/64 ,  G06G7/19 ,  G11C19/28 ,  G11C19/00 ,  G01S9/42 ,  H03H7/10

CPC分类号： G06G7/1907 ,  G01S13/64 ,  G11C19/287

摘要： Signal processing wherein signals are processed using chirp-Z-transform (CZT) techniques and charge transfer device (CTD) transversal filters. The chirp weighting signal may be amplitude modulated to achieve signal apodization and may be generated by impulsing a CTD complex filter having an appropriate impulse response. Signal premultiplication using a one-bit quantized chirp signal is described.Application of these techniques to doppler range processing apparatus wherein radar returns are premultiplied to provide up-chirp multiplied time samples prior to being inputted into a CTD range buffer. Each bit of the CTD has an associated CTD chirp-Z-transform complex filter the outputs from each of which are summed and squared. The range bins and the associated complex filters are provided on a common semiconductor chip together with peripheral circuitry.

摘要翻译： 使用啁啾Z变换（CZT）技术和电荷转移装置（CTD）横向滤波器处理信号的信号处理。 啁啾加权信号可以被调幅以实现信号变迹，并且可以通过脉冲具有适当脉冲响应的CTD复数滤波器来产生。 描述使用一位量化啁啾信号的信号预乘法。