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公开(公告)号:US20130221447A1
公开(公告)日:2013-08-29
申请号:US13754063
申请日:2013-01-30
申请人: Choong-Ho Lee , Donggu Yi , Seung Chul Lee , Hyungsuk Lee , Seonah Nam , Changwoo Oh , Jongwook Lee , Song-Yi Han
发明人: Choong-Ho Lee , Donggu Yi , Seung Chul Lee , Hyungsuk Lee , Seonah Nam , Changwoo Oh , Jongwook Lee , Song-Yi Han
IPC分类号: H01L27/092
CPC分类号: H01L29/6681 , H01L21/02255 , H01L21/32053 , H01L21/76224 , H01L27/092 , H01L29/517 , H01L29/66545 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要: Provided are field effect transistors and methods of fabricating the same. The transistor may include a substrate with an active pattern, the active pattern having a top surface and two sidewalls, a gate electrode proximal to the top surface and the sidewalls of the active pattern and crossing the active pattern, a gate spacer covering a sidewall of the gate electrode, a gate dielectric pattern at a bottom surface of the gate electrode, a source electrode on the active pattern at one side of the gate electrode, a drain electrode on the active pattern at another side of the gate electrode, and silicide patterns on surfaces of the source and drain electrodes, respectively. The gate dielectric pattern includes at least one high-k layer and the gate spacer has a dielectric constant that is smaller than that of the gate dielectric pattern.
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公开(公告)号:US20150279960A1
公开(公告)日:2015-10-01
申请号:US14740436
申请日:2015-06-16
申请人: Choong-Ho Lee , Donggu Yi , Seung Chul Lee , Hyungsuk Lee , Seonah Nam , Changwoo Oh , Jongwook Lee , Song-Yi Han
发明人: Choong-Ho Lee , Donggu Yi , Seung Chul Lee , Hyungsuk Lee , Seonah Nam , Changwoo Oh , Jongwook Lee , Song-Yi Han
IPC分类号: H01L29/66 , H01L21/02 , H01L21/762 , H01L21/3205
CPC分类号: H01L29/6681 , H01L21/02255 , H01L21/32053 , H01L21/76224 , H01L27/092 , H01L29/517 , H01L29/66545 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要: Provided are field effect transistors and methods of fabricating the same. The transistor may include a substrate with an active pattern, the active pattern having a top surface and two sidewalls, a gate electrode proximal to the top surface and the sidewalls of the active pattern and crossing the active pattern, a gate spacer covering a sidewall of the gate electrode, a gate dielectric pattern at a bottom surface of the gate electrode, a source electrode on the active pattern at one side of the gate electrode, a drain electrode on the active pattern at another side of the gate electrode, and silicide patterns on surfaces of the source and drain electrodes, respectively. The gate dielectric pattern includes at least one high-k layer and the gate spacer has a dielectric constant that is smaller than that of the gate dielectric pattern.
摘要翻译: 提供场效应晶体管及其制造方法。 晶体管可以包括具有有源图案的衬底,有源图案具有顶表面和两个侧壁,靠近顶表面的栅极电极和有源图案的侧壁并与有源图案交叉,栅极间隔件覆盖侧壁 栅极电极,栅电极的底面的栅极电介质图案,位于栅电极一侧的有源图案上的源电极,栅电极另一侧的有源图案上的漏电极,以及硅化物图案 分别在源电极和漏电极的表面上。 栅极电介质图案包括至少一个高k层,并且栅极间隔物的介电常数小于栅极电介质图案的介电常数。
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公开(公告)号:US09087723B2
公开(公告)日:2015-07-21
申请号:US13754063
申请日:2013-01-30
申请人: Choong-Ho Lee , Donggu Yi , Seung Chul Lee , Hyungsuk Lee , Seonah Nam , Changwoo Oh , Jongwook Lee , Song-Yi Han
发明人: Choong-Ho Lee , Donggu Yi , Seung Chul Lee , Hyungsuk Lee , Seonah Nam , Changwoo Oh , Jongwook Lee , Song-Yi Han
IPC分类号: H01L21/70 , H01L27/092 , H01L29/66 , H01L29/51 , H01L29/78
CPC分类号: H01L29/6681 , H01L21/02255 , H01L21/32053 , H01L21/76224 , H01L27/092 , H01L29/517 , H01L29/66545 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要: Provided are field effect transistors and methods of fabricating the same. The transistor may include a substrate with an active pattern, the active pattern having a top surface and two sidewalls, a gate electrode proximal to the top surface and the sidewalls of the active pattern and crossing the active pattern, a gate spacer covering a sidewall of the gate electrode, a gate dielectric pattern at a bottom surface of the gate electrode, a source electrode on the active pattern at one side of the gate electrode, a drain electrode on the active pattern at another side of the gate electrode, and silicide patterns on surfaces of the source and drain electrodes, respectively. The gate dielectric pattern includes at least one high-k layer and the gate spacer has a dielectric constant that is smaller than that of the gate dielectric pattern.
摘要翻译: 提供场效应晶体管及其制造方法。 晶体管可以包括具有有源图案的衬底,有源图案具有顶表面和两个侧壁,靠近顶表面的栅极电极和有源图案的侧壁并与有源图案交叉,栅极间隔件覆盖侧壁 栅极电极,栅电极的底面的栅极电介质图案,位于栅电极一侧的有源图案上的源电极,栅电极另一侧的有源图案上的漏电极,以及硅化物图案 分别在源电极和漏电极的表面上。 栅极电介质图案包括至少一个高k层,并且栅极间隔物的介电常数小于栅极电介质图案的介电常数。
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