公开(公告)号：US20130042093A1

公开(公告)日：2013-02-14

申请号：US11967303

申请日：2007-12-31

申请人： Don A. Van Dyke ,  Michael Mishaeli ,  Ittai Anati ,  Baiju V. Patel ,  Will Deutsch ,  Rajesh Shah ,  Gilbert Neiger ,  James B. Crossland ,  Chris J. Newburn ,  Bryant E. Bigbee ,  Muhammad Faisal Azeem ,  John L. Reid ,  Dion Rodgers

发明人： Don A. Van Dyke ,  Michael Mishaeli ,  Ittai Anati ,  Baiju V. Patel ,  Will Deutsch ,  Rajesh Shah ,  Gilbert Neiger ,  James B. Crossland ,  Chris J. Newburn ,  Bryant E. Bigbee ,  Muhammad Faisal Azeem ,  John L. Reid ,  Dion Rodgers

IPC分类号： G06F9/312

CPC分类号： G06F9/30043 ,  G06F9/30003 ,  G06F9/30101 ,  G06F9/461

摘要： Embodiments of an invention related to context state management based on processor features are disclosed. In one embodiment, a processor includes instruction logic and state management logic. The instruction logic is to receive a state management instruction having a parameter to identify a subset of the features supported by the processor. The state management logic is to perform a state management operation specified by the state management instruction.

摘要翻译： 公开了与基于处理器特征的上下文状态管理相关的发明的实施例。 在一个实施例中，处理器包括指令逻辑和状态管理逻辑。 指令逻辑是接收具有参数的状态管理指令，以识别由处理器支持的特征的子集。 状态管理逻辑是执行由状态管理指令指定的状态管理操作。

公开(公告)号：US08631261B2

公开(公告)日：2014-01-14

申请号：US11967303

申请日：2007-12-31

申请人： Don A. Van Dyke ,  Michael Mishaeli ,  Ittai Anati ,  Baiju V. Patel ,  Will Deutsch ,  Rajesh Shah ,  Gilbert Neiger ,  James B. Crossland ,  Chris J. Newburn ,  Bryant E. Bigbee ,  Muhammad Faisal Azeem ,  John L. Reid ,  Dion Rodgers

发明人： Don A. Van Dyke ,  Michael Mishaeli ,  Ittai Anati ,  Baiju V. Patel ,  Will Deutsch ,  Rajesh Shah ,  Gilbert Neiger ,  James B. Crossland ,  Chris J. Newburn ,  Bryant E. Bigbee ,  Muhammad Faisal Azeem ,  John L. Reid ,  Dion Rodgers

IPC分类号： G06F1/32 ,  G06F9/44

CPC分类号： G06F9/30043 ,  G06F9/30003 ,  G06F9/30101 ,  G06F9/461

摘要： Embodiments of an invention related to context state management based on processor features are disclosed. In one embodiment, a processor includes instruction logic and state management logic. The instruction logic is to receive a state management instruction having a parameter to identify a subset of the features supported by the processor. The state management logic is to perform a state management operation specified by the state management instruction.

公开(公告)号：US08677163B2

公开(公告)日：2014-03-18

申请号：US13837923

申请日：2013-03-15

申请人： Don Van Dyke ,  Michael Mishaeli ,  Ittai Anati ,  Baiju V. Patel ,  Will Deutsch ,  Rajesh R. Sha ,  Gilbert Neiger ,  James B. Crossland ,  Chris J. Newburn ,  Bryant E. Bigbee ,  Muhammad Faisal Azeem ,  John L. Reid ,  Dion Rodgers

发明人： Don Van Dyke ,  Michael Mishaeli ,  Ittai Anati ,  Baiju V. Patel ,  Will Deutsch ,  Rajesh R. Sha ,  Gilbert Neiger ,  James B. Crossland ,  Chris J. Newburn ,  Bryant E. Bigbee ,  Muhammad Faisal Azeem ,  John L. Reid ,  Dion Rodgers

IPC分类号： G06F1/32 ,  G06F9/44

CPC分类号： G06F9/30043 ,  G06F9/30003 ,  G06F9/30101 ,  G06F9/461

摘要： Embodiments of an invention related to context state management based on processor features are disclosed. In one embodiment, a processor includes instruction logic and state management logic. The instruction logic is to receive a state management instruction having a parameter to identify a subset of the features supported by the processor. The state management logic is to perform a state management operation specified by the state management instruction.

摘要翻译： 公开了与基于处理器特征的上下文状态管理相关的发明的实施例。 在一个实施例中，处理器包括指令逻辑和状态管理逻辑。 指令逻辑是接收具有参数的状态管理指令，以识别由处理器支持的特征的子集。 状态管理逻辑是执行由状态管理指令指定的状态管理操作。

公开(公告)号：US20090158001A1

公开(公告)日：2009-06-18

申请号：US11958225

申请日：2007-12-17

申请人： Ramacharan Sundararaman ,  Faisal Azeem

发明人： Ramacharan Sundararaman ,  Faisal Azeem

IPC分类号： G06F12/02 ,  G06F9/46

CPC分类号： G06F12/0284 ,  G06F2212/206

摘要： A system may comprise one or more source agents, target agents, and a plurality of directory agents, which may determine the target agent to which one or more transactions generated by the source agents is to be sent. A controller may identify one of a plurality of directory agents to process the transactions. The directory agent may determine the control and status registers of the target agents to which the transaction is to be sent. The target agent may complete the transaction after receiving the transaction from the directory agent. The directory agents may store a memory map to resolve the target agent to which the transactions is to be sent. The directory based distributed CSR access may provide scalability to ever increasing number of heterogeneous agents in the system.

摘要翻译： 系统可以包括一个或多个源代理，目标代理和多个目录代理，其可以确定将要发送源代理生成的一个或多个事务的目标代理。 控制器可以识别多个目录代理之一来处理事务。 目录代理可以确定要发送交易的目标代理的控制和状态寄存器。 目标代理可以在从目录代理接收到事务之后完成事务。 目录代理可以存储存储器映射以解析要发送事务的目标代理。 基于目录的分布式CSR访问可以为系统中越来越多的异构代理提供可扩展性。

公开(公告)号：US20230315466A1

公开(公告)日：2023-10-05

申请号：US17712101

申请日：2022-04-02

申请人： Eliyah Kilada ,  Ammon Christiansen ,  Ariel Fabien Sabba ,  Christopher Celio ,  Ankur Groen ,  Muhammad Faisal Azeem ,  Malihe Ahmadi ,  Rangeen Basu Roy Chowdhury

发明人： Eliyah Kilada ,  Ammon Christiansen ,  Ariel Fabien Sabba ,  Christopher Celio ,  Ankur Groen ,  Muhammad Faisal Azeem ,  Malihe Ahmadi ,  Rangeen Basu Roy Chowdhury

IPC分类号： G06F9/38 ,  G06F9/30

CPC分类号： G06F9/3802 ,  G06F9/3867 ,  G06F9/3861 ,  G06F9/30047

摘要： At least one instruction storage coupled with a fetch unit including sets of fetch circuitry each having a same plurality of pipeline stages. The sets of fetch circuitry perform fetch operations to fetch blocks of instructions from the at least one instruction storage. Stall circuitry, in response to an indication of a hazard for a given pipeline stage of a first set of fetch circuitry, retains a fetch operation for a first block of instructions at the given pipeline stage, and zero or more fetch operations for zero or more corresponding blocks of instructions at zero or more preceding pipeline stages of the first set of fetch circuitry, until the hazard has been removed. The stall circuitry advances a fetch operation for a second block of instructions from the given pipeline stage of a second set of fetch circuitry, during an initial cycle of the one or more cycles.

公开(公告)号：US20230315467A1

公开(公告)日：2023-10-05

申请号：US17712103

申请日：2022-04-02

申请人： Eliyah Kilada ,  Ammon Christiansen ,  Ariel Fabien Sabba ,  Christopher Celio ,  Ankur Groen ,  Muhammad Faisal Azeem ,  Malihe Ahmadi ,  Rangeen Basu Roy Chowdhury

发明人： Eliyah Kilada ,  Ammon Christiansen ,  Ariel Fabien Sabba ,  Christopher Celio ,  Ankur Groen ,  Muhammad Faisal Azeem ,  Malihe Ahmadi ,  Rangeen Basu Roy Chowdhury

IPC分类号： G06F9/38 ,  G06F9/30 ,  G06F12/0811

CPC分类号： G06F9/3802 ,  G06F9/3867 ,  G06F12/0811 ,  G06F9/30043 ,  G06F9/30047

摘要： First and second instruction storage are coupled with a fetch unit including sets of fetch circuitry each spanning a plurality of pipeline stages. A first set of fetch circuitry is to initiates a fetch operation for a block of instructions, and has an indication to read the block of instructions from the second instruction storage. The first set retains the fetch operation for the block of instructions at a pipeline stage of the plurality, for one or more cycles, until a hazard corresponding to the pipeline stage of the first set of fetch circuitry has been removed. The first set stores the block of instructions from the second instruction storage to the first instruction storage, during the one or more cycles. The first set reads the block of instructions from the first instruction storage, for the fetch operation, once the hazard has been removed.

公开(公告)号：US20130219154A1

公开(公告)日：2013-08-22

申请号：US13837923

申请日：2013-03-15

申请人： Don A. Van Dyke ,  Michael Mishaeli ,  Ittai Anati ,  Baiju V. Patel ,  Will Deutsch ,  Rajesh Shah ,  Gilbert Neiger ,  James B. Crossland ,  Chris J. Newburn ,  Bryant E. Bigbee ,  Muhammad Faisal Azeem ,  John L. Reid ,  Dion Rodgers

发明人： Don A. Van Dyke ,  Michael Mishaeli ,  Ittai Anati ,  Baiju V. Patel ,  Will Deutsch ,  Rajesh Shah ,  Gilbert Neiger ,  James B. Crossland ,  Chris J. Newburn ,  Bryant E. Bigbee ,  Muhammad Faisal Azeem ,  John L. Reid ,  Dion Rodgers

IPC分类号： G06F9/30

CPC分类号： G06F9/30043 ,  G06F9/30003 ,  G06F9/30101 ,  G06F9/461

摘要： Embodiments of an invention related to context state management based on processor features are disclosed. In one embodiment, a processor includes instruction logic and state management logic. The instruction logic is to receive a state management instruction having a parameter to identify a subset of the features supported by the processor. The state management logic is to perform a state management operation specified by the state management instruction.

公开(公告)号：US08145878B2

公开(公告)日：2012-03-27

申请号：US11958225

申请日：2007-12-17

申请人： Ramacharan Sundararaman ,  Faisal Azeem

发明人： Ramacharan Sundararaman ,  Faisal Azeem

IPC分类号： G06F13/368 ,  G06F12/10

CPC分类号： G06F12/0284 ,  G06F2212/206

摘要： A system may comprise one or more source agents, target agents, and a plurality of directory agents, which may determine the target agent to which one or more transactions generated by the source agents is to be sent. A controller may identify one of a plurality of directory agents to process the transactions. The directory agent may determine the control and status registers of the target agents to which the transaction is to be sent. The target agent may complete the transaction after receiving the transaction from the directory agent. The directory agents may store a memory map to resolve the target agent to which the transactions is to be sent. The directory based distributed CSR access may provide scalability to ever increasing number of heterogeneous agents in the system.

摘要翻译： 系统可以包括一个或多个源代理，目标代理和多个目录代理，其可以确定将要发送源代理生成的一个或多个事务的目标代理。 控制器可以识别多个目录代理之一来处理事务。 目录代理可以确定要发送交易的目标代理的控制和状态寄存器。 目标代理可以在从目录代理接收到事务之后完成事务。 目录代理可以存储存储器映射以解析要发送事务的目标代理。 基于目录的分布式CSR访问可以为系统中越来越多的异构代理提供可扩展性。