公开(公告)号：US5982665A

公开(公告)日：1999-11-09

申请号：US280255

申请日：1999-03-29

申请人： Dongsheng Xing ,  Simpson (ShinChu) Tao ,  Frank (Fong-Long) Lin

发明人： Dongsheng Xing ,  Simpson (ShinChu) Tao ,  Frank (Fong-Long) Lin

IPC分类号： G11C16/16 ,  G11C16/06

CPC分类号： G11C16/16

摘要： A non-volatile memory device has a plurality of blocks each of which can be erased simultaneously. Each block has a plurality of sectors. A status byte comprising of non-volatile memory cells is associated with each sector. A status circuit receives signals stored in each of the status bytes and generates a status signal indicative of the status of the block.

摘要翻译： 非易失性存储器件具有可以同时擦除的多个块。 每个块具有多个扇区。 包括非易失性存储器单元的状态字节与每个扇区相关联。 状态电路接收存储在每个状态字节中的信号，并产生指示块的状态的状态信号。

公开(公告)号：US06427186B1

公开(公告)日：2002-07-30

申请号：US09281630

申请日：1999-03-30

申请人： Frank (Fong-Long) Lin ,  Dongsheng Xing

发明人： Frank (Fong-Long) Lin ,  Dongsheng Xing

IPC分类号： G06F1210

CPC分类号： G11C16/105 ,  G06F12/0246 ,  G11C16/102

摘要： A memory system, an interface system for accessing a physical sector on an electrically erasable media based upon a logical block number, and a method for mapping a logical block number to a physical sector on an electrically erasable media are disclosed. The erasable media has an erase block size larger than a write block size. The interface system interfaces a host processor to an electrically-erasable memory, such as a flash media. The host processor requests access to the memory based on a logical block number. The interface system uses a first portion of the logical block number to determine from a master index table a physical sector number of a table of physical sector numbers corresponding to the logical block number. The interface system uses a second portion of the logical block number to determine from the table of physical sector numbers the physical sector number on the media corresponding to the logical block number. The host processor is provided access to the physical sector having the physical sector number corresponding to the logical block number. A logical block number may be remapped to a physical sector that has been completely erased by updating the table of physical sector numbers corresponding to the logical block number. A plurality of physical sectors, which are marked as discarded are erased simultaneously.

摘要翻译： 公开了一种存储系统，用于基于逻辑块号访问电可擦除介质上的物理扇区的接口系统，以及用于将逻辑块号映射到电可擦除介质上的物理扇区的方法。 可擦除介质的擦除块大小大于写入块大小。 接口系统将主处理器连接到电可擦除存储器，例如闪存介质。 主处理器基于逻辑块号请求对存储器的访问。 接口系统使用逻辑块号的第一部分从主索引表确定对应于逻辑块号的物理扇区号的表的物理扇区号。 接口系统使用逻辑块号的第二部分从物理扇区号的表中确定媒体上对应于逻辑块号的物理扇区号。 提供主处理器对具有对应于逻辑块号的物理扇区号的物理扇区的访问。 可以通过更新对应于逻辑块号的物理扇区号的表来将逻辑块号重新映射到已被完全擦除的物理扇区。 被标记为被丢弃的多个物理扇区被同时擦除。

公开(公告)号：US06405323B1

公开(公告)日：2002-06-11

申请号：US09281357

申请日：1999-03-30

申请人： Frank Fong-Long Lin ,  Dongsheng Xing

发明人： Frank Fong-Long Lin ,  Dongsheng Xing

IPC分类号： G06F1100

CPC分类号： G11C29/765 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G11C16/349 ,  G11C29/88

摘要： A circuit interfaces a host processor to an electrically-erasable memory in a memory space, such as a flash media. The memory space defines a plurality of segments, and each of the segments includes a plurality of sectors. A media interface circuit regulates access by the host processor to the electrically-erasable memory in the memory space. Sector valid indication reading circuitry reads at least one sector valid indication from a segment of the media. Sector valid determination circuitry determines a non-defective sector from the at least one sector valid indication read. Sector level segment defect map indication reading circuitry reads a sector-level segment defect map from the sector determined to be non-defective. Sector defect determination circuitry determines, from the sector-level segment defect map read, sectors within the segment that are valid. Access regulation circuitry regulates access to the memory space at least in part on the determinations by the sector defect determination circuitry.

摘要翻译： 电路将主机处理器与诸如闪存介质之类的存储器空间中的电可擦除存储器接口。 存储器空间定义多个段，并且每个段包括多个扇区。 媒体接口电路调节主处理器对存储器空间中的电可擦除存储器的访问。 扇区有效指示读取电路从介质段读取至少一个扇区有效指示。 扇区有效确定电路从所述至少一个扇区有效指示读取确定无缺陷扇区。 扇区级段缺陷映射指示读取电路从被确定为无缺陷的扇区读取扇区级段缺陷映射。 扇区缺陷确定电路从扇区级段缺陷图读取确定段内的有效段。 访问调节电路至少部分地调节对扇区缺陷确定电路的确定的访问存储器空间。

公开(公告)号：US07069371B2

公开(公告)日：2006-06-27

申请号：US10798485

申请日：2004-03-10

申请人： Eugene Feng ,  William Lau ,  Frank Fong-Long Lin

发明人： Eugene Feng ,  William Lau ,  Frank Fong-Long Lin

IPC分类号： G06F13/14 ,  G06F13/00

CPC分类号： G06F13/4243

摘要： A motherboard of a computer system has a video display port, a reprogrammable non-volatile memory, a controller for the non-volatile memory, and a graphics controller circuit for outputting video signals to the video display port. A wired-OR circuit connects the graphics controller circuit to the controller to the port. Thus, the video display port can be used to output video signals from the computer system to a peripheral video display device, and the video display port can be used as an input port to reprogram the non-volatile memory. The present invention also relates to a non-volatile memory device which has an array of non-volatile memory cells and two ports for communication therewith. A first port receives a first communication protocol and interfaces with the array in the first communication protocol. A second port receives a second communication protocol and converts the second communication protocol into the first communication protocol.

摘要翻译： 计算机系统的主板具有视频显示端口，可再编程非易失性存储器，用于非易失性存储器的控制器，以及用于向视频显示端口输出视频信号的图形控制器电路。 有线电路将图形控制器电路连接到控制器到端口。 因此，可以使用视频显示端口将来自计算机系统的视频信号输出到外围视频显示装置，并且视频显示端口可以用作输入端口以重新编程非易失性存储器。 本发明还涉及一种具有非易失性存储器单元阵列和用于与其通信的两个端口的非易失性存储器件。 第一端口接收第一通信协议并与第一通信协议中的阵列接口。 第二端口接收第二通信协议并将第二通信协议转换为第一通信协议。