公开(公告)号：US07069371B2

公开(公告)日：2006-06-27

申请号：US10798485

申请日：2004-03-10

申请人： Eugene Feng ,  William Lau ,  Frank Fong-Long Lin

发明人： Eugene Feng ,  William Lau ,  Frank Fong-Long Lin

IPC分类号： G06F13/14 ,  G06F13/00

CPC分类号： G06F13/4243

摘要： A motherboard of a computer system has a video display port, a reprogrammable non-volatile memory, a controller for the non-volatile memory, and a graphics controller circuit for outputting video signals to the video display port. A wired-OR circuit connects the graphics controller circuit to the controller to the port. Thus, the video display port can be used to output video signals from the computer system to a peripheral video display device, and the video display port can be used as an input port to reprogram the non-volatile memory. The present invention also relates to a non-volatile memory device which has an array of non-volatile memory cells and two ports for communication therewith. A first port receives a first communication protocol and interfaces with the array in the first communication protocol. A second port receives a second communication protocol and converts the second communication protocol into the first communication protocol.

摘要翻译： 计算机系统的主板具有视频显示端口，可再编程非易失性存储器，用于非易失性存储器的控制器，以及用于向视频显示端口输出视频信号的图形控制器电路。 有线电路将图形控制器电路连接到控制器到端口。 因此，可以使用视频显示端口将来自计算机系统的视频信号输出到外围视频显示装置，并且视频显示端口可以用作输入端口以重新编程非易失性存储器。 本发明还涉及一种具有非易失性存储器单元阵列和用于与其通信的两个端口的非易失性存储器件。 第一端口接收第一通信协议并与第一通信协议中的阵列接口。 第二端口接收第二通信协议并将第二通信协议转换为第一通信协议。

公开(公告)号：US07146442B2

公开(公告)日：2006-12-05

申请号：US11407601

申请日：2006-04-19

申请人： Eugene Feng ,  William Lau ,  Fong-Long Lin

发明人： Eugene Feng ,  William Lau ,  Fong-Long Lin

IPC分类号： G06F13/00 ,  G06F3/00

CPC分类号： G06F13/4243

摘要： A motherboard of a computer system has a video display port, a reprogrammable non-volatile memory, a controller for the non-volatile memory, and a graphics controller circuit for outputting video signals to the video display port. A wired-OR circuit connects the graphics controller circuit to the controller to the port. Thus, the video display port can be used to output video signals from the computer system to a peripheral video display device, and the video display port can be used as an input port to reprogram the non-volatile memory. The present invention also relates to a non-volatile memory device which has an array of non-volatile memory cells and two ports for communication therewith. A first port receives a first communication protocol and interfaces with the array in the first communication protocol. A second port receives a second communication protocol and converts the second communication protocol into the first communication protocol.

摘要翻译： 计算机系统的主板具有视频显示端口，可再编程非易失性存储器，用于非易失性存储器的控制器，以及用于向视频显示端口输出视频信号的图形控制器电路。 有线电路将图形控制器电路连接到控制器到端口。 因此，可以使用视频显示端口将来自计算机系统的视频信号输出到外围视频显示装置，并且视频显示端口可以用作输入端口以重新编程非易失性存储器。 本发明还涉及一种具有非易失性存储器单元阵列和用于与其通信的两个端口的非易失性存储器件。 第一端口接收第一通信协议并与第一通信协议中的阵列接口。 第二端口接收第二通信协议并将第二通信协议转换为第一通信协议。

公开(公告)号：US20060190646A1

公开(公告)日：2006-08-24

申请号：US11407601

申请日：2006-04-19

申请人： Eugene Feng ,  William Lau ,  Fong-Long Lin

发明人： Eugene Feng ,  William Lau ,  Fong-Long Lin

IPC分类号： G06F13/00

CPC分类号： G06F13/4243

摘要： A motherboard of a computer system has a video display port, a reprogrammable non-volatile memory, a controller for the non-volatile memory, and a graphics controller circuit for outputting video signals to the video display port. A wired-OR circuit connects the graphics controller circuit to the controller to the port. Thus, the video display port can be used to output video signals from the computer system to a peripheral video display device, and the video display port can be used as an input port to reprogram the non-volatile memory. The present invention also relates to a non-volatile memory device which has an array of non-volatile memory cells and two ports for communication therewith. A first port receives a first communication protocol and interfaces with the array in the first communication protocol. A second port receives a second communication protocol and converts the second communication protocol into the first communication protocol.

公开(公告)号：US20050200628A1

公开(公告)日：2005-09-15

申请号：US10798485

申请日：2004-03-10

申请人： Eugene Feng ,  William Lau ,  Fong-Long Lin

发明人： Eugene Feng ,  William Lau ,  Fong-Long Lin

IPC分类号： G06F13/00

CPC分类号： G06F13/4243

摘要： A motherboard of a computer system has a video display port, a reprogrammable non-volatile memory, a controller for the non-volatile memory, and a graphics controller circuit for outputting video signals to the video display port. A wired-OR circuit connects the graphics controller circuit to the controller to the port. Thus, the video display port can be used to output video signals from the computer system to a peripheral video display device, and the video display port can be used as an input port to reprogram the non-volatile memory. The present invention also relates to a non-volatile memory device which has an array of non-volatile memory cells and two ports for communication therewith. A first port receives a first communication protocol and interfaces with the array in the first communication protocol. A second port receives a second communication protocol and converts the second communication protocol into the first communication protocol.

摘要翻译： 计算机系统的主板具有视频显示端口，可再编程非易失性存储器，用于非易失性存储器的控制器，以及用于向视频显示端口输出视频信号的图形控制器电路。 有线电路将图形控制器电路连接到控制器到端口。 因此，可以使用视频显示端口将来自计算机系统的视频信号输出到外围视频显示装置，并且视频显示端口可以用作输入端口以重新编程非易失性存储器。 本发明还涉及一种具有非易失性存储器单元阵列和用于与其通信的两个端口的非易失性存储器件。 第一端口接收第一通信协议并与第一通信协议中的阵列接口。 第二端口接收第二通信协议并将第二通信协议转换为第一通信协议。

公开(公告)号：US06944064B2

公开(公告)日：2005-09-13

申请号：US10744504

申请日：2003-12-22

申请人： Eugene Feng ,  Michael S. Briner

发明人： Eugene Feng ,  Michael S. Briner

IPC分类号： G11C7/00 ,  G11C7/20 ,  G11C7/24 ,  G11C11/34 ,  G11C16/20 ,  G11C16/22

CPC分类号： G11C16/22 ,  G11C7/20 ,  G11C7/24 ,  G11C16/20

摘要： An integrated circuit memory device has a memory array and a non-volatile register for storing a stored signal. A bus is connected to the device for supplying an externally supplied signal to the device. A comparator compares the stored signal and the externally supplied signal and provides access to the memory array in response to the comparison.

摘要翻译： 集成电路存储器件具有用于存储存储信号的存储器阵列和非易失性寄存器。 总线连接到该设备，用于向设备提供外部提供的信号。 比较器比较存储的信号和外部提供的信号，并响应于比较提供对存储器阵列的访问。

公开(公告)号：US20050044297A1

公开(公告)日：2005-02-24

申请号：US10643622

申请日：2003-08-18

申请人： Eugene Feng

发明人： Eugene Feng

IPC分类号： G06F3/00 ,  G06F12/00 ,  G06F13/42 ,  G11C5/06

CPC分类号： G06F13/4243 ,  G11C5/066

摘要： An improved memory device is operable in a plurality of modes. The improved memory device has an interface logic decoding circuit which decodes the signals on the communication bus with the external integrated circuit. Depending upon the decoded signals from the communication bus, the memory device is operable in one of the plurality of protocol modes. In particular, one of the applications of the improved memory device is to operate in either the LPC or the FWH communication protocol.

摘要翻译： 改进的存储器件可以多种模式操作。 改进的存储器件具有接口逻辑解码电路，其利用外部集成电路对通信总线上的信号进行解码。 根据来自通信总线的解码信号，存储器件可以以多种协议模式之一操作。 特别地，改进的存储器件的一个应用是在LPC或FWH通信协议中操作。

公开(公告)号：US06339815B1

公开(公告)日：2002-01-15

申请号：US09134242

申请日：1998-08-14

申请人： Eugene Feng ,  Gary Phillips

发明人： Eugene Feng ,  Gary Phillips

IPC分类号： G06F1300

CPC分类号： G06F9/3802 ,  G06F9/24

摘要： A microcontroller system has a first and a second block of non-volatile programmable memory and includes a program memory space allocation circuitry. In a first mode of operation, the first and second blocks of programmable memory are prevented from being written by commands external to the microcontroller system. In a second mode, however, the first and second blocks of programmable memory are prevented from being written by commands external to the microcontroller system but the second block of programmable memory can be written based upon execution of commands stored in the first block of programmable memory. By having circuitry to so allocate the programmable memories, the security of the programmable memories is enhanced.

摘要翻译： 微控制器系统具有非易失性可编程存储器的第一和第二块，并且包括程序存储器空间分配电路。 在第一操作模式中，防止第一和第二可编程存储器块被微控制器系统外部的命令写入。 然而，在第二模式中，防止第一和第二可编程存储器块被微控制器系统外部的命令写入，但是可以基于存储在可编程存储器的第一块中的命令的执行来写入第二可编程存储器块 。 通过具有这样分配可编程存储器的电路，增强了可编程存储器的安全性。

公开(公告)号：US20050135153A1

公开(公告)日：2005-06-23

申请号：US10744504

申请日：2003-12-22

申请人： Eugene Feng ,  Michael Briner

发明人： Eugene Feng ,  Michael Briner

IPC分类号： G11C7/00 ,  G11C7/20 ,  G11C7/24 ,  G11C11/34 ,  G11C16/20 ,  G11C16/22

CPC分类号： G11C16/22 ,  G11C7/20 ,  G11C7/24 ,  G11C16/20

摘要： An integrated circuit memory device has a memory array and a non-volatile register for storing a stored signal. A bus is connected to the device for supplying an externally supplied signal to the device. A comparator compares the stored signal and the externally supplied signal and provides access to the memory array in response to the comparison.

摘要翻译： 集成电路存储器件具有用于存储存储信号的存储器阵列和非易失性寄存器。 总线连接到该设备，用于向设备提供外部提供的信号。 比较器比较存储的信号和外部提供的信号，并响应于比较提供对存储器阵列的访问。

公开(公告)号：US07249213B2

公开(公告)日：2007-07-24

申请号：US10643249

申请日：2003-08-18

申请人： Eugene Feng ,  Douglas Lee

发明人： Eugene Feng ,  Douglas Lee

IPC分类号： G06F13/40 ,  G06F13/42 ,  G06F13/14

CPC分类号： G11C5/066

摘要： An improved memory device is operable in a plurality of protocols. The improved memory device has an interface circuit which receives communication signals from a communication bus. The interface circuit decodes the communication signals and generates a plurality of protocol signals and outputs one of the plurality of protocol signals in response to a select signal. A user selectable nonvolatile memory or fuse stores user selected protocol and generates the select signal corresponding to the user selected protocol. The memory device further comprises a nonvolatile memory and a controller for controlling the nonvolatile memory. The controller is responsive to the one protocol signal that is selected.

摘要翻译： 改进的存储器件可在多种协议中操作。 改进的存储器件具有从通信总线接收通信信号的接口电路。 接口电路解码通信信号并产生多个协议信号，并响应于选择信号输出多个协议信号中的一个。 用户可选的非易失性存储器或熔丝存储用户选择的协议，并产生与用户选择的协议对应的选择信号。 存储装置还包括非易失性存储器和用于控制非易失性存储器的控制器。 控制器响应所选择的一个协议信号。

公开(公告)号：US20050060469A1

公开(公告)日：2005-03-17

申请号：US10643249

申请日：2003-08-18

申请人： Eugene Feng ,  Douglas Lee

发明人： Eugene Feng ,  Douglas Lee

IPC分类号： G06F13/14 ,  G06F13/42 ,  G11C5/06

CPC分类号： G11C5/066

摘要： An improved memory device is operable in a plurality of protocols. The improved memory device has an interface circuit which receives communication signals from a communication bus. The interface circuit decodes the communication signals and generates a plurality of protocol signals and outputs one of the plurality of protocol signals in response to a select signal. A user selectable nonvolatile memory or fuse stores user selected protocol and generates the select signal corresponding to the user selected protocol. The memory device further comprises a nonvolatile memory and a controller for controlling the nonvolatile memory. The controller is responsive to the one protocol signal that is selected.

摘要翻译： 改进的存储器件可在多种协议中操作。 改进的存储器件具有从通信总线接收通信信号的接口电路。 接口电路解码通信信号并产生多个协议信号，并响应于选择信号输出多个协议信号中的一个。 用户可选的非易失性存储器或熔丝存储用户选择的协议，并产生与用户选择的协议对应的选择信号。 存储装置还包括非易失性存储器和用于控制非易失性存储器的控制器。 控制器响应所选择的一个协议信号。