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1.发明申请公开(公告)号：US20130176154A1
公开(公告)日：2013-07-11
申请号：US13346242
申请日：2012-01-09
CPC分类号： H03M1/182 , H03M1/1215
摘要： A time-interleaved analog-to-digital converter (ADC) includes a plurality of ADC blocks each including: at least one ADC unit configured to convert an analog input to a digital output; and a digital gain controller configured to adjust a reference voltage of the at least one ADC unit based on a comparison of an actual output of the at least one ADC unit to an expected output of the at least one ADC unit.
摘要翻译： 时间交织的模数转换器（ADC）包括多个ADC块，每个ADC块包括：至少一个ADC单元，被配置为将模拟输入转换成数字输出; 以及数字增益控制器，被配置为基于所述至少一个ADC单元的实际输出与所述至少一个ADC单元的预期输出的比较来调整所述至少一个ADC单元的参考电压。
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2.发明授权公开(公告)号：US08587464B2
公开(公告)日：2013-11-19
申请号：US13346242
申请日：2012-01-09
IPC分类号： H03M1/12
CPC分类号： H03M1/182 , H03M1/1215
摘要： A time-interleaved analog-to-digital converter (ADC) includes a plurality of ADC blocks each including: at least one ADC unit configured to convert an analog input to a digital output; and a digital gain controller configured to adjust a reference voltage of the at least one ADC unit based on a comparison of an actual output of the at least one ADC unit to an expected output of the at least one ADC unit.
摘要翻译： 时间交织的模数转换器（ADC）包括多个ADC块，每个ADC块包括：至少一个ADC单元，被配置为将模拟输入转换成数字输出; 以及数字增益控制器，被配置为基于所述至少一个ADC单元的实际输出与所述至少一个ADC单元的预期输出的比较来调整所述至少一个ADC单元的参考电压。
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3.发明申请COMPARATOR OFFSET CANCELLATION IN A SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER 有权比较器在一个连续逼近模拟数字转换器中的偏移公开(公告)号：US20130057417A1
公开(公告)日：2013-03-07
申请号：US13227028
申请日：2011-09-07
CPC分类号： H03M1/0607 , H03M1/46
摘要： A successive approximation analog-to-digital converter (ADC) includes an adjustable voltage source that applies an adjustable voltage to an input of a comparator of the ADC to cancel an offset of the ADC. The ADC also includes a control that suspends adjustments of the adjustable voltage when the adjustable voltage converges on the offset. The adjustable voltage source is a digital-to-analog converter.
摘要翻译： 逐次逼近模数转换器（ADC）包括可调电压源，该可调电压源向ADC的比较器的输入端施加可调电压以消除ADC的偏移。 ADC还包括一个控制器，当可调电压收敛于偏移量时，可以暂停可调电压的调整。 可调电压源是数模转换器。
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公开(公告)号：US06934103B2
公开(公告)日：2005-08-23
申请号：US10293370
申请日：2002-11-12
CPC分类号： G11B5/59633
摘要： A read channel for a hard disk controller comprising: means for generating a sequence of start of write signals to individually control the start of writing of each of one or more servo sync words to a disk; and means for individually writing the one or more servo sync words to the disk.
摘要翻译： 一种用于硬盘控制器的读通道，包括：用于产生写入信号开始序列的装置，以单独控制一个或多个伺服同步字中的每一个写入盘的开始; 以及用于将一个或多个伺服同步字单独写入到盘的装置。
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公开(公告)号：US5631578A
公开(公告)日：1997-05-20
申请号：US459579
申请日：1995-06-02
申请人： Kim P. N. Clinton , Scott W. Gould , Steven P. Hartman , Joseph A. Iadanza , Frank R. Keyser, III , Eric E. Millham
发明人： Kim P. N. Clinton , Scott W. Gould , Steven P. Hartman , Joseph A. Iadanza , Frank R. Keyser, III , Eric E. Millham
IPC分类号： G06F7/00 , H01L21/82 , H03K19/177
CPC分类号： H03K19/17736 , H03K19/17704
摘要： A programmable interconnection system for a programmable array includes pluralities of parallel buses for rows and columns of logic cells arranged in the array. Two groups of seven buses are provided for each row or column of logic cells. The buses include conductors connectable to each other, and selectively connectable to, or isolated from, the logic cells. A hierarchy of conductor lengths is disclosed to provide intra-sector and inter-sector bussing. Staggered switching is employed for adjacent sector access.
摘要翻译： 用于可编程阵列的可编程互连系统包括用于排列在阵列中的逻辑单元的行和列的多条并行总线。 为逻辑单元的每行或一列提供了两组7条总线。 总线包括彼此可连接的导体，并且可选择性地连接到或者与逻辑单元隔离。 披露了导体长度的层次结构，以提供扇区内和扇区间总线。 交错切换用于相邻扇区访问。
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公开(公告)号：US06941435B2
公开(公告)日：2005-09-06
申请号：US10248454
申请日：2003-01-21
CPC分类号： G06F15/7867
摘要： An integrated circuit and a method of reconfiguring an integrated circuit in which multiple configuration sets, each including a plurality of register settings, are stored on the chip. Selection of at least a portion of a configuration set allows for quicker and easier retrieval and loading of register settings, and reduces the complexity and size of the higher level system control program. In an alternative embodiment, at least a portion of a configuration set that is stored on the chip can be directly loaded to at least one device to be controlled to eliminate the need for the set of registers.
摘要翻译： 一种集成电路和重新配置集成电路的方法，其中每个包括多个寄存器设置的多个配置集合被存储在芯片上。 选择配置集的至少一部分允许更快速和更容易地检索和加载寄存器设置，并且降低了较高级别系统控制程序的复杂度和大小。 在替代实施例中，存储在芯片上的配置集合的至少一部分可以被直接加载到要被控制的至少一个设备，以消除对该组寄存器的需要。
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7.发明授权Comparator offset cancellation in a successive approximation analog-to-digital converter 有权逐次逼近模数转换器中的比较器偏移消除公开(公告)号：US08493250B2
公开(公告)日：2013-07-23
申请号：US13227028
申请日：2011-09-07
IPC分类号： H03M1/06
CPC分类号： H03M1/0607 , H03M1/46
摘要： A successive approximation analog-to-digital converter (ADC) includes an adjustable voltage source that applies an adjustable voltage to an input of a comparator of the ADC to cancel an offset of the ADC. The ADC also includes a control that suspends adjustments of the adjustable voltage when the adjustable voltage converges on the offset. The adjustable voltage source is a digital-to-analog converter.
摘要翻译： 逐次逼近模数转换器（ADC）包括可调电压源，该可调电压源向ADC的比较器的输入端施加可调电压以消除ADC的偏移。 ADC还包括一个控制器，当可调电压收敛于偏移量时，可以暂停可调电压的调整。 可调电压源是数模转换器。
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