公开(公告)号：US06424622B1

公开(公告)日：2002-07-23

申请号：US09249324

申请日：1999-02-12

Applicant: Ruixue Fan ,  Alexander Ishii ,  Brian Mark ,  Gopalakrishnan Ramamurthy ,  Qiang Ren

Inventor： Ruixue Fan ,  Alexander Ishii ,  Brian Mark ,  Gopalakrishnan Ramamurthy ,  Qiang Ren

IPC: H04L1226

CPC classification number: H04L49/3081 ,  H04L2012/5679 ,  H04L2012/5681 ,  H04L2012/5682 ,  H04Q11/0478

Abstract: A buffer management scheme for an ATM switch where the static and dynamic thresholds are applied appropriately at different levels to ensure efficient and fair usage of buffer memory. A novel dynamic threshold mechanism which, while ensuring fair sharing of memory, maximizes the overall memory utilization. An ATM switch using a dynamic queue threshold scheme, said ATM switch comprising K output port queues and a buffer of B cells sharing said K output port queues, wherein a common threshold is dynamically set for the K output port queues, the common threshold being changed to a new value from an old value when a new cell arrives at any of said K output queues, said new value being a maximum of a length of said any of said K output queues plus one and said old value when total queue length is less than a preset value times B and, said new value being a maximum of a said old value minus one and a statically set minimum buffer threshold when total queue length is greater than or equal to a preset value times B, wherein said preset value is greater than or equal to 0.

Abstract translation: 一种用于ATM交换机的缓冲器管理方案，其中静态和动态阈值在不同级别适当地应用以确保缓冲存储器的有效和合理使用。 一种新颖的动态阈值机制，在确保公平共享内存的同时，最大限度地提高了内存利用率。 一种使用动态队列阈值方案的ATM交换机，所述ATM交换机包括K个输出端口队列和共享所述K个输出端口队列的B个小区的缓冲器，其中为所述K个输出端口队列动态地设置公共阈值，所述公共阈值被改变 当新单元到达所述K个输出队列中的任一个时，从旧值到新值，所述新值是所述K个输出队列中的任何一个的长度的最大值加上当总队列长度较少时的所述旧输出队列的长度 比预设值乘以B，并且当总队列长度大于或等于预设值乘以B时，所述新值是所述旧值减1的最大值和静态设置的最小缓冲器阈值，其中所述预设值更大 大于等于0。

公开(公告)号：US06125116A

公开(公告)日：2000-09-26

申请号：US185592

申请日：1998-11-04

Applicant: Rajiv Dighe ,  Subir K. Biswas ,  Vasanthi Thirumalai ,  Kojiro Watanabe ,  Gopalakrishnan Ramamurthy

Inventor： Rajiv Dighe ,  Subir K. Biswas ,  Vasanthi Thirumalai ,  Kojiro Watanabe ,  Gopalakrishnan Ramamurthy

IPC: H04L12/56 ,  H04Q11/04 ,  H04L12/28

CPC classification number: H04Q11/0478 ,  H04L2012/561 ,  H04L2012/5626

Abstract: The present invention pertains to message sets for use in a flexible programmable multiplexer for accessing an Asynchronous Transfer Mode (ATM) network. The access multiplexer uses a functional separation of line related functions and protocol related functions. Line interface cards perform line related functions. A message set for use in such a multiplexing system that uses a functional separation of line and protocol related functions is provided. The message set includes a general message, a hello message, a configuration message, a line stabilized message, an identify remote message, an identify remote acknowledgement message, a reset remote message, a report statistics message, a report statistics acknowledgement message, a loopback test message and a dynamic rate adaptation message. A flexible programmable multiplexer that uses the message set is also provided.

Abstract translation: 本发明涉及用于访问异步传输模式（ATM）网络的灵活可编程多路复用器中的消息集。 接入复用器使用线路相关功能和协议相关功能的功能分离。 线路接口卡执行线路相关功能。 提供了一种用于这种使用线路和协议相关功能的功能分离的复用系统的消息集。 消息集包括通用消息，呼叫消息，配置消息，线路稳定消息，标识远程消息，标识远程确认消息，重置远程消息，报告统计消息，报告统计确认消息，环回 测试消息和动态速率适配消息。 还提供了使用该消息集的柔性可编程多路复用器。

公开(公告)号：US6046981A

公开(公告)日：2000-04-04

申请号：US808128

申请日：1997-02-28

Applicant: Gopalakrishnan Ramamurthy ,  Qiang Ren

Inventor： Gopalakrishnan Ramamurthy ,  Qiang Ren

IPC: H04Q3/00 ,  H04L12/56 ,  H04Q11/04

CPC classification number: H04L12/5602 ,  H04Q11/0478 ,  H04L2012/5632 ,  H04L2012/5651

Abstract: A multi-class connection admission control (CAC) method that supports cell loss and delay requirements. In this model-based CAC, the source traffic is described in terms of the usage parameter control (UPC) parameters. Through analysis and approximations, simple closed-form methods to calculate the bandwidth required to meet guarantees on quality of service (QoS) are used. In addition to being robust, the CAC achieves a high level of resource utilization and can be easily implemented for real-time admission control.

Abstract translation: 一种支持信元丢失和延迟要求的多类连接准入控制（CAC）方法。 在该基于模型的CAC中，根据使用参数控制（UPC）参数来描述源流量。 通过分析和近似，使用简单的封闭形式方法来计算满足服务质量（QoS）保证所需的带宽。 除了稳健之外，CAC还实现了高水平的资源利用，并且可以轻松实现实时准入控制。

公开(公告)号：US5276677A

公开(公告)日：1994-01-04

申请号：US905287

申请日：1992-06-26

Applicant: Gopalakrishnan Ramamurthy ,  Bhaskar Sengupta

Inventor： Gopalakrishnan Ramamurthy ,  Bhaskar Sengupta

IPC: H04L12/56 ,  H04Q11/04

CPC classification number: H04L47/30 ,  H04L47/10 ,  H04L47/11 ,  H04L47/263 ,  H04L49/3081 ,  H04Q11/0478 ,  H04L2012/5636

Abstract: To control congestion in packet switching networks, control of the traffic sent by a given station to each of the downstream nodes to which it is directly connected is effected by control of the traffic that the upstream nodes to which it is directly connected are permitted to send to it. In this regard, a predictive model is used to predict the cross traffic, one round trip delay in advance that the given station can expect. The parameters for the predictive model are obtained by measurements in real time and by the use of moving averages. Using the predicted cross traffic, the amount of controlled traffic that the proximate downstream nodes can accommodate from the given node, and the correct state of the given node, the state of the given node one round trip delay into the future is predicted. This prediction is used to schedule the amount of traffic to be sent by each of its proximate upstream nodes.

Abstract translation: 为了控制分组交换网络中的拥塞，由给定站发送到其直接连接的每个下游节点的流量的控制通过对其直接连接的上游节点被允许发送的业务的控制来实现 给它 在这方面，预测模型用于预测交通流量，给定站预期的一次往返延迟。 预测模型的参数通过实时测量和移动平均值的使用获得。 使用预测的交叉业务，近似下游节点可以从给定节点容纳的受控业务量以及给定节点的正确状态，预测到给定节点的一个往返延迟的状态。 该预测用于调度其每个邻近的上游节点要发送的业务量。

公开(公告)号：US07292594B2

公开(公告)日：2007-11-06

申请号：US10339796

申请日：2003-01-09

Applicant: Gopalakrishnan Meempat ,  Gopalakrishnan Ramamurthy ,  William J. Dally

Inventor： Gopalakrishnan Meempat ,  Gopalakrishnan Ramamurthy ,  William J. Dally

IPC: H04L12/56

CPC classification number: H04L49/254 ,  H04L49/101 ,  H04L49/3027 ,  H04L49/3045

Abstract: A switching fabric connects input ports to output ports. Each input has an input pointer referencing an output port, and each output has an output pointer referencing an input port. An arbiter includes input and output credit allocators, and an arbitration module (matcher). The input credit allocator resets input credits associated with input/output pairs and updates the input pointers. Similarly, the output credit allocator resets output credits associated with input/output pairs and updates the output pointers. The matcher matches inputs to outputs based on pending requests and available input and output credits. A scheduler schedules transmissions through the cross-bar switch according to the arbiter's matches.

Abstract translation: 交换结构将输入端口连接到输出端口。 每个输入都有一个引用输出端口的输入指针，每个输出都有一个引用输入端口的输出指针。 仲裁器包括输入和输出信用分配器，以及仲裁模块（匹配器）。 输入信用分配器重置与输入/输出对相关联的输入信用，并更新输入指针。 类似地，输出信用分配器重置与输入/输出对相关联的输出信用并更新输出指针。 匹配器根据挂起的请求和可用的输入和输出信用量将输入匹配到输出。 调度器根据仲裁器的匹配程序调度通过交叉开关的传输。

公开(公告)号：US07292580B2

公开(公告)日：2007-11-06

申请号：US10325700

申请日：2002-12-18

Applicant: Gopalakrishnan Ramamurthy ,  Gopalakrishnan Meempat ,  William J. Dally

Inventor： Gopalakrishnan Ramamurthy ,  Gopalakrishnan Meempat ,  William J. Dally

IPC: H04L12/56

CPC classification number: H04L12/5601 ,  H04L2012/5629 ,  H04L2012/5638 ,  H04L2012/5651 ,  H04L2012/5679 ,  H04L2012/5681

Abstract: Data cells of plural classes are transferred from input ports to output ports through a switch by storing the cells at each input port in class-specific virtual output queues (VOQ) within sets of VOQs associated with output ports, and providing credits to VOQs according to class-associated guaranteed bandwidths. When a cell is received at a VOQ having credits, a high-priority request for transfer is generated. If a cell is received at a VOQ that does not have any available credits, a low-priority request for transfer is generated. In response to requests, grants are issued to VOQ sets without regard to class, high-priority requests being favored over low-priority requests. When a grant is received for a particular VOQ set, an arbitrator selects a VOQ from the set, giving priority to VOQs having credits over VOQs without credits, and a cell from the selected VOQ is transferred. Requests generated from all input ports are forwarded to a central scheduler associated with a switch fabric slice, the central scheduler issuing the grants. The switch fabric may comprise multiple slices and a central scheduler, across which requests may be distributed in parallel, for example, the switch fabric slices being selected in a fixed order. While all high-priority requests are granted, low priority requests may be granted by the central scheduler according to a weighted fair share policy.

Abstract translation: 将多个类的数据单元通过交换机从输入端口传送到输出端口，通过将输出端口中的单元存储在与输出端口相关联的VOQ集合内的类特定虚拟输出队列（VOQ）中，并根据 类相关保证带宽。 当在具有信用的VOQ接收到信元时，产生高优先级的转移请求。 如果在没有任何可用信用的VOQ接收到信元，则生成低优先级的转移请求。 响应请求，向VOQ集发出授权，而不考虑低优先级请求的类别，优先级高的请求。 当针对特定VOQ集合接收到授权时，仲裁者从该集合中选择一个VOQ，优先考虑具有不带信用的VOQ的信用的VOQ，并且从所选择的VOQ中传送一个信元。 从所有输入端口产生的请求被转发到与交换机结构切片相关联的中央调度器，中央调度器发出授权。 交换结构可以包括多个片段和中央调度器，跨平台地分发请求，例如，以固定顺序选择交换结构片段。 当所有高优先级请求被授予时，中央调度器可以根据加权公平共享策略授予低优先级请求。

公开(公告)号：US06618379B1

公开(公告)日：2003-09-09

申请号：US09206975

申请日：1998-12-08

Applicant: Gopalakrishnan Ramamurthy ,  Ruixue Fan ,  Aleksandra Smiljanić

Inventor： Gopalakrishnan Ramamurthy ,  Ruixue Fan ,  Aleksandra Smiljanić

IPC: H04J300

CPC classification number: H04Q11/0478 ,  H04L49/101 ,  H04L49/1546 ,  H04L49/201 ,  H04L49/254 ,  H04L49/3018

Abstract: A novel protocol for scheduling of packets in high-speed cell based switches is provided. The switch is assumed to use a logical cross-bar fabric with input buffers. The scheduler may be used in optical as well as electronic switches with terabit capacity. The proposed round-robin greedy scheduling (RRGS) achieves optimal scheduling at terabit throughput, using a pipeline technique. The pipeline approach avoids the need for internal speedup of the switching fabric to achieve high utilization. A method for determining a time slot in a N×N crossbar switch for a round robin greedy scheduling protocol, comprising N logical queues corresponding to N output ports, the input for the protocol being a state of all the input-output queues, output of the protocol being a schedule, the method comprising: choosing input corresponding to i=(constant-k−1)mod N, stopping if there are no more inputs, otherwise choosing the next input in a round robin fashion determined by i=(i+1)mod N; choosing an output j such that a pair (i,j) to a set C={(i,j)| there is at least one packet from I to j}, if the pair (i,j) exists; removing i from a set of inputs and repeating the steps if the pair (i,j) does not exist; removing i from the set of inputs and j from a set of outputs; and adding the pair (i,j) to the schedule and repeating the steps.

Abstract translation: 提供了一种用于在基于高速单元的交换机中调度分组的新颖协议。 假设交换机使用带输入缓冲区的逻辑交叉结构。 调度器可以用于具有太比特容量的光学以及电子开关中。 提出的循环贪心调度（RRGS）使用管道技术实现了吞吐量的最佳调度。 管道方式避免了交换结构的内部加速实现高利用率的需要。 一种用于确定用于轮询贪心调度协议的N×N交叉开关中的时隙的方法，包括对应于N个输出端口的N个逻辑队列，所述协议的输入是所有输入 - 输出队列的状态，协议的输出 作为调度，该方法包括：选择对应于i =（常数k-1）mod N的输入，如果不存在更多输入则停止，否则以由i =（i + 1）确定的循环方式选择下一个输入 ）mod N; 选择输出j使得对（i，j）与集合C = {（i，j）| 如果存在对（i，j），则存在从I到j}的至少一个分组; 从一组输入中删除i，如果对（i，j）不存在则重复步骤; 从输出集合中删除i，并从一组输出中删除j; 并将对（i，j）添加到时间表并重复步骤。

公开(公告)号：US06324165B1

公开(公告)日：2001-11-27

申请号：US08923978

申请日：1997-09-05

Applicant: Ruixue Fan ,  Brian L. Mark ,  Gopalakrishnan Ramamurthy

Inventor： Ruixue Fan ,  Brian L. Mark ,  Gopalakrishnan Ramamurthy

IPC: H04L1226

CPC classification number: H04L12/5602 ,  H04L49/203 ,  H04L49/205 ,  H04L49/3018 ,  H04L49/3027 ,  H04L49/3081 ,  H04L49/503 ,  H04L2012/5636 ,  H04L2012/5651 ,  H04L2012/5679 ,  H04Q11/0478

Abstract: A large capacity ATM core switch architecture is disclosed, which supports multiple traffic classes and quality-of-service (QoS) guarantees. The switch supports both real-time traffic classes with strict QoS requirements, e.g., CBR and VBR, and non-real-time traffic classes with less stringent requirements, e.g., ABR and UBR. The architecture also accommodates real-time and non-real-time multicast flows in an efficient manner. The switch consists of a high-speed core module that interconnects input/output modules with large buffers and intelligent scheduling/buffer management mechanisms. The scheduling can be implemented using a novel dynamic rate control, which controls internal congestion and achieves fair throughput performance among competing flows at switch bottlenecks. In the dynamic rate control scheme, flows are rate-controlled according to congestion information observed at bottleneck points within the switch. Each switch flow is guaranteed a minimum service rate plus a dynamic rate component which distributes any unused bandwidth in a fair manner.

Abstract translation: 公开了一种大容量ATM核心交换机架构，其支持多种业务类别和服务质量（QoS）保证。 交换机支持具有严格QoS要求的实时业务类别，例如CBR和VBR，以及具有不太严格要求的非实时业务类，例如ABR和UBR。 该架构还以有效的方式适应实时和非实时多播流。 该交换机由高速核心模块，可将输入/输出模块与大型缓冲区和智能调度/缓冲管理机制相互连接。 可以使用新颖的动态速率控制来实现调度，其控制内部拥塞并且在交换机瓶颈中的竞争流之间实现公平的吞吐量性能。 在动态速率控制方案中，根据在交换机内的瓶颈点观察到的拥塞信息，对流量进行速率控制。 每个交换机流被保证最小服务速率加上动态速率分量，以公平的方式分配任何未使用的带宽。

公开(公告)号：US06304551B1

公开(公告)日：2001-10-16

申请号：US08821864

申请日：1997-03-21

Applicant: Gopalakrishnan Ramamurthy ,  Brian Lai-Bue Mark

Inventor： Gopalakrishnan Ramamurthy ,  Brian Lai-Bue Mark

IPC: H04J116

CPC classification number: H04Q11/0478 ,  H04L2012/563 ,  H04L2012/5637 ,  H04L2012/568

Abstract: A scheme for determining the usage parameter control (UPC) values for an arbitrary traffic source from observations of its emitted cell stream is disclosed. The UPC values are used in a traffic shaping mechanism based on a dual leaky bucket, which shapes the cell stream by either discarding or delaying cells. The choice of UPC values is a function of the statistical characteristics of the observed cell stream; the user's tolerance for delay prior to the network access point; and the cost incurred on the network side. The chosen UPC values are then negotiated with the network. The source traffic characteristics may change dramatically over time, making the initially negotiated UPC descriptor inappropriate for the entire traffic stream. Hence, a method is disclosed for dynamically renegotiating UPC parameters whenever a predetermined change in traffic characteristics is detected. This method for real-time estimation and dynamic renegotiation of UPC parameters is the basis for a self-contained module which allows the source to make efficient use of the network resources.

Abstract translation: 公开了一种用于通过其发射的小区流的观察来确定任意业务源的使用参数控制（UPC）值的方案。 UPC值用于基于双漏斗的流量整形机制中，双重泄漏桶通过丢弃或延迟单元来形成单元流。 UPC值的选择是观察到的细胞流的统计特征的函数; 用户在网络接入点之前的延迟容限; 以及网络方面的成本。 然后，所选择的UPC值与网络协商。 源流量特征可能会随时间而急剧变化，从而最初协商的UPC描述符对于整个流量流是不合适的。 因此，每当检测到业务特性的预定变化时，公开了用于动态重新协商UPC参数的方法。 这种用于实时估计和UPC参数的动态重新协商的方法是允许源有效利用网络资源的自包含模块的基础。

公开(公告)号：US06408005B1

公开(公告)日：2002-06-18

申请号：US08924820

申请日：1997-09-05

Applicant: Ruixue Fan ,  Brian L. Mark ,  Gopalakrishnan Ramamurthy

Inventor： Ruixue Fan ,  Brian L. Mark ,  Gopalakrishnan Ramamurthy

IPC: H04L1228

CPC classification number: H04L47/29 ,  H04L12/5602 ,  H04L47/22 ,  H04L47/50 ,  H04L49/3081 ,  H04L2012/5636 ,  H04L2012/5651 ,  H04L2012/5679 ,  H04L2012/5681 ,  H04L2012/5682 ,  H04Q11/0478

Abstract: A Dynamic Rate Control (DRC) scheduler for scheduling cells for service in a generic Asynchronous Transfer Mode (ATM) switch is disclosed. According to the inventive DRC, each traffic stream associated with an internal switch queue is rate-shaped according to a rate which consists of a minimum guaranteed rate and a dynamic component computed based on congestion information within the switch. While achieving high utilization, DRC guarantees a minimum throughput for each stream and fairly distributes unused bandwidth. The distribution of unused bandwidth in DRC can be assigned flexibly, i.e., the unused bandwidth need not be shared in proportion to the minimum throughput guarantees, as in weighted fair share schedulers. Moreover, an effective closed-loop QoS control can be built into DRC by dynamically updating a set of weights based on observed QoS. Another salient feature of DRC is its ability to control congestion internal congestion at bottleneck points within a multistage switch. DRC can also be extended beyond the local switch in a hop-by-hop fashion.

Abstract translation: 公开了一种用于在通用异步传输模式（ATM）交换机中调度用于服务的小区的动态速率控制（DRC）调度器。 根据本发明的DRC，与内部交换机队列相关联的每个业务流根据由最小保证速率和基于交换机内的拥塞信息计算的动态组件的速率的速率形状。 在实现高利用率的同时，DRC保证每个流的最小吞吐量，并且公平地分配未使用的带宽。 可以灵活地分配未使用的带宽在DRC中的分配，即，与加权公平共享调度器中的最小吞吐量保证成比例，不需要共享未使用的带宽。 此外，通过基于观察到的QoS动态地更新一组权重，可以在DRC中内置有效的闭环QoS控制。 DRC的另一个突出特点是能够控制多级交换机内瓶颈点的拥塞内部拥塞。 DRC也可以以逐跳方式扩展到本地交换机之外。